radare
0a6ff520cb
Fix #13326 - Implement of asm.regsub to replace register names with their role alias ##disasm ( #13330 )
2019-03-09 10:21:04 +01:00
Paul I
24184595d3
Fix msvc build
2019-03-09 10:19:08 +01:00
Maijin
4cacfefff1
Change printf to println ##rbin ( #13331 )
2019-03-09 10:18:12 +01:00
GustavoLCR
f8fed5c38a
Fix #13252 - Fix path with spaces in projects ##projects
2019-03-09 02:59:42 +01:00
pancake
f0fd4567bb
Add missing ESIL for ARM64's LDRH instruction ##anal
2019-03-08 19:36:14 +01:00
Anton Kochkov
1873b3e689
AppVeyor - Update MSVC to 2017, Ninja to 1.9.0 ##build
2019-03-08 15:21:25 +01:00
Rishi Bhatt
fc63cda1ae
Remove parenthesis from class size listing ( #13238 )
2019-03-08 15:17:50 +01:00
radare
82416b0212
Create libr_main and make all binaries use it ##core
...
* Cleanup the use of getopt with our wrapper
2019-03-08 14:22:59 +01:00
Riccardo Schirone
047fe25ff3
Fix relocations in ET_REL ELF ( #12694 )
...
* Get the section name for SECTION/LOCAL ELF symbols
* Do not print warning messages if ELF is ET_REL
In that case, it's a normal thing that dynamic sections and program
headers are not present.
* Fix the address of the fake PLT table
* Do not use + symbols if there is no name
2019-03-08 14:03:30 +01:00
pancake
727de4c9f6
Improve interactive graph title with function signature ##graph
2019-03-08 10:08:48 +01:00
pancake
7292619c12
Implement graph.trace and improve dt+ with dt++ for abt ##graph
2019-03-08 10:08:48 +01:00
pancake
227b6a4e48
Implement dbg.skipover and fix dss for esil ##debug
2019-03-08 10:08:48 +01:00
pancake
d84fbdf9c4
Fix null string issue in afi and add afcf in afij ##anal
2019-03-08 10:08:48 +01:00
Maijin
fdd0a7f833
Add bin_qnx.c in Meson.build ##bin ( #13314 )
2019-03-08 09:09:26 +01:00
Maijin
8e1da330b6
Add Homewbrew detection ##nds ##bin ( #13313 )
...
To be able to add tests for nintendo DS r_bin plugin
2019-03-08 13:48:17 +08:00
Anton Kochkov
180b7000c0
Add LGTM alerts badge
2019-03-08 13:34:16 +08:00
Francesco Tamagni
70ad8cf5dd
Import the XNU kernelcache RBin plugin ##bin
...
* Requires -F kernelcache for now
2019-03-08 02:03:47 +01:00
Maijin
7d0a776192
Add asm.refptr eval variable ##asm
2019-03-08 02:02:17 +01:00
pancake
5f60fce4b6
Fix warnings in bin.qnx
2019-03-07 23:17:09 +01:00
radare
e3ee61a05f
Fix infinite loop in /r, and optimize by not resolving vars when not needed ##search
2019-03-07 23:10:42 +01:00
MK
e1832253dc
Add missing keywords for tab completion ##cons
2019-03-07 19:11:00 +01:00
pancake
db934d653b
Add missing noreturn definition for darwin
2019-03-07 19:07:01 +01:00
radare
1b89a8b4b6
Fix dll_ symbols not being analyzed with aa ##windows
2019-03-07 17:44:45 +01:00
Riccardo Schirone
01c543f144
Use ARM special syms as analysis hints ( #13249 ) ##anal
...
* Set hints for ARM special symbols $t and $a
* Do not set $d metadata
2019-03-07 09:00:48 +01:00
David CARLIER
ffab804e4b
Fix #13297 proposal ( #13299 )
2019-03-07 08:58:14 +01:00
GustavoLCR
ff4d9a567c
Fix #13244 - Assembler support for x86 bsf and bsr instructions ( #13303 )
2019-03-07 01:26:19 +01:00
radare
6ee5f04694
Avoid assertion in esil traces, speedup some paths ( #13300 )
2019-03-07 00:42:12 +01:00
pancake
c22f707f0b
Fix #13302 - Add .* as an alias for #!pipe but trimming in first space
2019-03-07 00:38:21 +01:00
Paul I
60d0f12c7b
Fix microsoft cc ( #13298 )
2019-03-06 23:49:32 +01:00
Florian Märkl
d63d4f2283
Fix pdJ for cmt.right=1 + pseudo=1
2019-03-06 21:10:13 +01:00
Deepak Chethan
42f846b42c
Changed http.verbose to false ( #13292 )
2019-03-06 16:24:52 +01:00
Khairul Azhar Kasmiran
e85f905855
Use fcn->meta.min instead of fcn->addr in fcn rbtree code ##anal
...
* Use fcn->meta.min instead of fcn->addr in fcn rbtree code
* Maintain 2nd rbtree and reinstate _fcn(_addr)_tree_find_addr()
* FCN_ADDR_CONTAINER -> ADDR_FCN_CONTAINER
* Use r_rbtree_insert ⧸ delete as appropriate
* Remove set_meta_min_if_needed from _fcn_tree_probe⧸iter_next
2019-03-06 15:04:06 +01:00
radare
4ce95ac65f
Add cmd.esil.step ##esil
2019-03-06 14:46:01 +01:00
Lev Aronsky
93ade35336
Fix memory leak in strbuf. ( #13273 )
...
* Fix memory leak in strbuf.
`sb->ptr` was set to NULL without freeing the underlying data.
* Use `R_NEW` instead of `R_NEW0`, as the memory is
initialized immediately afterwards.
* Call `r_*_op_init` in `r_asm_disassemble`/`r_anal_op`.
2019-03-06 14:04:22 +01:00
Riccardo Schirone
29ea07dff1
Avoid splitting obj.* flags into their own flagspace ( #13286 )
2019-03-06 13:32:26 +01:00
radare
d7191b9aa1
Introduce anal.verbose and set http.verbose and bin.verbose to false ##core
2019-03-06 11:26:37 +01:00
radare
da6ec135dc
Fix #13283 - Swap g<->o in visual and graph ##visual
2019-03-06 11:14:23 +01:00
Riccardo Schirone
264f4585c7
Add symbols.objects and symbols.sections flag spaces ##flags
2019-03-06 11:13:26 +01:00
David CARLIER
3f2bff9c89
Little code cleanups ( #13277 )
2019-03-06 10:02:39 +01:00
Deepak Chethan
4df6941556
Use pj in canal.c
2019-03-06 09:40:12 +01:00
GustavoLCR
81ad0fe809
Fix #13234 - Allow reopening of webserver ##sync
...
* Fix hang after ctrl-c
2019-03-06 04:43:32 +01:00
Lowly Worm
30264306a0
Make function to allow grabbing the flags by order of importance in flagspace ##core
...
* use relsub addr
* kill i2, grab top of list when not in preferred spaces
* Add r_core_flag_get_by_spaces
* Remove r_flag_get_i2 and use r_core_flag_get_by_spaces
* Fix fcn name from flag
* Better consistency: flag_get instead of get_flag
* Quickpath for just one flag
2019-03-05 23:43:49 +01:00
pancake
1cdcb87d5a
Fill ptrsize for TBH and TBB Thumb/ARM instructions ##anal
2019-03-05 22:40:09 +01:00
Vasilij Schneidermann
e39c9424aa
Make -x behave like /x unless mask is provided ##search
2019-03-05 20:28:31 +01:00
Deepak Chethan
68001dc8f8
Add initial support for QNX executables ##bin
2019-03-05 20:27:43 +01:00
CrypticalCode0
e0b1d7a525
Update register profile for m68k ##anal
...
added annotation to the set_reg_profile for documentation completeness, the FPU registers are really too small and should be 5 words minimal(80bits) TBH. SR is only 16bit but it having 32bits is okay, CCR should be folded in but IDK how this would affect access.
2019-03-05 19:03:03 +01:00
CrypticalCode0
82d74870fb
Update anal_m68k_cs.c ( #13274 )
...
EXG (EXchanGe register) is an valid instruction for R_ANAL_OP_TYPE_MOV because it only moves from RegN to RegN.
2019-03-05 18:22:15 +01:00
pancake
c29310bb73
Improve visual tabs switch with decompilation mode ##visual
2019-03-05 11:08:41 +01:00
Riccardo Schirone
3a96e51b3a
Fix leak in RIO: free iter after removing it from list
...
ls_append/ls_prepend will create a new iter, so we need to free the
iter that was removed from the list.
2019-03-05 00:20:46 +01:00
Riccardo Schirone
e3f93ec490
Fix some leaks from unit tests
2019-03-05 00:20:46 +01:00