wargio
ddb5fd0575
fixed bad load/store for ppc:ps
2018-01-14 10:18:39 +01:00
emvivre
82a911781f
Add VMCLEAR operator for x86 assembler (Clear Virtual-Machine Control Structure)
2018-01-13 20:33:32 +01:00
emvivre
da058608bd
Add VERR/VERW operator for x86 assembler (Verify a Segment for Reading or Writing)
2018-01-13 10:07:39 +01:00
whitequark
c816dc7e66
Don't try to build shared libraries if configured as --without-pic.
...
Specifically, avoid building all plugins as non-static objects,
as well as some supplementary libraries. In fact, a large amount
of plugins was already gated to build as shared objects only with
WITHPIC=1, but this was not done consistently.
This gating has been moved to */p/Makefile.
Building these shared objects is a waste of time and breaks
the --without-pic build unless CFLAGS is forced in the make
invocation.
2018-01-11 23:09:22 +01:00
emvivre
fa942fdc8b
Add some operators for x86 assembly (SIDT, SLDT, SMSW). ( #9176 )
...
* Add SIDT operator for x86 assembler (Store Interrupt Descriptor Table Register)
* Add SLDT operator for x86 assembler (Store Local Descriptor Table Register)
* Add SMSW operator for x86 assembler (Store Machine Status Word)
2018-01-11 23:07:42 +01:00
emvivre
fbe2063e0c
Add new operators to x86 assembly (SGDT, STMXCSR, STR). ( #9171 )
...
* Add SGDT operator for x86 assembler (Store Global Descriptor Table Register)
* Add STMXCSR operator for x86 assembler (Store MXCSR Register State)
* Add STR operator for x86 assembler (Store Task Register)
2018-01-11 21:59:37 +01:00
Giovanni
f32cc2777a
added ppc Paired single ( #9172 )
2018-01-11 14:07:30 +01:00
emvivre
a3f7ce2336
Add several operators for x86 assembly (LLDT, LMSW, LGDT/LIDT) ( #9165 )
...
* Add LLDT operator for x86 assembler (Load Local Descriptor Table Register)
* Add LMSW operator for x86 assembler (Load Machine Status Word)
* Add LGDT/LIDT operator for x86 assembler (Load Global/Interrupt Descriptor Table Register)
2018-01-09 20:17:28 +01:00
emvivre
3d6584f934
Add several float operators for x64 assembly (FSTCW/FNSTCW, FSTSW/FNSTSW, FSAVE/FNSAVE) ( #9154 )
...
* Add FSTCW/FNSTCW operator for x86 assembler (Store x87 FPU Control Word)
* Add FSTSW/FNSTSW operator for x86 assembler (Store x87 FPU Status Word)
* Fix some issues of float instructions for x86 assembler.
* Add FSAVE/FNSAVE operator for x86 assembler (Store x87 FPU State)
2018-01-09 10:38:54 +01:00
pancake
06311f718b
Fix #9126 - Bring back the good old LEA syntax
2018-01-08 14:17:52 +01:00
pancake
6b00784cb1
Add more priviledged arm64 instruction types and opcode descriptions
2018-01-08 11:21:48 +01:00
pancake
335938be58
r_str_chop -> r_str_trim
2018-01-08 03:22:26 +01:00
emvivre
28918381e9
Add FSUBR/FSUBRP/FISUBR operator for x86 assembler (Reverse Subtract)
2018-01-07 20:40:05 +01:00
emvivre
ab3ff60f2e
Add FSUB/FSUBP/FISUB operator for x86 assembler (Subtract)
2018-01-07 20:40:05 +01:00
emvivre
65a71bcaed
Add FMUL/FMULP/FIMUL operator for x86 assembler (Multiply)
2018-01-07 20:40:05 +01:00
emvivre
ae36701d6c
Add FDIVR/FDIVRP/FIDIVR operator for x86 assembler (Reverse Divide)
2018-01-07 20:40:05 +01:00
emvivre
a8bd708a39
Add FDIV/FDIVP/FIDIV operator for x86 assembler (Divide)
2018-01-07 20:40:05 +01:00
pancake
c1ef0d7580
Fix dsb, dmb regressions
2018-01-07 13:54:38 +01:00
Sven Steinbauer
9e516fe6dc
Fix clflush to work with r/m mod
2018-01-07 04:02:35 +01:00
Sven Steinbauer
ea9492b660
Remove compiler warnings
2018-01-07 04:02:35 +01:00
emvivre
5abaf1dc66
Add others operators related to float operations for x86 assembly (FBLD, FBSTP, FXRSTOR, FXSAVE, FIST/FISTP, FISTTP, FSTENV/FNSTENV) ( #9137 )
...
* Add FBLD operator for x86 assembler (Load Binary Coded Decimal)
* Add FBSTP operator for x86 assembler (Store BCD Integer and Pop)
* Add FXRSTOR operator for x86 assembler (Restore x87 FPU, MMX Technology, SSE, SSE2, and SSE3 State)
* Add FXSAVE operator for x86 assembler (Save x87 FPU, MMX Technology, SSE, and SSE2 State)
* Add FIST/FISTP operator for x86 assembler (Store Integer)
* Add FISTTP operator for x86 assembler (Store Integer with Truncation)
* Add FSTENV/FNSTENV operator for x86 assembler (Store x87 FPU Environment)
2018-01-07 04:01:31 +01:00
pancake
1bc0fcdea5
Implement isb, dsb and dmb for the arm64 assembler
2018-01-05 00:45:50 +01:00
emvivre
dbd5b68b22
Add FLDENV operator for x86 assembler (Load x87 FPU Environment)
2018-01-05 00:29:30 +01:00
emvivre
1d99f9e778
Add FLDCW operator for x86 assembler (Load x87 FPU Control Word)
2018-01-05 00:29:30 +01:00
emvivre
346d6b9ad9
Add FILD operator for x86 assembler (Load Integer)
2018-01-05 00:29:30 +01:00
emvivre
e12b788a51
Add FICOM/FICOMP operator for x86 assembler (Compare Integer)
2018-01-05 00:29:30 +01:00
emvivre
2915c54b57
Add FADD/FADDP/FIADD operator for x86 assembler (Add)
2018-01-05 00:29:30 +01:00
Lowly Worm
7260de3496
add support for clflush instruction to nz
2018-01-04 14:10:43 -05:00
pancake
b06d57a068
Fix avr build with meson
2018-01-04 18:46:35 +01:00
pancake
1d7f75fb91
Fix non-null terminated string issue in 8051 disassembler
2018-01-04 18:39:17 +01:00
emvivre
0e9ae8deb0
Add more checking on the operands type of some instuctions in the x86 assembler.
2018-01-04 01:24:08 +01:00
emvivre
c999058e01
Add FXCH operator for x86 assembler (Exchange Register Contents)
2018-01-04 01:24:08 +01:00
emvivre
ccc2b8aadb
Add FRSTOR operator for x86 assembler (Restore x87 FPU State)
2018-01-04 01:24:08 +01:00
Florian Märkl
f862b90d4a
Add PIC Baseline ASM Plugin
2018-01-02 18:18:42 +01:00
emvivre
d5ffd3ebc5
Add fcmovb/fcmove/fcmovbe/fcmovu/fcmovnb/fcmovnefcmovnbe/fcmovnu operator for x86 assembler (Floating-Point Conditional Move)
2018-01-02 10:38:25 +01:00
emvivre
860815b656
Add fucom/fucomp/fucompp operator for x86 assembler (Unordered Compare Floating Point Values)
2018-01-02 10:38:25 +01:00
emvivre
84e5e11fb0
Add ffree operator for x86 assembler (Free Floating-Point Register)
2018-01-02 10:38:25 +01:00
xarkes
43502af99b
Added meson lh5801 support ( #9113 )
2018-01-02 12:48:14 +04:00
xarkes
b909538708
Do not compile already included .c
2018-01-02 09:21:41 +01:00
xarkes
659b2bb84a
Added meson avr support
2018-01-01 16:31:33 +01:00
emvivre
85b8a4b18b
Add finit/fninit operator for x86 assembler (Initialize Floating-Point Unit)
2018-01-01 16:06:16 +01:00
emvivre
7d7c46ee28
Add fclex/fnclex operator for x86 assembler (Clear Exceptions)
2018-01-01 16:06:16 +01:00
emvivre
c8ad6b8cac
Add fxtract operator for x86 assembler (Extract Exponent and Significand)
2018-01-01 16:06:16 +01:00
emvivre
42ed450fb8
Add fxam operator for x86 assembler (Examine ModR/M)
2018-01-01 16:06:16 +01:00
emvivre
1b7a2b2e2e
Add ftst operator for x86 assembler (Test)
2018-01-01 16:06:16 +01:00
emvivre
e6a56ab1c8
Add frndint operator for x86 assembler (Round to Integer)
2018-01-01 16:06:16 +01:00
emvivre
c804081584
Add fyl2xp1 operator for x86 assembler (Compute y * log2(x+1))
2018-01-01 16:06:16 +01:00
emvivre
2e9d15c08d
Add fyl2x operator for x86 assembler (Compute y * log2(x))
2018-01-01 16:06:16 +01:00
emvivre
dc5127031f
Add f2xm1 operator for x86 assembler (Compute 2**x - 1)
2018-01-01 16:06:16 +01:00
emvivre
30abc85888
Add fldln2 operator for x86 assembler (Push ln(2) onto the FPU stack)
2018-01-01 16:06:16 +01:00
emvivre
b54af79627
Add fldlg2 operator for x86 assembler (Push log10(2) onto the FPU stack)
2018-01-01 16:06:16 +01:00
emvivre
93dfcdb5d1
Add fldl2e operator for x86 assembler (Push log2(e) onto the FPU stack)
2018-01-01 16:06:16 +01:00
emvivre
22a3474698
Add fldl2t operator for x86 assembler (Push log2(10) onto the FPU stack)
2018-01-01 16:06:16 +01:00
emvivre
7694c17cae
Add fldpi operator for x86 assembler (Push π onto the FPU stack)
2018-01-01 16:06:16 +01:00
emvivre
0d75ed9a98
Add fldz operator for x86 assembler (Push 0.0 onto the FPU stack)
2018-01-01 16:06:16 +01:00
emvivre
d4a0825cdb
Add fld1 operator for x86 assembler (Push 1.0 onto the FPU stack)
2018-01-01 16:06:16 +01:00
xarkes
e482e410a5
Fix meson build
2018-01-01 14:02:54 +01:00
emvivre
261d1a3474
Add fchs operator for x86 assembler (Change Sign)
2017-12-30 20:16:29 +01:00
emvivre
807b415493
Add fprem1 operator for x86 assembler (Partial IEEE Remainder)
2017-12-30 20:16:29 +01:00
emvivre
9a308b5f5b
Add fprem operator for x86 assembler (Partial Remainder)
2017-12-30 20:16:29 +01:00
emvivre
5285ba6eee
Add fincstp operator for x86 assembler (Increment Stack-Top Pointer)
2017-12-30 20:16:29 +01:00
emvivre
cdef83abd1
Add fdecstp operator for x86 assembler (Decrement Stack-Top Pointer)
2017-12-30 20:16:29 +01:00
emvivre
4736d5a63d
Add fpatan operator for x86 assembler (Partial Arctangent)
2017-12-30 20:16:29 +01:00
emvivre
fa09b98c56
Add fptan operator for x86 assembler (Partial Tangent)
2017-12-30 20:16:29 +01:00
emvivre
cfbec44fe5
Add fsqrt operator for x86 assembler (Square Root)
2017-12-30 20:16:29 +01:00
emvivre
3415fe9c0c
Add fscale operator for x86 assembler (Scale)
2017-12-30 20:16:29 +01:00
emvivre
2860aa4ff3
Add fabs operator for x86 assembler (Absolute Value)
2017-12-30 20:16:29 +01:00
emvivre
5fcfd0056d
Add fcos operator for x86 assembler (Cosine)
2017-12-30 20:16:29 +01:00
emvivre
1c91cb65b8
Add fnop operator for x86 assembler (No Operation)
2017-12-30 20:16:29 +01:00
emvivre
b0bb816866
Add idiv operator for x86 assembler (signed divide) ( #9096 )
2017-12-30 05:20:58 +01:00
emvivre
7413751ad5
Add div operator for x86 assembler ( #9094 )
2017-12-29 21:15:44 +01:00
Anton Kochkov
1b8ab5f7cf
WASM analysis - initial stub ( #9091 )
2017-12-29 19:56:33 +01:00
emvivre
92ec8c065e
Add mul operator for x86 assembler ( #9093 )
2017-12-29 19:55:54 +01:00
emvivre
75f3898184
Fix x86 assemble with imul operator ( #9085 )
2017-12-29 09:19:28 +01:00
Sven Steinbauer
706659ce93
Fix #9071 - Correct assembly for extended 64 bit regs
2017-12-28 14:35:49 +01:00
Adrian Studer
f36f165312
Substitute 8051 register names ( #9072 )
2017-12-28 00:36:41 +01:00
pancake
0b1e8eaecc
Fix almost all warnings from the msvc build
2017-12-19 00:18:39 +01:00
Maijin
fa44625c5a
Add chip8 disassembler and partial analyzer
2017-12-07 15:25:27 +01:00
Anton Kochkov
d5f2e82c84
Fix plugin linking issues
2017-12-06 15:06:06 +08:00
Joe Ranweiler
6d6dc92de9
Assemble REX.W prefix for 64-bit immediate mov to memory ( #8963 )
2017-12-05 21:10:31 +01:00
Sven Steinbauer
1df0b761b3
Fix for issue #8935 ( #8951 )
2017-12-04 12:12:18 +01:00
pancake
7e0db0ff8f
Fix #8941 - Fix crash in arm.winedbg (null deref)
2017-12-03 13:10:59 +01:00
Giovanni
83d6067db9
fixed wrong output ( #8908 )
2017-11-29 04:16:12 +01:00
Anton Kochkov
598807c10e
Fix Gentoo linking
2017-11-27 13:40:31 +08:00
Fedor Sakharov
881e797e8b
We are moving EVM to radare2-extras
2017-11-21 01:31:05 +01:00
Sven Steinbauer
ab845480b1
Fix push and call ops for 64 bit extended regs ( #8837 )
...
* Fix push and call ops for 64 bit extended regs
Tests pushed to r2r master
* Remove undeed reg variable
2017-11-15 10:42:37 -05:00
Maijin
4bb5c15faa
r_lib_struct_t -> RLibStruct
2017-11-10 13:38:05 +01:00
pancake
692f94e058
Add spaces around *
2017-11-05 03:42:25 +01:00
pancake
9a0b0fb74d
Fix tms320 warnings
2017-10-30 13:35:30 +01:00
Sven Steinbauer
4dec5d5120
More mov fixes if operand 1 is eax/rax ( #8732 )
2017-10-24 16:45:56 +02:00
Sven Steinbauer
7a3824d07f
Fix up mov op ( #8730 )
...
Fixes for mov op for both 32 and 64 bit. Mostly involving memory
references for second operand and memory offsets
rip relative addressing fixed
FIX #8701
FIX #8722
FIX #8723
2017-10-23 14:05:16 +02:00
Sven Steinbauer
68bd7fd0aa
Correctly assemble displacement only addresses ( #8705 )
...
FIX #8701
2017-10-18 11:12:59 +02:00
pancake
52b1526443
Fix crash in wasm disassembler
2017-10-11 19:02:25 +02:00
Pepe Vila
5c3cdb44d5
Fixed coverity errors ( #8595 )
2017-09-30 10:50:14 +02:00
pancake
aa7989de88
Address dalvik disasm comments in #8590
2017-09-29 12:51:09 +02:00
josediazfer
2328c5d31f
Fix serveral leaks ( #8606 )
2017-09-28 16:32:54 +02:00
Jose Diaz
16905517ad
leak parseOpcode() asm_x86_nz.c
2017-09-28 12:13:58 +08:00
pancake
3326b933dd
Fix #8590 - Thanks @igasparis
2017-09-27 03:49:10 +02:00
pancake
71a6177b8a
Fixes for the gdb-avr backend, lower min pkgtsz and fix tid<1 issue
2017-09-25 10:47:27 +02:00
Sven Steinbauer
0e6a0946d6
Compile extended mov commands
...
FIX #8543
2017-09-20 18:11:00 +08:00
pancake
f805d0672a
Fix warnings
2017-09-17 23:27:43 +02:00
pancake
9bc246c5e9
Fix riscv again :(
2017-09-17 23:14:34 +02:00
pancake
ef201b6c92
Fix riscv disassembler for 2 byte buffer as input
2017-09-17 22:58:13 +02:00
pancake
6da1fa47bf
Fix crash in dd A, dd .,,.,,, and in V||| and V```...
2017-09-15 16:59:51 +02:00
xarkes
861648ad49
Renamed sdb models to .sdb.txt ( #8463 )
2017-09-13 09:20:34 +02:00
Pepe Vila
cbbe87bf3f
Wasm fixes ( #8492 )
2017-09-13 08:51:23 +02:00
Sven Steinbauer
baf9027548
Add ldp op to arm64 ( #8491 )
2017-09-12 18:16:24 +02:00
Sven Steinbauer
d09adae6d2
Add arm64 stp instruction ( #8490 )
2017-09-12 17:29:39 +02:00
Sven Steinbauer
86a3aa92b6
Fix asm rep ops from within r2 ( #8485 )
2017-09-12 12:45:37 +02:00
Sven Steinbauer
cb1ca045a7
Fix rep ops
...
FIX #8439
2017-09-08 13:09:39 +02:00
Sven Steinbauer
bba6bac475
Fix asembly of cdqe for 64 and 32bit
...
FIX #8427
2017-09-07 16:43:05 +08:00
Fangrui Song
e472e74b9d
Move {RAsm,RAnal}::addrbytes to RIO::addrbytes, delete asm.addrbytes and make cLEMENCy work again ( #8432 )
2017-09-04 21:41:09 +02:00
Giovanni
2740763886
Merging all cov fixes ( #8377 )
...
* 1356272 Resource leak
* 1356452,1356450 Resource leak
* flavour + strdup and fixed mistake
* 1361500 Resource leak
* 1360784 Resource leak
* 1367821 Resource leak
* removed missing allocated vars
2017-08-29 13:15:47 +02:00
Fangrui Song
277ea0dcb4
Fix memory leak in rasm2 by moving ownership of syscall from RAnal to RAsm
...
- Move null chk into the r_syscall_free
2017-08-29 12:42:49 +02:00
pancake
3f94f69e60
Enhance error checking in om and avoid adding the same map twice
2017-08-26 23:33:27 +02:00
pancake
306adb7a50
Fix for the whitespace disassembler
2017-08-26 12:56:14 +02:00
Giovanni
6fe6564b8d
Fixed 8 coverity bugs ( #8305 )
...
* 1372278 Identical code for different branches
* 1372276 Dereference after null check
* 1372273 Logically dead code
DEAD CODE. i must be between 1 and 9.
* 1372272 Logically dead code
At condition 64U - slen > 64U, the value of slen must be between 1 and 63.
At condition 64U - slen > 64U, the value of slen cannot be equal to 0.
The condition 64U - slen > 64U cannot be true.
* 1372265 Dereference after null check
* 1372264 Logically dead code
* 1372262 Logically dead code
* 1372258 Logically dead code
* 1372257 Unchecked return value
2017-08-25 18:12:12 +02:00
Giovanni
7b40f7aed1
16 more bugs fixed. most are mem leaks. ( #8307 )
...
* 1379261/1379262 Resource leak
* 1379258/1379249 Resource leak
* 1379020 Resource leak
* 1351565/1351564 Logically dead code, 1379019 Uninitialized scalar variable, 1379014 Operands do not affect result
* 1379017 Resource leak
* 1379016 Resource leak
* 1379015 Resource leak
* 1377414 Resource leak
* 1376336 Resource leak
* 1375800 Resource leak
* 1373505/1373509/1373504 Resource leak
* 1373496 Resource leak
2017-08-24 17:20:39 +02:00
Giovanni
3851e7ea20
13 coverity bugs fixed. ( #8303 )
...
* 1372431 Unused value
* 1372425 Unused value
* 1372412 Dereference before null check
* 1372410/1372409 Resource leak
* 1372400 Dereference before null check
* 1372391/1372398 Resource leak
* 1372397 Dereference before null check
* 1372394 Resource leak
* 1372390 Dereference before null check
* 1372379 Dereference before null check
* 1372304 Resource leak
* 1372298: Out-of-bounds read & 1355090: Untrusted array index read
* 1372290 Dereference null return value
* 1372283 Missing break in switch
* fixed mistake.
2017-08-24 13:31:27 +02:00
Sven Steinbauer
941c48a477
Assemble group1 ops with large offset for 64bits correctly ( #8281 )
...
FIX #8276
2017-08-23 11:32:31 +02:00
Sven Steinbauer
2f2d597318
Fix jmp with pointer values and offsets ( #8267 )
2017-08-22 20:13:02 +02:00
Sven Steinbauer
bf6596f5d4
Add support for 32bit extended regs to mov ( #8265 )
...
FIX #8251
2017-08-22 20:12:30 +02:00
Giovanni
b645c7fd1a
fixed wrong check on vle that was causing some wrong output ( #8254 )
2017-08-22 01:12:36 +02:00
Sven Steinbauer
1064fdba62
Refuse to assemble group 1 ops with dwords on 64bit ( #8257 )
...
FIX #268
2017-08-22 01:12:11 +02:00
pancake
f9073c1979
Fix some warns and off by 1 in x86.nz
2017-08-19 16:19:13 +02:00
pancake
0771170ae6
Kill io.sectonly and make io.va work as expected
2017-08-19 13:26:51 +02:00
Lowly Worm
5e70e0f8b6
update incorrect FSF addresses
...
closes #8123
2017-08-15 22:28:30 -07:00
Lowly Worm
239dd49e30
add optional "asm.armimm" to display # for immediates in arm disassembly
2017-08-15 17:47:43 -07:00
Sven Steinbauer
746eb01344
Fix short jumps for 16bit x86.nz ( #8220 )
...
FIX #8219
2017-08-15 18:45:31 +02:00
Sven Steinbauer
82faa73e9b
Fix missing error on bad args for x86.nz ( #8216 )
2017-08-15 10:54:19 +02:00
Sven Steinbauer
486ccda82f
Add rep ops to x86 ( #8210 )
2017-08-14 12:25:26 +02:00
Fangrui Song
31be3d3ba7
Add instruction descriptions from Intel Instruction Set Reference Volume 2 ( #8209 )
...
The descriptions are taken from https://github.com/HJLebbink/x86doc
2017-08-14 11:14:19 +02:00
Sven Steinbauer
c9ff94d092
Fix x86 compiler warnings ( #8192 )
2017-08-11 13:18:29 +02:00
pancake
b5c678ff6d
Fix last 3 mails of covs and some warnings
2017-08-11 13:16:19 +02:00
Sven Steinbauer
fd16338b21
Squash arm64 compiler warnings ( #8179 )
2017-08-10 18:34:25 +02:00
Sven Steinbauer
2a685cba5b
Support 8bit REX regs
...
fix #8097
2017-08-09 22:33:13 +02:00
Fangrui Song
beba22e6c7
Fix backward disassembler when len > addr and support asm.addrbytes ( #8145 )
2017-08-08 18:25:44 +02:00
Sven Steinbauer
6c666bf142
New arm64 instruction support ( #8140 )
...
* Add cmp for reg, reg
* Add strb instruction to arm64
* Add b.eq instruction arm64
* Add byte store ops
* Add str and ldr ops
2017-08-07 13:42:46 +02:00
pancake
b6958c922e
Fix #8139 - Fix null deref in format string in the LANAI disassembler
2017-08-07 12:02:50 +02:00
Isaac
e82a40ac78
Implement not instruction in the x86.nz assembler
2017-08-06 03:07:55 +02:00
pancake
e358a3fe90
Fix arm64 opcode parser in armass64
2017-08-06 03:01:57 +02:00
Fangrui Song
f91e3d259c
Add asm.addrbytes
eval config var to make one vaddr unit use more than 1 bytes ( #8121 )
...
* Add `asm.addrbytes` eval config var to make one vaddr unit use more than 1 bytes
* Use `asm.addrbytes` in anal/disasm
2017-08-05 12:20:17 +02:00
pancake
48f1bb0842
Implement loop instruction in the x86.nz assembler
2017-08-02 23:57:23 +02:00
Sven Steinbauer
c7b3a1e2e7
Fix #8008 output for register offset with register ( #8102 )
2017-08-02 12:11:35 +02:00
Ben Gardiner
3aff806fcb
Fix #8095 rasm2 x64 bswap issue #8095 ( #8096 )
2017-08-02 00:54:34 +02:00
Sven Steinbauer
dcad605335
Allow for 32bit only ops in x86 ( #8092 )
2017-08-01 18:22:20 +02:00
Sven Steinbauer
1426a73032
Add move
, bal
, bgezal
, and bltzal
mips instructions ( #8090 )
...
* Add `move`, `bal`, `bgezal`, and `bltzal` mips instructions
* Only divide immediate on branch ops
2017-08-01 18:17:33 +02:00
Anton Kochkov
e52447c9ea
NEC V850 - Initial ESIL support ( #8082 )
2017-08-01 14:32:52 +02:00
Marc
5da2238b7b
Remove debug eprintf
2017-08-01 10:23:10 +02:00
pancake
0140bf07b3
Add some more instructions for the mips assembler
2017-08-01 06:01:52 +02:00
Marc
6aec198df7
Add DEX38 support
2017-08-01 05:00:48 +02:00
pancake
6d953c3b33
Implement adrp instruction for arm64
2017-08-01 04:35:14 +02:00
Sven Steinbauer
3f3dd45431
fixes for nz assembler ( #8073 )
2017-07-31 18:28:57 +02:00
Sven Steinbauer
b21fc94871
Fix segfault on arm64 brk ( #8071 )
2017-07-31 14:52:13 +02:00
Sven Steinbauer
10d651202f
Fix bad mov op as invalid ( #8065 )
...
FIX #8007
2017-07-31 11:34:50 +02:00
SkUaTeR
e7a2f2cc8c
fix a wrong definition to call GetLongPathName and fix for #8044 ( #8053 )
...
* fix a wrong definition to call GetLongPathName
* fixing ppc arch
* fixing export issue in PE files
2017-07-29 02:07:42 +02:00
Anton Kochkov
00be0a19d3
Init bitshift upon creation
2017-07-28 19:33:16 +08:00
pancake
807402e123
Fix testsuite and remove commented code
2017-07-28 04:39:20 +02:00
pancake
c33c4dae82
Initial support for bitsized disassemblers
2017-07-28 02:53:31 +02:00
pancake
abaac71290
Fix last covs
2017-07-26 18:46:29 +02:00
Anton Kochkov
41e21634ab
Coverifixes ( #8026 )
2017-07-26 14:41:03 +08:00
Giovanni
858dfea170
Fix #6411 - pseudo for AVR ( #7978 )
...
* avr.pseudo
* tabs and flavour
2017-07-20 21:36:26 +02:00
Guillaume Valadon
ea8adc48da
Use void in prototypes ( #7974 )
2017-07-20 14:50:13 +02:00
Guillaume Valadon
a8ad435c10
Typos fixed ( #7970 )
2017-07-20 10:44:43 +02:00
Fangrui Song
9ca10e175e
Fix powerpc64le analysis. ( #7955 )
2017-07-19 14:19:51 +02:00
Sven Steinbauer
5e22336a1d
Group1 op fixes for 16bit regs ( #7957 )
...
* Add support for 16bit regs for group 1 ops
* Fix other group1 ops
* Revert changed test for AL
2017-07-19 13:54:49 +02:00
pancake
770f3e752f
Fix #7932 - Support relative addresses in java assembler
2017-07-17 12:17:53 +02:00
Fangrui Song
c77aba1c63
PPC: Add all instructions from Power ISA 3.0B ( #7922 )
2017-07-14 10:09:28 +02:00
Marc
80d4b44b2e
Fix random code style issues
2017-07-13 00:46:27 +02:00
pancake
abaf84d857
Fix last pending warnings
2017-07-11 17:54:22 +02:00
Giovanni
59d6141658
Coverity patch for VLE ( #7904 )
2017-07-11 11:25:32 +02:00
pancake
19b41bec5c
Fix last covs
2017-07-11 08:46:42 +02:00
Giovanni
326fa654fc
PowerPC VLE support with capstone [anal/asm] ( #7899 )
...
* libvle + capstone to support PowerPC VLE
2017-07-10 18:06:11 +02:00
pancake
1b6cfb68bd
Fix some memleaks, warnings and null derefs pointed out by clang analyzer
2017-07-10 11:20:03 +02:00
pancake
befd046c05
Implement evm assembler, simplify disassembler
2017-07-09 01:54:56 +02:00
pancake
b599bd3dcc
Initial support for EVM (The Ethereum Virtual Machine)
2017-07-09 00:53:26 +02:00
Nils Berg
df82290e43
cast immediate values to unsigned char instead of char ( #7871 )
...
for compilers that default to signed char, wrong values were generated by this cast
example:
$ # before
$ rasm2 -a sh -d 'ffc8'
tst 0xFFFFFFFF,r0
$ # after
$ rasm2 -a sh -d 'ffc8'
tst 0xFF,r0
2017-07-07 00:31:37 +02:00
pancake
50643229e7
Make Vb run dbs like key.f2 for consistency
2017-07-02 23:37:13 +02:00
Sven Steinbauer
c97d11b1f9
Fix pass by value errors from scan ( #7842 )
2017-06-30 17:40:27 +02:00
SkUaTeR
c31d81da26
support for static build ( #7822 )
...
* support for static build
* improved sharard/static build
2017-06-28 22:54:40 +02:00
Sven Steinbauer
6283f7ecfc
Fix and refactor imul for x86.nz ( #7832 )
...
* Fix and refactor imul for x86.nz
The imul op wasn't correctly supported in x86.nz so decided to update
and refactor it. It now supports all operand numbers and combinations as
per the docs.
* Remove dead code
2017-06-28 13:54:15 +02:00
Adrian Studer
c1cb93aaf8
set ptr and val to correct values ( #7817 )
2017-06-25 17:03:25 +02:00
pancake
87fe418092
Fix #7706 - Enhance the Java assembler
2017-06-24 19:58:48 +02:00
Adrian Studer
e1da08a4e8
8051 decode bit address ( #7812 )
...
* decode bit addresses
* fix op length for xrl a,r and anl a,r
2017-06-24 10:24:06 -05:00
Adrian Studer
c49f668099
fix 8051 addr11 and mov dir,dir ( #7793 )
2017-06-21 06:38:09 -05:00
Sven Steinbauer
96c7fe5589
Fix 64bit lea instruction in nz ( #7795 )
...
FIX #7788
2017-06-21 06:33:16 -05:00
xarkes
ca5a68ebb3
Adding files to meson + windows env refactor
2017-06-20 18:03:30 +08:00
Adrian Studer
673fa9636f
Rewritten 8051 disassembler
2017-06-18 10:23:04 +02:00
Lennart Braun
a6ec3b6d89
Fix regression with capstone 3 ( #7757 )
...
The option CS_OPT_UNSIGNED is part of capstone-next and not available in capstone 3.
It is used in radare2 since 0b4eb17
.
2017-06-16 20:44:40 +02:00
pancake
0b4eb1740c
Update the capstone-x86-unsigned patch
2017-06-15 10:07:20 +02:00
propaganda
b3ee74dacd
fix cs_open()-without-cs_close() memory leak in disassemble() by uncommenting //cs_close()
2017-06-15 09:06:22 +02:00
xarkes
46deac0dde
Fixing appveyor build ( #7735 )
2017-06-14 13:45:48 +02:00
pancake
54150fa3db
Fix last covs
2017-06-12 11:28:54 +02:00
pancake
dfe3cb8305
Honor asm.flags in prc
2017-06-10 17:47:26 +02:00
pancake
aad2d70552
Fix some warnings
2017-06-09 03:22:18 -11:00
pancake
0037ec0b78
Minor tweaks for this hexagon support
2017-06-07 11:54:00 +02:00
pancake
39542af604
Initial support for the Hexagon CPU (ripped from a binutils fork from 2013)
...
https://www.spinics.net/lists/linux-hexagon/msg00363.html
2017-06-07 11:43:24 +02:00
pancake
6a9b0430db
Fix disasm crash in r2_ir_dalvik_disassemble
2017-06-05 12:42:35 +02:00
Lennart Braun
e1dc11bccd
Fix regression with capstone 3 ( #7666 )
...
The constant CS_MODE_MIPS2 is introduced in a patch for capstone-next
(added in 1c6ee8dd3a
) and will not be available in capstone 3.
2017-06-03 18:18:05 +02:00
Francesco Tamagni
1c6ee8dd3a
Honor cpu on anal_mips_cs and add/fix some mips64 instruction ( #7643 )
...
* Honor cpu on anal_mips_cs and add/fix some mips64 instruction
* Add mips2 capstone patch
* mips: add v2 cpu, remove 64v2, mips32/64 is default
2017-06-01 18:18:15 +02:00