llvm-mirror/test/CodeGen/ARM/phi.ll

; RUN: llc -march=arm -mattr=+v4t < %s | FileCheck %s
; <rdar://problem/8686347>

define i32 @test1(i1 %a, i32* %b) {
; CHECK: test1
entry:
  br i1 %a, label %lblock, label %rblock

lblock:
  %lbranch = getelementptr i32* %b, i32 1
  br label %end

rblock:
  %rbranch = getelementptr i32* %b, i32 1
  br label %end
  
end:
; CHECK: ldr	r0, [r1, #4]
  %gep = phi i32* [%lbranch, %lblock], [%rbranch, %rblock]
  %r = load i32* %gep
; CHECK-NEXT: bx	lr
  ret i32 %r
}
Change some ARM subtarget features to be single bit yes/no in order to sink them down to MC layer. Also fix tests. llvm-svn: 134590 2011-07-07 03:55:05 +00:00			`; RUN: llc -march=arm -mattr=+v4t < %s \| FileCheck %s`
Add a test for CodeGenPrepare's ability to look through PHI nodes when performing addressing mode folding, introduced in r119853. llvm-svn: 119857 2010-11-19 22:34:53 +00:00			`; <rdar://problem/8686347>`

			`define i32 @test1(i1 %a, i32* %b) {`
			`; CHECK: test1`
			`entry:`
			`br i1 %a, label %lblock, label %rblock`

			`lblock:`
			`%lbranch = getelementptr i32* %b, i32 1`
			`br label %end`

			`rblock:`
			`%rbranch = getelementptr i32* %b, i32 1`
			`br label %end`

			`end:`
			`; CHECK: ldr r0, [r1, #4]`
			`%gep = phi i32* [%lbranch, %lblock], [%rbranch, %rblock]`
			`%r = load i32* %gep`
			`; CHECK-NEXT: bx lr`
			`ret i32 %r`
Change some ARM subtarget features to be single bit yes/no in order to sink them down to MC layer. Also fix tests. llvm-svn: 134590 2011-07-07 03:55:05 +00:00			`}`