2006-09-04 04:16:09 +00:00
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//===-- LLVMTargetMachine.cpp - Implement the LLVMTargetMachine class -----===//
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//
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// The LLVM Compiler Infrastructure
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//
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2007-12-29 20:36:04 +00:00
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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2006-09-04 04:16:09 +00:00
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the LLVMTargetMachine class.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/PassManager.h"
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2010-02-12 10:34:29 +00:00
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#include "llvm/Analysis/Verifier.h"
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2007-03-31 00:24:43 +00:00
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#include "llvm/Assembly/PrintModulePass.h"
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2009-08-13 23:48:47 +00:00
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#include "llvm/CodeGen/AsmPrinter.h"
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2009-07-31 18:16:33 +00:00
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#include "llvm/CodeGen/MachineFunctionAnalysis.h"
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2010-03-13 20:55:24 +00:00
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#include "llvm/CodeGen/MachineModuleInfo.h"
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#include "llvm/CodeGen/GCStrategy.h"
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#include "llvm/CodeGen/Passes.h"
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2006-09-04 04:16:09 +00:00
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#include "llvm/Target/TargetOptions.h"
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2009-08-22 20:48:53 +00:00
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#include "llvm/MC/MCAsmInfo.h"
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2010-02-02 23:37:42 +00:00
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#include "llvm/MC/MCStreamer.h"
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#include "llvm/Target/TargetData.h"
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2009-07-15 23:48:37 +00:00
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#include "llvm/Target/TargetRegistry.h"
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2006-09-04 04:16:09 +00:00
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#include "llvm/Transforms/Scalar.h"
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2010-02-02 23:45:17 +00:00
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#include "llvm/ADT/OwningPtr.h"
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2007-03-31 00:24:43 +00:00
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#include "llvm/Support/CommandLine.h"
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2010-01-04 22:33:16 +00:00
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#include "llvm/Support/Debug.h"
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2009-07-14 20:18:05 +00:00
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#include "llvm/Support/FormattedStream.h"
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2006-09-04 04:16:09 +00:00
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using namespace llvm;
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2008-09-25 01:14:49 +00:00
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namespace llvm {
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bool EnableFastISel;
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}
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2009-11-04 19:57:50 +00:00
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static cl::opt<bool> DisablePostRA("disable-post-ra", cl::Hidden,
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cl::desc("Disable Post Regalloc"));
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static cl::opt<bool> DisableBranchFold("disable-branch-fold", cl::Hidden,
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cl::desc("Disable branch folding"));
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2009-11-26 00:32:21 +00:00
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static cl::opt<bool> DisableTailDuplicate("disable-tail-duplicate", cl::Hidden,
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cl::desc("Disable tail duplication"));
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2010-01-16 00:29:50 +00:00
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static cl::opt<bool> DisableEarlyTailDup("disable-early-taildup", cl::Hidden,
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cl::desc("Disable pre-register allocation tail duplication"));
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2009-11-04 19:57:50 +00:00
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static cl::opt<bool> DisableCodePlace("disable-code-place", cl::Hidden,
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cl::desc("Disable code placement"));
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static cl::opt<bool> DisableSSC("disable-ssc", cl::Hidden,
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cl::desc("Disable Stack Slot Coloring"));
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static cl::opt<bool> DisableMachineLICM("disable-machine-licm", cl::Hidden,
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cl::desc("Disable Machine LICM"));
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2010-04-17 06:47:47 +00:00
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static cl::opt<bool> DisablePostRAMachineLICM("disable-postra-machine-licm",
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cl::Hidden,
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cl::desc("Disable Machine LICM"));
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2009-11-04 19:57:50 +00:00
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static cl::opt<bool> DisableMachineSink("disable-machine-sink", cl::Hidden,
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cl::desc("Disable Machine Sinking"));
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static cl::opt<bool> DisableLSR("disable-lsr", cl::Hidden,
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cl::desc("Disable Loop Strength Reduction Pass"));
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static cl::opt<bool> DisableCGP("disable-cgp", cl::Hidden,
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cl::desc("Disable Codegen Prepare"));
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2007-06-19 05:47:49 +00:00
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static cl::opt<bool> PrintLSR("print-lsr-output", cl::Hidden,
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cl::desc("Print LLVM IR produced by the loop-reduce pass"));
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static cl::opt<bool> PrintISelInput("print-isel-input", cl::Hidden,
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cl::desc("Print LLVM IR input to isel pass"));
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2008-01-07 01:33:09 +00:00
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static cl::opt<bool> PrintGCInfo("print-gc", cl::Hidden,
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cl::desc("Dump garbage collector data"));
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2010-05-18 17:22:19 +00:00
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static cl::opt<bool> ShowMCEncoding("show-mc-encoding", cl::Hidden,
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cl::desc("Show encoding in .s output"));
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static cl::opt<bool> ShowMCInst("show-mc-inst", cl::Hidden,
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cl::desc("Show instruction structure in .s output"));
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2010-05-23 17:44:06 +00:00
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static cl::opt<bool> EnableMCLogging("enable-mc-api-logging", cl::Hidden,
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cl::desc("Enable MC API logging"));
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2009-05-16 00:33:53 +00:00
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static cl::opt<bool> VerifyMachineCode("verify-machineinstrs", cl::Hidden,
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cl::desc("Verify generated machine code"),
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cl::init(getenv("LLVM_VERIFY_MACHINEINSTRS")!=NULL));
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2007-06-19 05:47:49 +00:00
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2010-02-02 22:54:51 +00:00
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static cl::opt<cl::boolOrDefault>
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AsmVerbose("asm-verbose", cl::desc("Add comments to directives."),
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cl::init(cl::BOU_UNSET));
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2010-02-02 22:58:13 +00:00
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static bool getVerboseAsm() {
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2010-02-02 22:54:51 +00:00
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switch (AsmVerbose) {
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2010-02-02 22:58:13 +00:00
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default:
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case cl::BOU_UNSET: return TargetMachine::getAsmVerbosityDefault();
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case cl::BOU_TRUE: return true;
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case cl::BOU_FALSE: return false;
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2010-02-02 22:54:51 +00:00
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}
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}
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2010-01-13 00:30:23 +00:00
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2008-10-01 20:39:19 +00:00
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// Enable or disable FastISel. Both options are needed, because
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// FastISel is enabled by default with -fast, and we wish to be
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2009-08-26 15:57:57 +00:00
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// able to enable or disable fast-isel independently from -O0.
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2008-10-07 23:00:56 +00:00
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static cl::opt<cl::boolOrDefault>
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2008-10-01 20:39:19 +00:00
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EnableFastISelOption("fast-isel", cl::Hidden,
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2009-08-26 15:57:57 +00:00
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cl::desc("Enable the \"fast\" instruction selector"));
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2008-09-25 01:14:49 +00:00
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2009-11-20 02:03:44 +00:00
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// Enable or disable an experimental optimization to split GEPs
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// and run a special GVN pass which does not examine loads, in
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// an effort to factor out redundancy implicit in complex GEPs.
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static cl::opt<bool> EnableSplitGEPGVN("split-gep-gvn", cl::Hidden,
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cl::desc("Split GEPs and run no-load GVN"));
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2009-08-12 07:22:17 +00:00
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LLVMTargetMachine::LLVMTargetMachine(const Target &T,
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2010-03-11 01:34:27 +00:00
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const std::string &Triple)
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: TargetMachine(T), TargetTriple(Triple) {
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2009-08-12 07:22:17 +00:00
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AsmInfo = T.createAsmInfo(TargetTriple);
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}
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2009-12-21 08:15:29 +00:00
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// Set the default code model for the JIT for a generic target.
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// FIXME: Is small right here? or .is64Bit() ? Large : Small?
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2010-03-12 18:44:54 +00:00
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void LLVMTargetMachine::setCodeModelForJIT() {
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2009-12-21 08:15:29 +00:00
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setCodeModel(CodeModel::Small);
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}
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2009-08-12 07:22:17 +00:00
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2009-12-21 08:15:29 +00:00
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// Set the default code model for static compilation for a generic target.
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2010-03-12 18:44:54 +00:00
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void LLVMTargetMachine::setCodeModelForStatic() {
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2009-12-21 08:15:29 +00:00
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setCodeModel(CodeModel::Small);
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}
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2009-08-12 07:22:17 +00:00
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2010-02-03 05:55:08 +00:00
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bool LLVMTargetMachine::addPassesToEmitFile(PassManagerBase &PM,
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formatted_raw_ostream &Out,
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CodeGenFileType FileType,
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2010-02-28 00:41:59 +00:00
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CodeGenOpt::Level OptLevel,
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bool DisableVerify) {
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2008-09-25 00:37:07 +00:00
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// Add common CodeGen passes.
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2010-03-13 20:55:24 +00:00
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MCContext *Context = 0;
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if (addCommonCodeGenPasses(PM, OptLevel, DisableVerify, Context))
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2010-02-03 05:55:08 +00:00
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return true;
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2010-03-13 20:55:24 +00:00
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assert(Context != 0 && "Failed to get MCContext");
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2007-02-08 01:36:53 +00:00
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2010-03-11 22:53:35 +00:00
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const MCAsmInfo &MAI = *getMCAsmInfo();
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2010-02-02 23:45:17 +00:00
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OwningPtr<MCStreamer> AsmStreamer;
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2006-09-04 04:16:09 +00:00
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switch (FileType) {
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2010-02-03 05:55:08 +00:00
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default: return true;
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2010-02-03 00:29:55 +00:00
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case CGFT_AssemblyFile: {
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MCInstPrinter *InstPrinter =
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2010-04-04 05:04:31 +00:00
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getTarget().createMCInstPrinter(MAI.getAssemblerDialect(), MAI);
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2010-05-18 17:22:19 +00:00
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// Create a code emitter if asked to show the encoding.
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//
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// FIXME: These are currently leaked.
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MCCodeEmitter *MCE = 0;
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if (ShowMCEncoding)
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MCE = getTarget().createCodeEmitter(*this, *Context);
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2010-03-12 18:28:53 +00:00
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AsmStreamer.reset(createAsmStreamer(*Context, Out,
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2010-02-02 23:45:17 +00:00
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getTargetData()->isLittleEndian(),
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2010-02-03 00:29:55 +00:00
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getVerboseAsm(), InstPrinter,
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2010-05-18 17:22:19 +00:00
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MCE, ShowMCInst));
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2010-02-02 19:14:27 +00:00
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break;
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2010-02-03 00:29:55 +00:00
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}
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2010-02-02 23:57:42 +00:00
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case CGFT_ObjectFile: {
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// Create the code emitter for the target if it exists. If not, .o file
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// emission fails.
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2010-05-14 07:47:51 +00:00
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//
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// FIXME: These are currently leaked.
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2010-02-12 23:12:47 +00:00
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MCCodeEmitter *MCE = getTarget().createCodeEmitter(*this, *Context);
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2010-03-11 01:34:27 +00:00
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TargetAsmBackend *TAB = getTarget().createAsmBackend(TargetTriple);
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if (MCE == 0 || TAB == 0)
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2010-02-03 05:55:08 +00:00
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return true;
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2010-05-26 21:48:55 +00:00
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AsmStreamer.reset(getTarget().createObjectStreamer(TargetTriple, *Context,
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*TAB, Out, MCE,
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hasMCRelaxAll()));
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2010-02-02 23:57:42 +00:00
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break;
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2010-02-02 18:44:12 +00:00
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}
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2010-02-03 05:55:08 +00:00
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case CGFT_Null:
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// The Null output is intended for use for performance analysis and testing,
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// not real users.
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AsmStreamer.reset(createNullStreamer(*Context));
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break;
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2006-09-04 04:16:09 +00:00
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}
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2010-05-23 17:44:06 +00:00
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if (EnableMCLogging)
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AsmStreamer.reset(createLoggingStreamer(AsmStreamer.take(), errs()));
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2010-03-13 20:55:24 +00:00
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// Create the AsmPrinter, which takes ownership of AsmStreamer if successful.
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2010-04-04 08:18:47 +00:00
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FunctionPass *Printer = getTarget().createAsmPrinter(*this, *AsmStreamer);
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2010-02-02 23:45:17 +00:00
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if (Printer == 0)
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2010-02-03 05:55:08 +00:00
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return true;
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2010-02-02 23:45:17 +00:00
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2010-03-13 20:55:24 +00:00
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// If successful, createAsmPrinter took ownership of AsmStreamer.
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AsmStreamer.take();
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2010-02-02 23:45:17 +00:00
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PM.add(Printer);
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2009-12-21 08:15:29 +00:00
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// Make sure the code model is set.
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setCodeModelForStatic();
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2009-07-06 05:09:34 +00:00
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PM.add(createGCInfoDeleter());
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2010-02-03 05:55:08 +00:00
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return false;
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2008-09-25 00:37:07 +00:00
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}
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2009-05-30 20:51:52 +00:00
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/// addPassesToEmitMachineCode - Add passes to the specified pass manager to
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2010-02-02 22:31:11 +00:00
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/// get machine code emitted. This uses a JITCodeEmitter object to handle
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2009-05-30 20:51:52 +00:00
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/// actually outputting the machine code and resolving things like the address
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/// of functions. This method should returns true if machine code emission is
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/// not supported.
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///
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bool LLVMTargetMachine::addPassesToEmitMachineCode(PassManagerBase &PM,
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JITCodeEmitter &JCE,
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2010-02-28 00:41:59 +00:00
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CodeGenOpt::Level OptLevel,
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bool DisableVerify) {
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2009-12-21 08:15:29 +00:00
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// Make sure the code model is set.
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setCodeModelForJIT();
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2009-05-30 20:51:52 +00:00
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// Add common CodeGen passes.
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2010-03-13 20:55:24 +00:00
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MCContext *Ctx = 0;
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if (addCommonCodeGenPasses(PM, OptLevel, DisableVerify, Ctx))
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2009-05-30 20:51:52 +00:00
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return true;
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2009-07-15 22:33:19 +00:00
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addCodeEmitter(PM, OptLevel, JCE);
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2009-05-30 20:51:52 +00:00
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PM.add(createGCInfoDeleter());
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return false; // success!
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}
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2010-03-13 20:55:24 +00:00
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static void printNoVerify(PassManagerBase &PM, const char *Banner) {
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2010-03-05 21:49:13 +00:00
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if (PrintMachineCode)
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PM.add(createMachineFunctionPrinterPass(dbgs(), Banner));
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}
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2009-05-16 00:33:53 +00:00
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static void printAndVerify(PassManagerBase &PM,
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2009-10-31 20:17:39 +00:00
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const char *Banner,
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2009-05-16 00:33:53 +00:00
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bool allowDoubleDefs = false) {
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if (PrintMachineCode)
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2010-01-04 22:33:16 +00:00
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PM.add(createMachineFunctionPrinterPass(dbgs(), Banner));
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2009-05-16 00:33:53 +00:00
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if (VerifyMachineCode)
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PM.add(createMachineVerifierPass(allowDoubleDefs));
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}
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2009-04-29 23:29:43 +00:00
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/// addCommonCodeGenPasses - Add standard LLVM codegen passes used for both
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/// emitting to assembly files or machine code output.
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2008-09-25 00:37:07 +00:00
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///
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2009-04-29 00:15:41 +00:00
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bool LLVMTargetMachine::addCommonCodeGenPasses(PassManagerBase &PM,
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2010-02-28 00:41:59 +00:00
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CodeGenOpt::Level OptLevel,
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2010-03-13 20:55:24 +00:00
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bool DisableVerify,
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MCContext *&OutContext) {
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2006-09-04 04:16:09 +00:00
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// Standard LLVM-Level Passes.
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2008-09-25 00:37:07 +00:00
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2010-02-28 00:41:59 +00:00
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// Before running any passes, run the verifier to determine if the input
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// coming from the front-end and/or optimizer is valid.
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if (!DisableVerify)
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PM.add(createVerifierPass());
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2009-11-20 02:03:44 +00:00
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// Optionally, tun split-GEPs and no-load GVN.
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if (EnableSplitGEPGVN) {
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PM.add(createGEPSplitterPass());
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2010-02-26 18:35:19 +00:00
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PM.add(createGVNPass(/*NoLoads=*/true));
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2009-11-20 02:03:44 +00:00
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}
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2006-09-04 04:16:09 +00:00
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// Run loop strength reduction before anything else.
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2009-11-04 19:57:50 +00:00
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if (OptLevel != CodeGenOpt::None && !DisableLSR) {
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2007-03-31 04:18:03 +00:00
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PM.add(createLoopStrengthReducePass(getTargetLowering()));
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if (PrintLSR)
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2010-01-04 22:33:16 +00:00
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PM.add(createPrintFunctionPass("\n\n*** Code after LSR ***\n", &dbgs()));
|
2007-03-31 04:18:03 +00:00
|
|
|
}
|
2008-09-25 00:37:07 +00:00
|
|
|
|
2009-05-22 20:36:31 +00:00
|
|
|
// Turn exception handling constructs into something the code generators can
|
|
|
|
// handle.
|
2010-03-13 20:55:24 +00:00
|
|
|
switch (getMCAsmInfo()->getExceptionHandlingType()) {
|
2009-08-11 00:09:57 +00:00
|
|
|
case ExceptionHandling::SjLj:
|
2009-08-17 16:41:22 +00:00
|
|
|
// SjLj piggy-backs on dwarf for this bit. The cleanups done apply to both
|
2010-01-14 21:38:31 +00:00
|
|
|
// Dwarf EH prepare needs to be run after SjLj prepare. Otherwise,
|
|
|
|
// catch info can get misplaced when a selector ends up more than one block
|
|
|
|
// removed from the parent invoke(s). This could happen when a landing
|
|
|
|
// pad is shared by multiple invokes and is also a target of a normal
|
|
|
|
// edge from elsewhere.
|
2009-08-17 16:41:22 +00:00
|
|
|
PM.add(createSjLjEHPass(getTargetLowering()));
|
2010-04-19 19:05:59 +00:00
|
|
|
PM.add(createDwarfEHPass(this, OptLevel==CodeGenOpt::None));
|
2009-08-17 16:41:22 +00:00
|
|
|
break;
|
2009-08-11 00:09:57 +00:00
|
|
|
case ExceptionHandling::Dwarf:
|
2010-04-19 19:05:59 +00:00
|
|
|
PM.add(createDwarfEHPass(this, OptLevel==CodeGenOpt::None));
|
2009-08-11 00:09:57 +00:00
|
|
|
break;
|
|
|
|
case ExceptionHandling::None:
|
|
|
|
PM.add(createLowerInvokePass(getTargetLowering()));
|
|
|
|
break;
|
|
|
|
}
|
2009-05-22 20:36:31 +00:00
|
|
|
|
|
|
|
PM.add(createGCLoweringPass());
|
2008-09-25 00:37:07 +00:00
|
|
|
|
2006-09-04 04:16:09 +00:00
|
|
|
// Make sure that no unreachable blocks are instruction selected.
|
|
|
|
PM.add(createUnreachableBlockEliminationPass());
|
2007-02-08 01:36:53 +00:00
|
|
|
|
2009-11-04 19:57:50 +00:00
|
|
|
if (OptLevel != CodeGenOpt::None && !DisableCGP)
|
2007-03-31 04:18:03 +00:00
|
|
|
PM.add(createCodeGenPreparePass(getTargetLowering()));
|
|
|
|
|
2008-11-13 01:02:14 +00:00
|
|
|
PM.add(createStackProtectorPass(getTargetLowering()));
|
2008-11-04 02:10:20 +00:00
|
|
|
|
2007-03-31 04:18:03 +00:00
|
|
|
if (PrintISelInput)
|
2008-10-21 23:33:38 +00:00
|
|
|
PM.add(createPrintFunctionPass("\n\n"
|
|
|
|
"*** Final LLVM Code input to ISel ***\n",
|
2010-01-04 22:33:16 +00:00
|
|
|
&dbgs()));
|
2007-03-31 04:18:03 +00:00
|
|
|
|
2010-02-28 00:41:59 +00:00
|
|
|
// All passes which modify the LLVM IR are now complete; run the verifier
|
|
|
|
// to ensure that the IR is valid.
|
|
|
|
if (!DisableVerify)
|
|
|
|
PM.add(createVerifierPass());
|
|
|
|
|
2008-09-25 00:37:07 +00:00
|
|
|
// Standard Lower-Level Passes.
|
2010-03-13 20:55:24 +00:00
|
|
|
|
|
|
|
// Install a MachineModuleInfo class, which is an immutable pass that holds
|
|
|
|
// all the per-module stuff we're generating, including MCContext.
|
|
|
|
MachineModuleInfo *MMI = new MachineModuleInfo(*getMCAsmInfo());
|
|
|
|
PM.add(MMI);
|
|
|
|
OutContext = &MMI->getContext(); // Return the MCContext specifically by-ref.
|
|
|
|
|
2008-09-25 00:37:07 +00:00
|
|
|
|
2009-07-31 18:16:33 +00:00
|
|
|
// Set up a MachineFunction for the rest of CodeGen to work on.
|
|
|
|
PM.add(new MachineFunctionAnalysis(*this, OptLevel));
|
|
|
|
|
2008-10-01 20:39:19 +00:00
|
|
|
// Enable FastISel with -fast, but allow that to be overridden.
|
2008-10-07 23:00:56 +00:00
|
|
|
if (EnableFastISelOption == cl::BOU_TRUE ||
|
2009-04-29 23:29:43 +00:00
|
|
|
(OptLevel == CodeGenOpt::None && EnableFastISelOption != cl::BOU_FALSE))
|
2008-10-01 20:39:19 +00:00
|
|
|
EnableFastISel = true;
|
|
|
|
|
2006-09-04 04:16:09 +00:00
|
|
|
// Ask the target for an isel.
|
2009-04-29 00:15:41 +00:00
|
|
|
if (addInstSelector(PM, OptLevel))
|
2006-09-04 04:16:09 +00:00
|
|
|
return true;
|
2007-02-08 01:36:53 +00:00
|
|
|
|
2006-09-04 04:16:09 +00:00
|
|
|
// Print the instruction selected machine code...
|
2009-10-31 20:17:39 +00:00
|
|
|
printAndVerify(PM, "After Instruction Selection",
|
|
|
|
/* allowDoubleDefs= */ true);
|
Initial commit of the machine code LICM pass. It successfully hoists this:
_foo:
li r2, 0
LBB1_1: ; bb
li r5, 0
stw r5, 0(r3)
addi r2, r2, 1
addi r3, r3, 4
cmplw cr0, r2, r4
bne cr0, LBB1_1 ; bb
LBB1_2: ; return
blr
to:
_foo:
li r2, 0
li r5, 0
LBB1_1: ; bb
stw r5, 0(r3)
addi r2, r2, 1
addi r3, r3, 4
cmplw cr0, r2, r4
bne cr0, LBB1_1 ; bb
LBB1_2: ; return
blr
ZOMG!! :-)
Moar to come...
llvm-svn: 44687
2007-12-07 21:42:31 +00:00
|
|
|
|
2010-02-13 00:31:44 +00:00
|
|
|
// Optimize PHIs before DCE: removing dead PHI cycles may make more
|
|
|
|
// instructions dead.
|
|
|
|
if (OptLevel != CodeGenOpt::None)
|
|
|
|
PM.add(createOptimizePHIsPass());
|
2010-02-06 09:07:11 +00:00
|
|
|
|
|
|
|
// Delete dead machine instructions regardless of optimization level.
|
|
|
|
PM.add(createDeadMachineInstructionElimPass());
|
|
|
|
printAndVerify(PM, "After codegen DCE pass",
|
|
|
|
/* allowDoubleDefs= */ true);
|
|
|
|
|
2009-04-29 23:29:43 +00:00
|
|
|
if (OptLevel != CodeGenOpt::None) {
|
2010-01-13 08:45:40 +00:00
|
|
|
PM.add(createOptimizeExtsPass());
|
2009-11-04 19:57:50 +00:00
|
|
|
if (!DisableMachineLICM)
|
|
|
|
PM.add(createMachineLICMPass());
|
2010-03-10 03:07:41 +00:00
|
|
|
PM.add(createMachineCSEPass());
|
2009-11-04 19:57:50 +00:00
|
|
|
if (!DisableMachineSink)
|
|
|
|
PM.add(createMachineSinkingPass());
|
2010-03-09 03:21:12 +00:00
|
|
|
printAndVerify(PM, "After Machine LICM, CSE and Sinking passes",
|
2009-10-31 20:17:39 +00:00
|
|
|
/* allowDoubleDefs= */ true);
|
2009-02-09 08:45:39 +00:00
|
|
|
}
|
Initial commit of the machine code LICM pass. It successfully hoists this:
_foo:
li r2, 0
LBB1_1: ; bb
li r5, 0
stw r5, 0(r3)
addi r2, r2, 1
addi r3, r3, 4
cmplw cr0, r2, r4
bne cr0, LBB1_1 ; bb
LBB1_2: ; return
blr
to:
_foo:
li r2, 0
li r5, 0
LBB1_1: ; bb
stw r5, 0(r3)
addi r2, r2, 1
addi r3, r3, 4
cmplw cr0, r2, r4
bne cr0, LBB1_1 ; bb
LBB1_2: ; return
blr
ZOMG!! :-)
Moar to come...
llvm-svn: 44687
2007-12-07 21:42:31 +00:00
|
|
|
|
2009-12-04 09:42:45 +00:00
|
|
|
// Pre-ra tail duplication.
|
2010-01-16 00:29:50 +00:00
|
|
|
if (OptLevel != CodeGenOpt::None && !DisableEarlyTailDup) {
|
2009-12-04 09:42:45 +00:00
|
|
|
PM.add(createTailDuplicatePass(true));
|
2010-01-06 23:52:46 +00:00
|
|
|
printAndVerify(PM, "After Pre-RegAlloc TailDuplicate",
|
|
|
|
/* allowDoubleDefs= */ true);
|
2009-12-04 09:42:45 +00:00
|
|
|
}
|
|
|
|
|
2008-04-23 18:26:03 +00:00
|
|
|
// Run pre-ra passes.
|
2009-05-16 00:33:53 +00:00
|
|
|
if (addPreRegAlloc(PM, OptLevel))
|
2009-10-31 20:17:39 +00:00
|
|
|
printAndVerify(PM, "After PreRegAlloc passes",
|
|
|
|
/* allowDoubleDefs= */ true);
|
2008-04-23 18:26:03 +00:00
|
|
|
|
2008-06-04 09:18:41 +00:00
|
|
|
// Perform register allocation.
|
2006-09-04 04:16:09 +00:00
|
|
|
PM.add(createRegisterAllocator());
|
2009-10-31 20:17:39 +00:00
|
|
|
printAndVerify(PM, "After Register Allocation");
|
2008-06-04 09:18:41 +00:00
|
|
|
|
2010-04-17 06:47:47 +00:00
|
|
|
// Perform stack slot coloring and post-ra machine LICM.
|
|
|
|
if (OptLevel != CodeGenOpt::None) {
|
2009-08-05 07:26:17 +00:00
|
|
|
// FIXME: Re-enable coloring with register when it's capable of adding
|
|
|
|
// kill markers.
|
2010-04-17 06:47:47 +00:00
|
|
|
if (!DisableSSC)
|
|
|
|
PM.add(createStackSlotColoringPass(false));
|
2010-04-07 00:41:17 +00:00
|
|
|
|
|
|
|
// Run post-ra machine LICM to hoist reloads / remats.
|
2010-04-17 06:47:47 +00:00
|
|
|
if (!DisablePostRAMachineLICM)
|
|
|
|
PM.add(createMachineLICMPass(false));
|
|
|
|
|
|
|
|
printAndVerify(PM, "After StackSlotColoring and postra Machine LICM");
|
2009-10-31 20:17:39 +00:00
|
|
|
}
|
2008-09-25 00:37:07 +00:00
|
|
|
|
2008-06-04 09:18:41 +00:00
|
|
|
// Run post-ra passes.
|
2009-05-16 00:33:53 +00:00
|
|
|
if (addPostRegAlloc(PM, OptLevel))
|
2009-10-31 20:17:39 +00:00
|
|
|
printAndVerify(PM, "After PostRegAlloc passes");
|
2008-09-25 00:37:07 +00:00
|
|
|
|
2007-07-27 07:36:14 +00:00
|
|
|
PM.add(createLowerSubregsPass());
|
2009-10-31 20:17:39 +00:00
|
|
|
printAndVerify(PM, "After LowerSubregs");
|
2007-02-08 01:36:53 +00:00
|
|
|
|
2006-09-04 04:16:09 +00:00
|
|
|
// Insert prolog/epilog code. Eliminate abstract frame index references...
|
|
|
|
PM.add(createPrologEpilogCodeInserter());
|
2009-10-31 20:17:39 +00:00
|
|
|
printAndVerify(PM, "After PrologEpilogCodeInserter");
|
2008-09-25 00:37:07 +00:00
|
|
|
|
2009-09-30 08:49:50 +00:00
|
|
|
// Run pre-sched2 passes.
|
|
|
|
if (addPreSched2(PM, OptLevel))
|
2009-10-31 20:17:39 +00:00
|
|
|
printAndVerify(PM, "After PreSched2 passes");
|
2009-09-30 08:49:50 +00:00
|
|
|
|
2007-07-13 17:13:54 +00:00
|
|
|
// Second pass scheduler.
|
2009-11-04 19:57:50 +00:00
|
|
|
if (OptLevel != CodeGenOpt::None && !DisablePostRA) {
|
2009-10-16 21:06:15 +00:00
|
|
|
PM.add(createPostRAScheduler(OptLevel));
|
2009-10-31 20:17:39 +00:00
|
|
|
printAndVerify(PM, "After PostRAScheduler");
|
2008-11-20 19:54:21 +00:00
|
|
|
}
|
|
|
|
|
2008-12-18 01:36:42 +00:00
|
|
|
// Branch folding must be run after regalloc and prolog/epilog insertion.
|
2009-11-04 19:57:50 +00:00
|
|
|
if (OptLevel != CodeGenOpt::None && !DisableBranchFold) {
|
2009-10-28 20:46:46 +00:00
|
|
|
PM.add(createBranchFoldingPass(getEnableTailMergeDefault()));
|
2010-03-05 21:49:13 +00:00
|
|
|
printNoVerify(PM, "After BranchFolding");
|
2009-05-16 00:33:53 +00:00
|
|
|
}
|
2008-12-18 01:36:42 +00:00
|
|
|
|
2009-11-26 00:32:21 +00:00
|
|
|
// Tail duplication.
|
|
|
|
if (OptLevel != CodeGenOpt::None && !DisableTailDuplicate) {
|
2009-12-04 09:42:45 +00:00
|
|
|
PM.add(createTailDuplicatePass(false));
|
2010-03-05 21:49:13 +00:00
|
|
|
printNoVerify(PM, "After TailDuplicate");
|
2009-11-26 00:32:21 +00:00
|
|
|
}
|
|
|
|
|
2008-01-07 01:33:09 +00:00
|
|
|
PM.add(createGCMachineCodeAnalysisPass());
|
2008-09-25 00:37:07 +00:00
|
|
|
|
2008-01-07 01:33:09 +00:00
|
|
|
if (PrintGCInfo)
|
2010-01-04 22:33:16 +00:00
|
|
|
PM.add(createGCInfoPrinter(dbgs()));
|
2007-02-08 01:36:53 +00:00
|
|
|
|
2009-11-04 19:57:50 +00:00
|
|
|
if (OptLevel != CodeGenOpt::None && !DisableCodePlace) {
|
2009-10-31 20:17:39 +00:00
|
|
|
PM.add(createCodePlacementOptPass());
|
2010-03-05 21:49:13 +00:00
|
|
|
printNoVerify(PM, "After CodePlacementOpt");
|
2009-10-31 20:17:39 +00:00
|
|
|
}
|
|
|
|
|
2009-11-05 01:16:59 +00:00
|
|
|
if (addPreEmitPass(PM, OptLevel))
|
2010-03-05 21:49:13 +00:00
|
|
|
printNoVerify(PM, "After PreEmit passes");
|
2009-11-05 01:16:59 +00:00
|
|
|
|
2008-09-25 00:37:07 +00:00
|
|
|
return false;
|
2006-09-04 04:16:09 +00:00
|
|
|
}
|