mirror of
https://github.com/RPCS3/llvm-mirror.git
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InstructionSelectorImpl.h: Modularize/remove ODR violations by using a static member function to expose the debug name
llvm-svn: 316715
This commit is contained in:
parent
93be1aab08
commit
12654d6d71
@ -55,13 +55,15 @@ bool InstructionSelector::executeMatchTable(
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enum RejectAction { RejectAndGiveUp, RejectAndResume };
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auto handleReject = [&]() -> RejectAction {
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DEBUG(dbgs() << CurrentIdx << ": Rejected\n");
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DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
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dbgs() << CurrentIdx << ": Rejected\n");
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if (OnFailResumeAt.empty())
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return RejectAndGiveUp;
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CurrentIdx = OnFailResumeAt.back();
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OnFailResumeAt.pop_back();
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DEBUG(dbgs() << CurrentIdx << ": Resume at " << CurrentIdx << " ("
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<< OnFailResumeAt.size() << " try-blocks remain)\n");
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DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
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dbgs() << CurrentIdx << ": Resume at " << CurrentIdx << " ("
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<< OnFailResumeAt.size() << " try-blocks remain)\n");
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return RejectAndResume;
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};
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@ -69,7 +71,8 @@ bool InstructionSelector::executeMatchTable(
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assert(CurrentIdx != ~0u && "Invalid MatchTable index");
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switch (MatchTable[CurrentIdx++]) {
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case GIM_Try: {
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DEBUG(dbgs() << CurrentIdx << ": Begin try-block\n");
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DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
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dbgs() << CurrentIdx << ": Begin try-block\n");
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OnFailResumeAt.push_back(MatchTable[CurrentIdx++]);
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break;
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}
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@ -85,13 +88,15 @@ bool InstructionSelector::executeMatchTable(
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MachineOperand &MO = State.MIs[InsnID]->getOperand(OpIdx);
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if (!MO.isReg()) {
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DEBUG(dbgs() << CurrentIdx << ": Not a register\n");
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DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
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dbgs() << CurrentIdx << ": Not a register\n");
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if (handleReject() == RejectAndGiveUp)
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return false;
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break;
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}
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if (TRI.isPhysicalRegister(MO.getReg())) {
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DEBUG(dbgs() << CurrentIdx << ": Is a physical register\n");
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DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
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dbgs() << CurrentIdx << ": Is a physical register\n");
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if (handleReject() == RejectAndGiveUp)
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return false;
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break;
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@ -105,16 +110,19 @@ bool InstructionSelector::executeMatchTable(
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"Expected to store MIs in order");
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State.MIs.push_back(NewMI);
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}
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DEBUG(dbgs() << CurrentIdx << ": MIs[" << NewInsnID
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<< "] = GIM_RecordInsn(" << InsnID << ", " << OpIdx
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<< ")\n");
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DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
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dbgs() << CurrentIdx << ": MIs[" << NewInsnID
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<< "] = GIM_RecordInsn(" << InsnID << ", " << OpIdx
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<< ")\n");
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break;
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}
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case GIM_CheckFeatures: {
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int64_t ExpectedBitsetID = MatchTable[CurrentIdx++];
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DEBUG(dbgs() << CurrentIdx << ": GIM_CheckFeatures(ExpectedBitsetID="
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<< ExpectedBitsetID << ")\n");
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DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
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dbgs() << CurrentIdx
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<< ": GIM_CheckFeatures(ExpectedBitsetID="
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<< ExpectedBitsetID << ")\n");
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if ((AvailableFeatures & MatcherInfo.FeatureBitsets[ExpectedBitsetID]) !=
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MatcherInfo.FeatureBitsets[ExpectedBitsetID]) {
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if (handleReject() == RejectAndGiveUp)
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@ -128,9 +136,10 @@ bool InstructionSelector::executeMatchTable(
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int64_t Expected = MatchTable[CurrentIdx++];
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unsigned Opcode = State.MIs[InsnID]->getOpcode();
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DEBUG(dbgs() << CurrentIdx << ": GIM_CheckOpcode(MIs[" << InsnID
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<< "], ExpectedOpcode=" << Expected << ") // Got=" << Opcode
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<< "\n");
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DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
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dbgs() << CurrentIdx << ": GIM_CheckOpcode(MIs[" << InsnID
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<< "], ExpectedOpcode=" << Expected
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<< ") // Got=" << Opcode << "\n");
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assert(State.MIs[InsnID] != nullptr && "Used insn before defined");
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if (Opcode != Expected) {
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if (handleReject() == RejectAndGiveUp)
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@ -142,8 +151,9 @@ bool InstructionSelector::executeMatchTable(
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case GIM_CheckNumOperands: {
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int64_t InsnID = MatchTable[CurrentIdx++];
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int64_t Expected = MatchTable[CurrentIdx++];
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DEBUG(dbgs() << CurrentIdx << ": GIM_CheckNumOperands(MIs[" << InsnID
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<< "], Expected=" << Expected << ")\n");
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DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
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dbgs() << CurrentIdx << ": GIM_CheckNumOperands(MIs["
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<< InsnID << "], Expected=" << Expected << ")\n");
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assert(State.MIs[InsnID] != nullptr && "Used insn before defined");
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if (State.MIs[InsnID]->getNumOperands() != Expected) {
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if (handleReject() == RejectAndGiveUp)
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@ -154,8 +164,10 @@ bool InstructionSelector::executeMatchTable(
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case GIM_CheckI64ImmPredicate: {
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int64_t InsnID = MatchTable[CurrentIdx++];
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int64_t Predicate = MatchTable[CurrentIdx++];
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DEBUG(dbgs() << CurrentIdx << ": GIM_CheckI64ImmPredicate(MIs[" << InsnID
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<< "], Predicate=" << Predicate << ")\n");
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DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
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dbgs()
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<< CurrentIdx << ": GIM_CheckI64ImmPredicate(MIs["
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<< InsnID << "], Predicate=" << Predicate << ")\n");
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assert(State.MIs[InsnID] != nullptr && "Used insn before defined");
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assert(State.MIs[InsnID]->getOpcode() == TargetOpcode::G_CONSTANT &&
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"Expected G_CONSTANT");
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@ -176,8 +188,10 @@ bool InstructionSelector::executeMatchTable(
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case GIM_CheckAPIntImmPredicate: {
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int64_t InsnID = MatchTable[CurrentIdx++];
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int64_t Predicate = MatchTable[CurrentIdx++];
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DEBUG(dbgs() << CurrentIdx << ": GIM_CheckAPIntImmPredicate(MIs["
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<< InsnID << "], Predicate=" << Predicate << ")\n");
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DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
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dbgs()
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<< CurrentIdx << ": GIM_CheckAPIntImmPredicate(MIs["
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<< InsnID << "], Predicate=" << Predicate << ")\n");
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assert(State.MIs[InsnID] != nullptr && "Used insn before defined");
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assert(State.MIs[InsnID]->getOpcode() && "Expected G_CONSTANT");
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assert(Predicate > GIPFP_APInt_Invalid && "Expected a valid predicate");
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@ -195,8 +209,10 @@ bool InstructionSelector::executeMatchTable(
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case GIM_CheckAPFloatImmPredicate: {
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int64_t InsnID = MatchTable[CurrentIdx++];
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int64_t Predicate = MatchTable[CurrentIdx++];
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DEBUG(dbgs() << CurrentIdx << ": GIM_CheckAPFloatImmPredicate(MIs[" << InsnID
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<< "], Predicate=" << Predicate << ")\n");
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DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
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dbgs()
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<< CurrentIdx << ": GIM_CheckAPFloatImmPredicate(MIs["
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<< InsnID << "], Predicate=" << Predicate << ")\n");
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assert(State.MIs[InsnID] != nullptr && "Used insn before defined");
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assert(State.MIs[InsnID]->getOpcode() == TargetOpcode::G_FCONSTANT &&
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"Expected G_FCONSTANT");
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@ -211,8 +227,9 @@ bool InstructionSelector::executeMatchTable(
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}
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case GIM_CheckNonAtomic: {
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int64_t InsnID = MatchTable[CurrentIdx++];
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DEBUG(dbgs() << CurrentIdx << ": GIM_CheckNonAtomic(MIs[" << InsnID
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<< "])\n");
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DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
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dbgs() << CurrentIdx << ": GIM_CheckNonAtomic(MIs["
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<< InsnID << "])\n");
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assert(State.MIs[InsnID] != nullptr && "Used insn before defined");
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assert((State.MIs[InsnID]->getOpcode() == TargetOpcode::G_LOAD ||
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State.MIs[InsnID]->getOpcode() == TargetOpcode::G_STORE) &&
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@ -233,9 +250,10 @@ bool InstructionSelector::executeMatchTable(
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int64_t InsnID = MatchTable[CurrentIdx++];
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int64_t OpIdx = MatchTable[CurrentIdx++];
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int64_t TypeID = MatchTable[CurrentIdx++];
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DEBUG(dbgs() << CurrentIdx << ": GIM_CheckType(MIs[" << InsnID
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<< "]->getOperand(" << OpIdx << "), TypeID=" << TypeID
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<< ")\n");
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DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
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dbgs() << CurrentIdx << ": GIM_CheckType(MIs[" << InsnID
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<< "]->getOperand(" << OpIdx
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<< "), TypeID=" << TypeID << ")\n");
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assert(State.MIs[InsnID] != nullptr && "Used insn before defined");
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if (MRI.getType(State.MIs[InsnID]->getOperand(OpIdx).getReg()) !=
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MatcherInfo.TypeObjects[TypeID]) {
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@ -249,9 +267,10 @@ bool InstructionSelector::executeMatchTable(
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int64_t OpIdx = MatchTable[CurrentIdx++];
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int64_t SizeInBits = MatchTable[CurrentIdx++];
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DEBUG(dbgs() << CurrentIdx << ": GIM_CheckPointerToAny(MIs[" << InsnID
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<< "]->getOperand(" << OpIdx
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<< "), SizeInBits=" << SizeInBits << ")\n");
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DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
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dbgs() << CurrentIdx << ": GIM_CheckPointerToAny(MIs["
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<< InsnID << "]->getOperand(" << OpIdx
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<< "), SizeInBits=" << SizeInBits << ")\n");
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assert(State.MIs[InsnID] != nullptr && "Used insn before defined");
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// iPTR must be looked up in the target.
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@ -273,9 +292,10 @@ bool InstructionSelector::executeMatchTable(
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int64_t InsnID = MatchTable[CurrentIdx++];
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int64_t OpIdx = MatchTable[CurrentIdx++];
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int64_t RCEnum = MatchTable[CurrentIdx++];
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DEBUG(dbgs() << CurrentIdx << ": GIM_CheckRegBankForClass(MIs[" << InsnID
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<< "]->getOperand(" << OpIdx << "), RCEnum=" << RCEnum
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<< ")\n");
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DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
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dbgs() << CurrentIdx << ": GIM_CheckRegBankForClass(MIs["
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<< InsnID << "]->getOperand(" << OpIdx
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<< "), RCEnum=" << RCEnum << ")\n");
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assert(State.MIs[InsnID] != nullptr && "Used insn before defined");
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if (&RBI.getRegBankFromRegClass(*TRI.getRegClass(RCEnum)) !=
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RBI.getRegBank(State.MIs[InsnID]->getOperand(OpIdx).getReg(), MRI,
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@ -291,10 +311,12 @@ bool InstructionSelector::executeMatchTable(
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int64_t OpIdx = MatchTable[CurrentIdx++];
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int64_t RendererID = MatchTable[CurrentIdx++];
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int64_t ComplexPredicateID = MatchTable[CurrentIdx++];
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DEBUG(dbgs() << CurrentIdx << ": State.Renderers[" << RendererID
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<< "] = GIM_CheckComplexPattern(MIs[" << InsnID
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<< "]->getOperand(" << OpIdx
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<< "), ComplexPredicateID=" << ComplexPredicateID << ")\n");
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DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
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dbgs() << CurrentIdx << ": State.Renderers[" << RendererID
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<< "] = GIM_CheckComplexPattern(MIs[" << InsnID
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<< "]->getOperand(" << OpIdx
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<< "), ComplexPredicateID=" << ComplexPredicateID
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<< ")\n");
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assert(State.MIs[InsnID] != nullptr && "Used insn before defined");
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// FIXME: Use std::invoke() when it's available.
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ComplexRendererFns Renderer =
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@ -312,9 +334,10 @@ bool InstructionSelector::executeMatchTable(
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int64_t InsnID = MatchTable[CurrentIdx++];
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int64_t OpIdx = MatchTable[CurrentIdx++];
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int64_t Value = MatchTable[CurrentIdx++];
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DEBUG(dbgs() << CurrentIdx << ": GIM_CheckConstantInt(MIs[" << InsnID
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<< "]->getOperand(" << OpIdx << "), Value=" << Value
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<< ")\n");
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DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
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dbgs() << CurrentIdx << ": GIM_CheckConstantInt(MIs["
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<< InsnID << "]->getOperand(" << OpIdx
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<< "), Value=" << Value << ")\n");
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assert(State.MIs[InsnID] != nullptr && "Used insn before defined");
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if (!isOperandImmEqual(State.MIs[InsnID]->getOperand(OpIdx), Value,
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MRI)) {
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@ -328,9 +351,10 @@ bool InstructionSelector::executeMatchTable(
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int64_t InsnID = MatchTable[CurrentIdx++];
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int64_t OpIdx = MatchTable[CurrentIdx++];
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int64_t Value = MatchTable[CurrentIdx++];
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DEBUG(dbgs() << CurrentIdx << ": GIM_CheckLiteralInt(MIs[" << InsnID
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<< "]->getOperand(" << OpIdx << "), Value=" << Value
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<< ")\n");
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DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
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dbgs() << CurrentIdx << ": GIM_CheckLiteralInt(MIs["
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<< InsnID << "]->getOperand(" << OpIdx
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<< "), Value=" << Value << ")\n");
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assert(State.MIs[InsnID] != nullptr && "Used insn before defined");
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MachineOperand &MO = State.MIs[InsnID]->getOperand(OpIdx);
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if (!MO.isCImm() || !MO.getCImm()->equalsInt(Value)) {
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@ -344,9 +368,10 @@ bool InstructionSelector::executeMatchTable(
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int64_t InsnID = MatchTable[CurrentIdx++];
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int64_t OpIdx = MatchTable[CurrentIdx++];
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int64_t Value = MatchTable[CurrentIdx++];
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DEBUG(dbgs() << CurrentIdx << ": GIM_CheckIntrinsicID(MIs[" << InsnID
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<< "]->getOperand(" << OpIdx << "), Value=" << Value
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<< ")\n");
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DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
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dbgs() << CurrentIdx << ": GIM_CheckIntrinsicID(MIs["
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<< InsnID << "]->getOperand(" << OpIdx
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<< "), Value=" << Value << ")\n");
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assert(State.MIs[InsnID] != nullptr && "Used insn before defined");
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MachineOperand &MO = State.MIs[InsnID]->getOperand(OpIdx);
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if (!MO.isIntrinsicID() || MO.getIntrinsicID() != Value)
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@ -358,8 +383,9 @@ bool InstructionSelector::executeMatchTable(
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case GIM_CheckIsMBB: {
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int64_t InsnID = MatchTable[CurrentIdx++];
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int64_t OpIdx = MatchTable[CurrentIdx++];
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DEBUG(dbgs() << CurrentIdx << ": GIM_CheckIsMBB(MIs[" << InsnID
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<< "]->getOperand(" << OpIdx << "))\n");
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DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
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dbgs() << CurrentIdx << ": GIM_CheckIsMBB(MIs[" << InsnID
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<< "]->getOperand(" << OpIdx << "))\n");
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assert(State.MIs[InsnID] != nullptr && "Used insn before defined");
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if (!State.MIs[InsnID]->getOperand(OpIdx).isMBB()) {
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if (handleReject() == RejectAndGiveUp)
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@ -370,8 +396,9 @@ bool InstructionSelector::executeMatchTable(
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case GIM_CheckIsSafeToFold: {
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int64_t InsnID = MatchTable[CurrentIdx++];
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DEBUG(dbgs() << CurrentIdx << ": GIM_CheckIsSafeToFold(MIs[" << InsnID
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<< "])\n");
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DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
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dbgs() << CurrentIdx << ": GIM_CheckIsSafeToFold(MIs["
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<< InsnID << "])\n");
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assert(State.MIs[InsnID] != nullptr && "Used insn before defined");
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if (!isObviouslySafeToFold(*State.MIs[InsnID])) {
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if (handleReject() == RejectAndGiveUp)
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@ -384,9 +411,10 @@ bool InstructionSelector::executeMatchTable(
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int64_t OpIdx = MatchTable[CurrentIdx++];
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int64_t OtherInsnID = MatchTable[CurrentIdx++];
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int64_t OtherOpIdx = MatchTable[CurrentIdx++];
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DEBUG(dbgs() << CurrentIdx << ": GIM_CheckIsSameOperand(MIs[" << InsnID
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<< "][" << OpIdx << "], MIs[" << OtherInsnID << "]["
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<< OtherOpIdx << "])\n");
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DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
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dbgs() << CurrentIdx << ": GIM_CheckIsSameOperand(MIs["
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<< InsnID << "][" << OpIdx << "], MIs["
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<< OtherInsnID << "][" << OtherOpIdx << "])\n");
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assert(State.MIs[InsnID] != nullptr && "Used insn before defined");
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assert(State.MIs[OtherInsnID] != nullptr && "Used insn before defined");
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if (!State.MIs[InsnID]->getOperand(OpIdx).isIdenticalTo(
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@ -397,7 +425,8 @@ bool InstructionSelector::executeMatchTable(
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break;
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}
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case GIM_Reject:
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DEBUG(dbgs() << CurrentIdx << ": GIM_Reject");
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DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
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dbgs() << CurrentIdx << ": GIM_Reject");
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if (handleReject() == RejectAndGiveUp)
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return false;
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break;
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@ -411,8 +440,10 @@ bool InstructionSelector::executeMatchTable(
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OutMIs.push_back(MachineInstrBuilder(*State.MIs[OldInsnID]->getMF(),
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State.MIs[OldInsnID]));
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OutMIs[NewInsnID]->setDesc(TII.get(NewOpcode));
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DEBUG(dbgs() << CurrentIdx << ": GIR_MutateOpcode(OutMIs[" << NewInsnID
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<< "], MIs[" << OldInsnID << "], " << NewOpcode << ")\n");
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DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
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dbgs() << CurrentIdx << ": GIR_MutateOpcode(OutMIs["
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<< NewInsnID << "], MIs[" << OldInsnID << "], "
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<< NewOpcode << ")\n");
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break;
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}
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@ -424,8 +455,9 @@ bool InstructionSelector::executeMatchTable(
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(void)InsnID;
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OutMIs.push_back(BuildMI(*State.MIs[0]->getParent(), State.MIs[0],
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State.MIs[0]->getDebugLoc(), TII.get(Opcode)));
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DEBUG(dbgs() << CurrentIdx << ": GIR_BuildMI(OutMIs[" << InsnID << "], "
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<< Opcode << ")\n");
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DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
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dbgs() << CurrentIdx << ": GIR_BuildMI(OutMIs[" << InsnID
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<< "], " << Opcode << ")\n");
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break;
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}
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@ -435,8 +467,10 @@ bool InstructionSelector::executeMatchTable(
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int64_t OpIdx = MatchTable[CurrentIdx++];
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assert(OutMIs[NewInsnID] && "Attempted to add to undefined instruction");
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OutMIs[NewInsnID].add(State.MIs[OldInsnID]->getOperand(OpIdx));
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DEBUG(dbgs() << CurrentIdx << ": GIR_Copy(OutMIs[" << NewInsnID
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<< "], MIs[" << OldInsnID << "], " << OpIdx << ")\n");
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DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
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dbgs()
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<< CurrentIdx << ": GIR_Copy(OutMIs[" << NewInsnID
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<< "], MIs[" << OldInsnID << "], " << OpIdx << ")\n");
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break;
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}
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@ -451,9 +485,10 @@ bool InstructionSelector::executeMatchTable(
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OutMIs[NewInsnID].addReg(ZeroReg);
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else
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OutMIs[NewInsnID].add(MO);
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DEBUG(dbgs() << CurrentIdx << ": GIR_CopyOrAddZeroReg(OutMIs["
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<< NewInsnID << "], MIs[" << OldInsnID << "], " << OpIdx
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<< ", " << ZeroReg << ")\n");
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DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
|
||||
dbgs() << CurrentIdx << ": GIR_CopyOrAddZeroReg(OutMIs["
|
||||
<< NewInsnID << "], MIs[" << OldInsnID << "], "
|
||||
<< OpIdx << ", " << ZeroReg << ")\n");
|
||||
break;
|
||||
}
|
||||
|
||||
@ -465,9 +500,10 @@ bool InstructionSelector::executeMatchTable(
|
||||
assert(OutMIs[NewInsnID] && "Attempted to add to undefined instruction");
|
||||
OutMIs[NewInsnID].addReg(State.MIs[OldInsnID]->getOperand(OpIdx).getReg(),
|
||||
0, SubRegIdx);
|
||||
DEBUG(dbgs() << CurrentIdx << ": GIR_CopySubReg(OutMIs[" << NewInsnID
|
||||
<< "], MIs[" << OldInsnID << "], " << OpIdx << ", "
|
||||
<< SubRegIdx << ")\n");
|
||||
DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
|
||||
dbgs() << CurrentIdx << ": GIR_CopySubReg(OutMIs["
|
||||
<< NewInsnID << "], MIs[" << OldInsnID << "], "
|
||||
<< OpIdx << ", " << SubRegIdx << ")\n");
|
||||
break;
|
||||
}
|
||||
|
||||
@ -476,8 +512,9 @@ bool InstructionSelector::executeMatchTable(
|
||||
int64_t RegNum = MatchTable[CurrentIdx++];
|
||||
assert(OutMIs[InsnID] && "Attempted to add to undefined instruction");
|
||||
OutMIs[InsnID].addDef(RegNum, RegState::Implicit);
|
||||
DEBUG(dbgs() << CurrentIdx << ": GIR_AddImplicitDef(OutMIs[" << InsnID
|
||||
<< "], " << RegNum << ")\n");
|
||||
DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
|
||||
dbgs() << CurrentIdx << ": GIR_AddImplicitDef(OutMIs["
|
||||
<< InsnID << "], " << RegNum << ")\n");
|
||||
break;
|
||||
}
|
||||
|
||||
@ -486,8 +523,9 @@ bool InstructionSelector::executeMatchTable(
|
||||
int64_t RegNum = MatchTable[CurrentIdx++];
|
||||
assert(OutMIs[InsnID] && "Attempted to add to undefined instruction");
|
||||
OutMIs[InsnID].addUse(RegNum, RegState::Implicit);
|
||||
DEBUG(dbgs() << CurrentIdx << ": GIR_AddImplicitUse(OutMIs[" << InsnID
|
||||
<< "], " << RegNum << ")\n");
|
||||
DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
|
||||
dbgs() << CurrentIdx << ": GIR_AddImplicitUse(OutMIs["
|
||||
<< InsnID << "], " << RegNum << ")\n");
|
||||
break;
|
||||
}
|
||||
|
||||
@ -496,8 +534,9 @@ bool InstructionSelector::executeMatchTable(
|
||||
int64_t RegNum = MatchTable[CurrentIdx++];
|
||||
assert(OutMIs[InsnID] && "Attempted to add to undefined instruction");
|
||||
OutMIs[InsnID].addReg(RegNum);
|
||||
DEBUG(dbgs() << CurrentIdx << ": GIR_AddRegister(OutMIs[" << InsnID
|
||||
<< "], " << RegNum << ")\n");
|
||||
DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
|
||||
dbgs() << CurrentIdx << ": GIR_AddRegister(OutMIs["
|
||||
<< InsnID << "], " << RegNum << ")\n");
|
||||
break;
|
||||
}
|
||||
|
||||
@ -506,8 +545,9 @@ bool InstructionSelector::executeMatchTable(
|
||||
int64_t Imm = MatchTable[CurrentIdx++];
|
||||
assert(OutMIs[InsnID] && "Attempted to add to undefined instruction");
|
||||
OutMIs[InsnID].addImm(Imm);
|
||||
DEBUG(dbgs() << CurrentIdx << ": GIR_AddImm(OutMIs[" << InsnID << "], "
|
||||
<< Imm << ")\n");
|
||||
DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
|
||||
dbgs() << CurrentIdx << ": GIR_AddImm(OutMIs[" << InsnID
|
||||
<< "], " << Imm << ")\n");
|
||||
break;
|
||||
}
|
||||
|
||||
@ -517,8 +557,9 @@ bool InstructionSelector::executeMatchTable(
|
||||
assert(OutMIs[InsnID] && "Attempted to add to undefined instruction");
|
||||
for (const auto &RenderOpFn : State.Renderers[RendererID])
|
||||
RenderOpFn(OutMIs[InsnID]);
|
||||
DEBUG(dbgs() << CurrentIdx << ": GIR_ComplexRenderer(OutMIs[" << InsnID
|
||||
<< "], " << RendererID << ")\n");
|
||||
DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
|
||||
dbgs() << CurrentIdx << ": GIR_ComplexRenderer(OutMIs["
|
||||
<< InsnID << "], " << RendererID << ")\n");
|
||||
break;
|
||||
}
|
||||
case GIR_ComplexSubOperandRenderer: {
|
||||
@ -527,9 +568,11 @@ bool InstructionSelector::executeMatchTable(
|
||||
int64_t RenderOpID = MatchTable[CurrentIdx++];
|
||||
assert(OutMIs[InsnID] && "Attempted to add to undefined instruction");
|
||||
State.Renderers[RendererID][RenderOpID](OutMIs[InsnID]);
|
||||
DEBUG(dbgs() << CurrentIdx << ": GIR_ComplexSubOperandRenderer(OutMIs["
|
||||
<< InsnID << "], " << RendererID << ", " << RenderOpID
|
||||
<< ")\n");
|
||||
DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
|
||||
dbgs() << CurrentIdx
|
||||
<< ": GIR_ComplexSubOperandRenderer(OutMIs["
|
||||
<< InsnID << "], " << RendererID << ", "
|
||||
<< RenderOpID << ")\n");
|
||||
break;
|
||||
}
|
||||
|
||||
@ -545,8 +588,9 @@ bool InstructionSelector::executeMatchTable(
|
||||
OutMIs[NewInsnID].add(State.MIs[OldInsnID]->getOperand(1));
|
||||
else
|
||||
llvm_unreachable("Expected Imm or CImm operand");
|
||||
DEBUG(dbgs() << CurrentIdx << ": GIR_CopyConstantAsSImm(OutMIs[" << NewInsnID
|
||||
<< "], MIs[" << OldInsnID << "])\n");
|
||||
DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
|
||||
dbgs() << CurrentIdx << ": GIR_CopyConstantAsSImm(OutMIs["
|
||||
<< NewInsnID << "], MIs[" << OldInsnID << "])\n");
|
||||
break;
|
||||
}
|
||||
|
||||
@ -557,8 +601,10 @@ bool InstructionSelector::executeMatchTable(
|
||||
assert(OutMIs[InsnID] && "Attempted to add to undefined instruction");
|
||||
constrainOperandRegToRegClass(*OutMIs[InsnID].getInstr(), OpIdx,
|
||||
*TRI.getRegClass(RCEnum), TII, TRI, RBI);
|
||||
DEBUG(dbgs() << CurrentIdx << ": GIR_ConstrainOperandRC(OutMIs[" << InsnID
|
||||
<< "], " << OpIdx << ", " << RCEnum << ")\n");
|
||||
DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
|
||||
dbgs() << CurrentIdx << ": GIR_ConstrainOperandRC(OutMIs["
|
||||
<< InsnID << "], " << OpIdx << ", " << RCEnum
|
||||
<< ")\n");
|
||||
break;
|
||||
}
|
||||
|
||||
@ -567,9 +613,10 @@ bool InstructionSelector::executeMatchTable(
|
||||
assert(OutMIs[InsnID] && "Attempted to add to undefined instruction");
|
||||
constrainSelectedInstRegOperands(*OutMIs[InsnID].getInstr(), TII, TRI,
|
||||
RBI);
|
||||
DEBUG(dbgs() << CurrentIdx
|
||||
<< ": GIR_ConstrainSelectedInstOperands(OutMIs[" << InsnID
|
||||
<< "])\n");
|
||||
DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
|
||||
dbgs() << CurrentIdx
|
||||
<< ": GIR_ConstrainSelectedInstOperands(OutMIs["
|
||||
<< InsnID << "])\n");
|
||||
break;
|
||||
}
|
||||
|
||||
@ -577,16 +624,18 @@ bool InstructionSelector::executeMatchTable(
|
||||
int64_t InsnID = MatchTable[CurrentIdx++];
|
||||
assert(OutMIs[InsnID] && "Attempted to add to undefined instruction");
|
||||
|
||||
DEBUG(dbgs() << CurrentIdx << ": GIR_MergeMemOperands(OutMIs[" << InsnID
|
||||
<< "]");
|
||||
DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
|
||||
dbgs() << CurrentIdx << ": GIR_MergeMemOperands(OutMIs["
|
||||
<< InsnID << "]");
|
||||
int64_t MergeInsnID = GIU_MergeMemOperands_EndOfList;
|
||||
while ((MergeInsnID = MatchTable[CurrentIdx++]) !=
|
||||
GIU_MergeMemOperands_EndOfList) {
|
||||
DEBUG(dbgs() << ", MIs[" << MergeInsnID << "]");
|
||||
DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
|
||||
dbgs() << ", MIs[" << MergeInsnID << "]");
|
||||
for (const auto &MMO : State.MIs[MergeInsnID]->memoperands())
|
||||
OutMIs[InsnID].addMemOperand(MMO);
|
||||
}
|
||||
DEBUG(dbgs() << ")\n");
|
||||
DEBUG_WITH_TYPE(TgtInstructionSelector::getName(), dbgs() << ")\n");
|
||||
break;
|
||||
}
|
||||
|
||||
@ -595,13 +644,15 @@ bool InstructionSelector::executeMatchTable(
|
||||
assert(State.MIs[InsnID] &&
|
||||
"Attempted to erase an undefined instruction");
|
||||
State.MIs[InsnID]->eraseFromParent();
|
||||
DEBUG(dbgs() << CurrentIdx << ": GIR_EraseFromParent(MIs[" << InsnID
|
||||
<< "])\n");
|
||||
DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
|
||||
dbgs() << CurrentIdx << ": GIR_EraseFromParent(MIs["
|
||||
<< InsnID << "])\n");
|
||||
break;
|
||||
}
|
||||
|
||||
case GIR_Done:
|
||||
DEBUG(dbgs() << CurrentIdx << ": GIR_Done");
|
||||
DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
|
||||
dbgs() << CurrentIdx << ": GIR_Done");
|
||||
return true;
|
||||
|
||||
default:
|
||||
|
@ -23,7 +23,6 @@ module LLVM_Backend {
|
||||
exclude header "CodeGen/CommandFlags.h"
|
||||
exclude header "CodeGen/LinkAllAsmWriterComponents.h"
|
||||
exclude header "CodeGen/LinkAllCodegenComponents.h"
|
||||
exclude header "CodeGen/GlobalISel/InstructionSelectorImpl.h"
|
||||
|
||||
// These are intended for (repeated) textual inclusion.
|
||||
textual header "CodeGen/DIEValue.def"
|
||||
|
@ -20,6 +20,7 @@
|
||||
#include "AArch64TargetMachine.h"
|
||||
#include "MCTargetDesc/AArch64AddressingModes.h"
|
||||
#include "llvm/CodeGen/GlobalISel/InstructionSelector.h"
|
||||
#include "llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h"
|
||||
#include "llvm/CodeGen/GlobalISel/Utils.h"
|
||||
#include "llvm/CodeGen/MachineBasicBlock.h"
|
||||
#include "llvm/CodeGen/MachineFunction.h"
|
||||
@ -33,8 +34,6 @@
|
||||
|
||||
#define DEBUG_TYPE "aarch64-isel"
|
||||
|
||||
#include "llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h"
|
||||
|
||||
using namespace llvm;
|
||||
|
||||
namespace {
|
||||
@ -50,6 +49,7 @@ public:
|
||||
const AArch64RegisterBankInfo &RBI);
|
||||
|
||||
bool select(MachineInstr &I) const override;
|
||||
static const char *getName() { return DEBUG_TYPE; }
|
||||
|
||||
private:
|
||||
/// tblgen-erated 'select' implementation, used as the initial selector for
|
||||
|
@ -15,14 +15,13 @@
|
||||
#include "ARMSubtarget.h"
|
||||
#include "ARMTargetMachine.h"
|
||||
#include "llvm/CodeGen/GlobalISel/InstructionSelector.h"
|
||||
#include "llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h"
|
||||
#include "llvm/CodeGen/MachineConstantPool.h"
|
||||
#include "llvm/CodeGen/MachineRegisterInfo.h"
|
||||
#include "llvm/Support/Debug.h"
|
||||
|
||||
#define DEBUG_TYPE "arm-isel"
|
||||
|
||||
#include "llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h"
|
||||
|
||||
using namespace llvm;
|
||||
|
||||
namespace {
|
||||
@ -37,6 +36,7 @@ public:
|
||||
const ARMRegisterBankInfo &RBI);
|
||||
|
||||
bool select(MachineInstr &I) const override;
|
||||
static const char *getName() { return DEBUG_TYPE; }
|
||||
|
||||
private:
|
||||
bool selectImpl(MachineInstr &I) const;
|
||||
|
@ -12,8 +12,6 @@
|
||||
/// \todo This should be generated by TableGen.
|
||||
//===----------------------------------------------------------------------===//
|
||||
|
||||
#define DEBUG_TYPE "X86-isel"
|
||||
|
||||
#include "MCTargetDesc/X86BaseInfo.h"
|
||||
#include "X86InstrBuilder.h"
|
||||
#include "X86InstrInfo.h"
|
||||
@ -48,6 +46,8 @@
|
||||
#include <cstdint>
|
||||
#include <tuple>
|
||||
|
||||
#define DEBUG_TYPE "X86-isel"
|
||||
|
||||
using namespace llvm;
|
||||
|
||||
namespace {
|
||||
@ -62,6 +62,7 @@ public:
|
||||
const X86RegisterBankInfo &RBI);
|
||||
|
||||
bool select(MachineInstr &I) const override;
|
||||
static const char *getName() { return DEBUG_TYPE; }
|
||||
|
||||
private:
|
||||
/// tblgen-erated 'select' implementation, used as the initial selector for
|
||||
|
Loading…
Reference in New Issue
Block a user