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Enhanced vzeroupper insertion pass that avoids inserting vzeroupper where it is unnecessary through local analysis. Patch from Bruno Cardoso Lopes, with some additional changes.
I'm going to wait for any review comments and perform some additional testing before turning this on by default. llvm-svn: 143750
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@ -14,14 +14,16 @@
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//
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "x86-codegen"
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#define DEBUG_TYPE "x86-vzeroupper"
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#include "X86.h"
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#include "X86InstrInfo.h"
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#include "llvm/ADT/Statistic.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/GlobalValue.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/raw_ostream.h"
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#include "llvm/Target/TargetInstrInfo.h"
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using namespace llvm;
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@ -41,6 +43,60 @@ namespace {
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private:
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const TargetInstrInfo *TII; // Machine instruction info.
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MachineBasicBlock *MBB; // Current basic block
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// Any YMM register live-in to this function?
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bool FnHasLiveInYmm;
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// BBState - Contains the state of each MBB: unknown, clean, dirty
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SmallVector<uint8_t, 8> BBState;
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// BBSolved - Keep track of all MBB which had been already analyzed
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// and there is no further processing required.
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BitVector BBSolved;
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// Machine Basic Blocks are classified according this pass:
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//
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// ST_UNKNOWN - The MBB state is unknown, meaning from the entry state
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// until the MBB exit there isn't a instruction using YMM to change
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// the state to dirty, or one of the incoming predecessors is unknown
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// and there's not a dirty predecessor between them.
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//
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// ST_CLEAN - No YMM usage in the end of the MBB. A MBB could have
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// instructions using YMM and be marked ST_CLEAN, as long as the state
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// is cleaned by a vzeroupper before any call.
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//
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// ST_DIRTY - Any MBB ending with a YMM usage not cleaned up by a
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// vzeroupper instruction.
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//
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// ST_INIT - Placeholder for an empty state set
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//
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enum {
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ST_UNKNOWN = 0,
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ST_CLEAN = 1,
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ST_DIRTY = 2,
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ST_INIT = 3
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};
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// computeState - Given two states, compute the resulting state, in
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// the following way
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//
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// 1) One dirty state yields another dirty state
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// 2) All states must be clean for the result to be clean
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// 3) If none above and one unknown, the result state is also unknown
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//
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unsigned computeState(unsigned PrevState, unsigned CurState) {
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if (PrevState == ST_INIT)
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return CurState;
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if (PrevState == ST_DIRTY || CurState == ST_DIRTY)
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return ST_DIRTY;
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if (PrevState == ST_CLEAN && CurState == ST_CLEAN)
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return ST_CLEAN;
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return ST_UNKNOWN;
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}
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};
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char VZeroUpperInserter::ID = 0;
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}
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@ -49,37 +105,82 @@ FunctionPass *llvm::createX86IssueVZeroUpperPass() {
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return new VZeroUpperInserter();
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}
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static bool isYmmReg(unsigned Reg) {
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if (Reg >= X86::YMM0 && Reg <= X86::YMM15)
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return true;
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return false;
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}
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static bool checkFnHasLiveInYmm(MachineRegisterInfo &MRI) {
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for (MachineRegisterInfo::livein_iterator I = MRI.livein_begin(),
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E = MRI.livein_end(); I != E; ++I)
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if (isYmmReg(I->first))
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return true;
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return false;
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}
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static bool hasYmmReg(MachineInstr *MI) {
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for (int i = 0, e = MI->getNumOperands(); i != e; ++i) {
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const MachineOperand &MO = MI->getOperand(i);
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if (!MO.isReg())
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continue;
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if (MO.isDebug())
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continue;
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if (isYmmReg(MO.getReg()))
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return true;
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}
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return false;
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}
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/// runOnMachineFunction - Loop over all of the basic blocks, inserting
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/// vzero upper instructions before function calls.
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bool VZeroUpperInserter::runOnMachineFunction(MachineFunction &MF) {
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TII = MF.getTarget().getInstrInfo();
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bool Changed = false;
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MachineRegisterInfo &MRI = MF.getRegInfo();
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bool EverMadeChange = false;
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// Process any unreachable blocks in arbitrary order now.
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for (MachineFunction::iterator BB = MF.begin(), E = MF.end(); BB != E; ++BB)
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Changed |= processBasicBlock(MF, *BB);
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return Changed;
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}
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static bool isCallToModuleFn(const MachineInstr *MI) {
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assert(MI->getDesc().isCall() && "Isn't a call instruction");
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for (int i = 0, e = MI->getNumOperands(); i != e; ++i) {
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const MachineOperand &MO = MI->getOperand(i);
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if (!MO.isGlobal())
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continue;
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const GlobalValue *GV = MO.getGlobal();
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GlobalValue::LinkageTypes LT = GV->getLinkage();
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if (GV->isInternalLinkage(LT) || GV->isPrivateLinkage(LT) ||
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(GV->isExternalLinkage(LT) && !GV->isDeclaration()))
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return true;
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return false;
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// Fast check: if the function doesn't use any ymm registers, we don't need
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// to insert any VZEROUPPER instructions. This is constant-time, so it is
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// cheap in the common case of no ymm use.
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bool YMMUsed = false;
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TargetRegisterClass *RC = X86::VR256RegisterClass;
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for (TargetRegisterClass::iterator i = RC->begin(), e = RC->end();
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i != e; i++) {
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if (MRI.isPhysRegUsed(*i)) {
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YMMUsed = true;
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break;
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}
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}
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return false;
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if (!YMMUsed)
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return EverMadeChange;
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// Pre-compute the existence of any live-in YMM registers to this function
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FnHasLiveInYmm = checkFnHasLiveInYmm(MRI);
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assert(BBState.empty());
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BBState.resize(MF.getNumBlockIDs(), 0);
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BBSolved.resize(MF.getNumBlockIDs(), 0);
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// Each BB state depends on all predecessors, loop over until everything
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// converges. (Once we converge, we can implicitly mark everything that is
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// still ST_UNKNOWN as ST_CLEAN.)
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while (1) {
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bool MadeChange = false;
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// Process all basic blocks.
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for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I)
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MadeChange |= processBasicBlock(MF, *I);
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// If this iteration over the code changed anything, keep iterating.
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if (!MadeChange) break;
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EverMadeChange = true;
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}
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BBState.clear();
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BBSolved.clear();
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return EverMadeChange;
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}
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/// processBasicBlock - Loop over all of the instructions in the basic block,
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@ -87,19 +188,98 @@ static bool isCallToModuleFn(const MachineInstr *MI) {
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bool VZeroUpperInserter::processBasicBlock(MachineFunction &MF,
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MachineBasicBlock &BB) {
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bool Changed = false;
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unsigned BBNum = BB.getNumber();
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MBB = &BB;
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// Don't process already solved BBs
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if (BBSolved[BBNum])
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return false; // No changes
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// Check the state of all predecessors
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unsigned EntryState = ST_INIT;
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for (MachineBasicBlock::const_pred_iterator PI = BB.pred_begin(),
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PE = BB.pred_end(); PI != PE; ++PI) {
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EntryState = computeState(EntryState, BBState[(*PI)->getNumber()]);
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if (EntryState == ST_DIRTY)
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break;
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}
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// The entry MBB for the function may set the inital state to dirty if
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// the function receives any YMM incoming arguments
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if (MBB == MF.begin()) {
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EntryState = ST_CLEAN;
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if (FnHasLiveInYmm)
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EntryState = ST_DIRTY;
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}
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// The current state is initialized according to the predecessors
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unsigned CurState = EntryState;
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bool BBHasCall = false;
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for (MachineBasicBlock::iterator I = BB.begin(); I != BB.end(); ++I) {
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MachineInstr *MI = I;
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DebugLoc dl = I->getDebugLoc();
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bool isControlFlow = MI->getDesc().isCall() || MI->getDesc().isReturn();
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// Insert a vzeroupper instruction before each control transfer
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// to functions outside this module
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if (MI->getDesc().isCall() && !isCallToModuleFn(MI)) {
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BuildMI(*MBB, I, dl, TII->get(X86::VZEROUPPER));
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++NumVZU;
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// Shortcut: don't need to check regular instructions in dirty state.
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if (!isControlFlow && CurState == ST_DIRTY)
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continue;
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if (hasYmmReg(MI)) {
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// We found a ymm-using instruction; this could be an AVX instruction,
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// or it could be control flow.
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CurState = ST_DIRTY;
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continue;
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}
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// Check for control-flow out of the current function (which might
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// indirectly execute SSE instructions).
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if (!isControlFlow)
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continue;
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BBHasCall = true;
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// The VZEROUPPER instruction resets the upper 128 bits of all Intel AVX
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// registers. This instruction has zero latency. In addition, the processor
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// changes back to Clean state, after which execution of Intel SSE
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// instructions or Intel AVX instructions has no transition penalty. Add
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// the VZEROUPPER instruction before any function call/return that might
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// execute SSE code.
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// FIXME: In some cases, we may want to move the VZEROUPPER into a
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// predecessor block.
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if (CurState == ST_DIRTY) {
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// Only insert the VZEROUPPER in case the entry state isn't unknown.
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// When unknown, only compute the information within the block to have
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// it available in the exit if possible, but don't change the block.
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if (EntryState != ST_UNKNOWN) {
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BuildMI(*MBB, I, dl, TII->get(X86::VZEROUPPER));
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++NumVZU;
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}
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// After the inserted VZEROUPPER the state becomes clean again, but
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// other YMM may appear before other subsequent calls or even before
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// the end of the BB.
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CurState = ST_CLEAN;
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}
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}
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DEBUG(dbgs() << "MBB #" << BBNum
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<< ", current state: " << CurState << '\n');
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// A BB can only be considered solved when we both have done all the
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// necessary transformations, and have computed the exit state. This happens
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// in two cases:
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// 1) We know the entry state: this immediately implies the exit state and
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// all the necessary transformations.
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// 2) There are no calls, and and a non-call instruction marks this block:
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// no transformations are necessary, and we know the exit state.
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if (EntryState != ST_UNKNOWN || (!BBHasCall && CurState != ST_UNKNOWN))
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BBSolved[BBNum] = true;
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if (CurState != BBState[BBNum])
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Changed = true;
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BBState[BBNum] = CurState;
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return Changed;
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}
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@ -1,26 +1,83 @@
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; RUN: llc < %s -x86-use-vzeroupper -mtriple=x86_64-apple-darwin -mcpu=corei7-avx -mattr=+avx | FileCheck %s
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define <4 x float> @do_sse_local(<4 x float> %a) nounwind uwtable readnone ssp {
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entry:
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%add.i = fadd <4 x float> %a, %a
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ret <4 x float> %add.i
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}
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declare <4 x float> @do_sse(<4 x float>)
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declare <8 x float> @do_avx(<8 x float>)
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declare <4 x float> @llvm.x86.avx.vextractf128.ps.256(<8 x float>, i8) nounwind readnone
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@x = common global <4 x float> zeroinitializer, align 16
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@g = common global <8 x float> zeroinitializer, align 32
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;; Basic checking - don't emit any vzeroupper instruction
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; CHECK: _test00
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define <4 x float> @test00(<4 x float> %a, <4 x float> %b) nounwind uwtable ssp {
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entry:
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%add.i = fadd <4 x float> %a, %b
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; CHECK: vzeroupper
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; CHECK-NEXT: callq _do_sse
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%call3 = tail call <4 x float> @do_sse(<4 x float> %add.i) nounwind
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%sub.i = fsub <4 x float> %call3, %add.i
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; CHECK-NOT: vzeroupper
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; CHECK: callq _do_sse_local
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%call8 = tail call <4 x float> @do_sse_local(<4 x float> %sub.i)
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; CHECK: vzeroupper
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; CHECK-NEXT: jmp _do_sse
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%call10 = tail call <4 x float> @do_sse(<4 x float> %call8) nounwind
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ret <4 x float> %call10
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%add.i = fadd <4 x float> %a, %b
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%call3 = call <4 x float> @do_sse(<4 x float> %add.i) nounwind
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; CHECK: ret
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ret <4 x float> %call3
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}
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declare <4 x float> @do_sse(<4 x float>)
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;; Check parameter 256-bit parameter passing
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; CHECK: _test01
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define <8 x float> @test01(<4 x float> %a, <4 x float> %b, <8 x float> %c) nounwind uwtable ssp {
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entry:
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%tmp = load <4 x float>* @x, align 16
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; CHECK: vzeroupper
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; CHECK-NEXT: callq _do_sse
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%call = tail call <4 x float> @do_sse(<4 x float> %tmp) nounwind
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store <4 x float> %call, <4 x float>* @x, align 16
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; CHECK-NOT: vzeroupper
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; CHECK: callq _do_sse
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%call2 = tail call <4 x float> @do_sse(<4 x float> %call) nounwind
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store <4 x float> %call2, <4 x float>* @x, align 16
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; CHECK: ret
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ret <8 x float> %c
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}
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;; Test the pass convergence and also that vzeroupper is only issued when necessary,
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;; for this function it should be only once
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; CHECK: _test02
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define <4 x float> @test02(<4 x float> %a, <4 x float> %b) nounwind uwtable ssp {
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entry:
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%add.i = fadd <4 x float> %a, %b
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br label %for.body
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for.body: ; preds = %for.body, %entry
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; CHECK: LBB
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; CHECK-NOT: vzeroupper
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%i.018 = phi i32 [ 0, %entry ], [ %1, %for.body ]
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%c.017 = phi <4 x float> [ %add.i, %entry ], [ %call14, %for.body ]
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; CHECK: callq _do_sse
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%call5 = tail call <4 x float> @do_sse(<4 x float> %c.017) nounwind
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; CHECK-NEXT: callq _do_sse
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%call7 = tail call <4 x float> @do_sse(<4 x float> %call5) nounwind
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%tmp11 = load <8 x float>* @g, align 32
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%0 = tail call <4 x float> @llvm.x86.avx.vextractf128.ps.256(<8 x float> %tmp11, i8 1) nounwind
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; CHECK: vzeroupper
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; CHECK-NEXT: callq _do_sse
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%call14 = tail call <4 x float> @do_sse(<4 x float> %0) nounwind
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%1 = add nsw i32 %i.018, 1
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%exitcond = icmp eq i32 %1, 4
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br i1 %exitcond, label %for.end, label %for.body
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for.end: ; preds = %for.body
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ret <4 x float> %call14
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}
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;; Check that we also perform vzeroupper when we return from a function.
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; CHECK: _test03
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define <4 x float> @test03(<4 x float> %a, <4 x float> %b) nounwind uwtable ssp {
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entry:
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%shuf = shufflevector <4 x float> %a, <4 x float> %b, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
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; CHECK-NOT: vzeroupper
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; CHECK: call
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%call = call <8 x float> @do_avx(<8 x float> %shuf) nounwind
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%shuf2 = shufflevector <8 x float> %call, <8 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
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; CHECK: vzeroupper
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; CHECK: ret
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ret <4 x float> %shuf2
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}
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