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AMDGPU: Change control flow intrinsics to use amdgcn prefix

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These aren't supposed to be used outside of the backend,
so there aren't any users to worry about.

llvm-svn: 258516
This commit is contained in:
Matt Arsenault 2016-01-22 18:42:55 +00:00
parent d4ad2318d1
commit 720ce3fd59
3 changed files with 23 additions and 21 deletions
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14
lib/Target/AMDGPU/SIAnnotateControlFlow.cpp
View File

@ -34,13 +34,13 @@ typedef std::pair<BasicBlock *, Value *> StackEntry;
typedef SmallVector<StackEntry, 16> StackVector;
// Intrinsic names the control flow is annotated with
static const char *const IfIntrinsic = "llvm.SI.if";
static const char *const ElseIntrinsic = "llvm.SI.else";
static const char *const BreakIntrinsic = "llvm.SI.break";
static const char *const IfBreakIntrinsic = "llvm.SI.if.break";
static const char *const ElseBreakIntrinsic = "llvm.SI.else.break";
static const char *const LoopIntrinsic = "llvm.SI.loop";
static const char *const EndCfIntrinsic = "llvm.SI.end.cf";
static const char *const IfIntrinsic = "llvm.amdgcn.if";
static const char *const ElseIntrinsic = "llvm.amdgcn.else";
static const char *const BreakIntrinsic = "llvm.amdgcn.break";
static const char *const IfBreakIntrinsic = "llvm.amdgcn.if.break";
static const char *const ElseBreakIntrinsic = "llvm.amdgcn.else.break";
static const char *const LoopIntrinsic = "llvm.amdgcn.loop";
static const char *const EndCfIntrinsic = "llvm.amdgcn.end.cf";
class SIAnnotateControlFlow : public FunctionPass {

14
lib/Target/AMDGPU/SIInstructions.td
View File

@ -1874,14 +1874,14 @@ def SI_IF: InstSI <
(outs SReg_64:$dst),
(ins SReg_64:$vcc, brtarget:$target),
"",
[(set i64:$dst, (int_SI_if i1:$vcc, bb:$target))]
[(set i64:$dst, (int_amdgcn_if i1:$vcc, bb:$target))]
>;
def SI_ELSE : InstSI <
(outs SReg_64:$dst),
(ins SReg_64:$src, brtarget:$target),
"",
[(set i64:$dst, (int_SI_else i64:$src, bb:$target))]
[(set i64:$dst, (int_amdgcn_else i64:$src, bb:$target))]
> {
let Constraints = "$src = $dst";
}
@ -1890,7 +1890,7 @@ def SI_LOOP : InstSI <
(outs),
(ins SReg_64:$saved, brtarget:$target),
"si_loop $saved, $target",
[(int_SI_loop i64:$saved, bb:$target)]
[(int_amdgcn_loop i64:$saved, bb:$target)]
>;
} // end isBranch = 1, isTerminator = 1
@ -1899,28 +1899,28 @@ def SI_BREAK : InstSI <
(outs SReg_64:$dst),
(ins SReg_64:$src),
"si_else $dst, $src",
[(set i64:$dst, (int_SI_break i64:$src))]
[(set i64:$dst, (int_amdgcn_break i64:$src))]
>;
def SI_IF_BREAK : InstSI <
(outs SReg_64:$dst),
(ins SReg_64:$vcc, SReg_64:$src),
"si_if_break $dst, $vcc, $src",
[(set i64:$dst, (int_SI_if_break i1:$vcc, i64:$src))]
[(set i64:$dst, (int_amdgcn_if_break i1:$vcc, i64:$src))]
>;
def SI_ELSE_BREAK : InstSI <
(outs SReg_64:$dst),
(ins SReg_64:$src0, SReg_64:$src1),
"si_else_break $dst, $src0, $src1",
[(set i64:$dst, (int_SI_else_break i64:$src0, i64:$src1))]
[(set i64:$dst, (int_amdgcn_else_break i64:$src0, i64:$src1))]
>;
def SI_END_CF : InstSI <
(outs),
(ins SReg_64:$saved),
"si_end_cf $saved",
[(int_SI_end_cf i64:$saved)]
[(int_amdgcn_end_cf i64:$saved)]
>;
} // End Uses = [EXEC], Defs = [EXEC]

16
lib/Target/AMDGPU/SIIntrinsics.td
View File

@ -186,14 +186,16 @@ let TargetPrefix = "SI", isTarget = 1 in {
def int_SI_fs_constant : Intrinsic <[llvm_float_ty], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
def int_SI_fs_interp : Intrinsic <[llvm_float_ty], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_v2i32_ty], [IntrNoMem]>;
} // End TargetPrefix = "SI", isTarget = 1
let TargetPrefix = "amdgcn", isTarget = 1 in {
/* Control flow Intrinsics */
def int_SI_if : Intrinsic<[llvm_i64_ty], [llvm_i1_ty, llvm_empty_ty], []>;
def int_SI_else : Intrinsic<[llvm_i64_ty], [llvm_i64_ty, llvm_empty_ty], []>;
def int_SI_break : Intrinsic<[llvm_i64_ty], [llvm_i64_ty], []>;
def int_SI_if_break : Intrinsic<[llvm_i64_ty], [llvm_i1_ty, llvm_i64_ty], []>;
def int_SI_else_break : Intrinsic<[llvm_i64_ty], [llvm_i64_ty, llvm_i64_ty], []>;
def int_SI_loop : Intrinsic<[], [llvm_i64_ty, llvm_empty_ty], []>;
def int_SI_end_cf : Intrinsic<[], [llvm_i64_ty], []>;
def int_amdgcn_if : Intrinsic<[llvm_i64_ty], [llvm_i1_ty, llvm_empty_ty], []>;
def int_amdgcn_else : Intrinsic<[llvm_i64_ty], [llvm_i64_ty, llvm_empty_ty], []>;
def int_amdgcn_break : Intrinsic<[llvm_i64_ty], [llvm_i64_ty], []>;
def int_amdgcn_if_break : Intrinsic<[llvm_i64_ty], [llvm_i1_ty, llvm_i64_ty], []>;
def int_amdgcn_else_break : Intrinsic<[llvm_i64_ty], [llvm_i64_ty, llvm_i64_ty], []>;
def int_amdgcn_loop : Intrinsic<[], [llvm_i64_ty, llvm_empty_ty], []>;
def int_amdgcn_end_cf : Intrinsic<[], [llvm_i64_ty], []>;
}