RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2025-02-02 18:31:54 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity

[Codegen] fix typos in test case

Browse Source 
llvm-svn: 355264
This commit is contained in:
Xing GUO 2019-03-02 08:03:59 +00:00
parent 8d4f850499
commit 957010e4ff
3 changed files with 5 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
test/CodeGen/AArch64/arm64-neon-2velem.ll
View File

@ -559,9 +559,9 @@ entry:
}
define double @test_vfmsd_lane_f64_0(double %a, double %b, <1 x double> %v) {
; CHCK-LABEL: test_vfmsd_lane_f64_0
; CHCK: fmsub {{d[0-9]+}}, {{d[0-9]+}}, {{d[0-9]+}}, {{d[0-9]+}}
; CHCK-NEXT: ret
; CHECK-LABEL: test_vfmsd_lane_f64_0
; CHECK: fmsub {{d[0-9]+}}, {{d[0-9]+}}, {{d[0-9]+}}, {{d[0-9]+}}
; CHECK-NEXT: ret
entry:
%tmp0 = fsub <1 x double> <double -0.000000e+00>, %v
%tmp1 = extractelement <1 x double> %tmp0, i32 0

2
test/CodeGen/AMDGPU/rewrite-out-arguments.ll
View File

@ -282,7 +282,7 @@ ret1:
; CHECK-NEXT: %2 = call %void_one_out_arg_v2i32_1_use @void_one_out_arg_v2i32_1_use.body(<2 x i32>* undef)
; CHECK-NEXT: %3 = extractvalue %void_one_out_arg_v2i32_1_use %2, 0
; CHECK-NEXT: store <2 x i32> %3, <2 x i32>* %0, align 8
; CHCEK-NEXT: ret void
; CHECK-NEXT: ret void
define void @void_one_out_arg_v2i32_1_use(<2 x i32>* %val) #0 {
store <2 x i32> <i32 17, i32 9>, <2 x i32>* %val
ret void

2
test/CodeGen/NVPTX/param-load-store.ll
View File

@ -516,7 +516,7 @@ define <3 x i32> @test_v3i32(<3 x i32> %a) {
; CHECK-NEXT: test_v4i32,
; CHECK: ld.param.v4.b32 {[[RE0:%r[0-9]+]], [[RE1:%r[0-9]+]], [[RE2:%r[0-9]+]], [[RE3:%r[0-9]+]]}, [retval0+0];
; CHECK: st.param.v4.b32 [func_retval0+0], {[[RE0]], [[RE1]], [[RE2]], [[RE3]]}
; CHCK-NEXT: ret;
; CHECK-NEXT: ret;
define <4 x i32> @test_v4i32(<4 x i32> %a) {
%r = tail call <4 x i32> @test_v4i32(<4 x i32> %a);
ret <4 x i32> %r;