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Fix a miscompilation from Dan's recent apintification.
llvm-svn: 47128
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@ -1437,12 +1437,10 @@ void SelectionDAG::ComputeMaskedBits(SDOperand Op, const APInt &Mask,
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// We know that the top bits of C-X are clear if X contains less bits
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// We know that the top bits of C-X are clear if X contains less bits
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// than C (i.e. no wrap-around can happen). For example, 20-X is
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// than C (i.e. no wrap-around can happen). For example, 20-X is
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// positive if we can prove that X is >= 0 and < 16.
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// positive if we can prove that X is >= 0 and < 16.
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// sign bit clear
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if (CLHS->getAPIntValue().isNonNegative()) {
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if (CLHS->getAPIntValue().isNonNegative()) {
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unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
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unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
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// NLZ can't be BitWidth with no sign bit
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// NLZ can't be BitWidth with no sign bit
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APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ);
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APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
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ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero, KnownOne, Depth+1);
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ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero, KnownOne, Depth+1);
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// If all of the MaskV bits are known to be zero, then we know the output
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// If all of the MaskV bits are known to be zero, then we know the output
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8
test/CodeGen/X86/2008-02-14-BitMiscompile.ll
Normal file
8
test/CodeGen/X86/2008-02-14-BitMiscompile.ll
Normal file
@ -0,0 +1,8 @@
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; RUN: llvm-as < %s | llc -march=x86 | grep and
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define i32 @test(i1 %A) {
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%B = zext i1 %A to i32 ; <i32> [#uses=1]
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%C = sub i32 0, %B ; <i32> [#uses=1]
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%D = and i32 %C, 255 ; <i32> [#uses=1]
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ret i32 %D
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}
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