Refactor instprinter and mcdisassembler to take a SubtargetInfo. Add -mattr= handling to llvm-mc. Reviewed by Owen Anderson.

llvm-svn: 139237
This commit is contained in:
James Molloy 2011-09-07 17:24:38 +00:00
parent b027f19035
commit f781d3d8e9
24 changed files with 133 additions and 57 deletions

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@ -15,6 +15,7 @@
namespace llvm {
class MCInst;
class MCSubtargetInfo;
class MemoryObject;
class raw_ostream;
class MCContext;
@ -54,7 +55,7 @@ public:
};
/// Constructor - Performs initial setup for the disassembler.
MCDisassembler() : GetOpInfo(0), DisInfo(0), Ctx(0) {}
MCDisassembler(const MCSubtargetInfo &STI) : GetOpInfo(0), DisInfo(0), Ctx(0), STI(STI) {}
virtual ~MCDisassembler();
@ -98,6 +99,9 @@ private:
// The assembly context for creating symbols and MCExprs in place of
// immediate operands when there is symbolic information.
MCContext *Ctx;
protected:
// Subtarget information, for instruction decoding predicates if required.
const MCSubtargetInfo &STI;
public:
void setupForSymbolicDisassembly(LLVMOpInfoCallback getOpInfo,

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@ -94,10 +94,12 @@ namespace llvm {
const MCAsmInfo &MAI);
typedef MCTargetAsmParser *(*MCAsmParserCtorTy)(MCSubtargetInfo &STI,
MCAsmParser &P);
typedef MCDisassembler *(*MCDisassemblerCtorTy)(const Target &T);
typedef MCDisassembler *(*MCDisassemblerCtorTy)(const Target &T,
const MCSubtargetInfo &STI);
typedef MCInstPrinter *(*MCInstPrinterCtorTy)(const Target &T,
unsigned SyntaxVariant,
const MCAsmInfo &MAI);
const MCAsmInfo &MAI,
const MCSubtargetInfo &STI);
typedef MCCodeEmitter *(*MCCodeEmitterCtorTy)(const MCInstrInfo &II,
const MCSubtargetInfo &STI,
MCContext &Ctx);
@ -373,17 +375,18 @@ namespace llvm {
return AsmPrinterCtorFn(TM, Streamer);
}
MCDisassembler *createMCDisassembler() const {
MCDisassembler *createMCDisassembler(const MCSubtargetInfo &STI) const {
if (!MCDisassemblerCtorFn)
return 0;
return MCDisassemblerCtorFn(*this);
return MCDisassemblerCtorFn(*this, STI);
}
MCInstPrinter *createMCInstPrinter(unsigned SyntaxVariant,
const MCAsmInfo &MAI) const {
const MCAsmInfo &MAI,
const MCSubtargetInfo &STI) const {
if (!MCInstPrinterCtorFn)
return 0;
return MCInstPrinterCtorFn(*this, SyntaxVariant, MAI);
return MCInstPrinterCtorFn(*this, SyntaxVariant, MAI, STI);
}

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@ -131,13 +131,14 @@ bool LLVMTargetMachine::addPassesToEmitFile(PassManagerBase &PM,
Context->setAllowTemporaryLabels(false);
const MCAsmInfo &MAI = *getMCAsmInfo();
const MCSubtargetInfo &STI = getSubtarget<MCSubtargetInfo>();
OwningPtr<MCStreamer> AsmStreamer;
switch (FileType) {
default: return true;
case CGFT_AssemblyFile: {
MCInstPrinter *InstPrinter =
getTarget().createMCInstPrinter(MAI.getAssemblerDialect(), MAI);
getTarget().createMCInstPrinter(MAI.getAssemblerDialect(), MAI, STI);
// Create a code emitter if asked to show the encoding.
MCCodeEmitter *MCE = 0;
@ -161,7 +162,6 @@ bool LLVMTargetMachine::addPassesToEmitFile(PassManagerBase &PM,
case CGFT_ObjectFile: {
// Create the code emitter for the target if it exists. If not, .o file
// emission fails.
const MCSubtargetInfo &STI = getSubtarget<MCSubtargetInfo>();
MCCodeEmitter *MCE = getTarget().createMCCodeEmitter(*getInstrInfo(), STI,
*Context);
MCAsmBackend *MAB = getTarget().createMCAsmBackend(getTargetTriple());

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@ -57,19 +57,23 @@ LLVMDisasmContextRef LLVMCreateDisasm(const char *TripleName, void *DisInfo,
std::string FeaturesStr;
std::string CPU;
const MCSubtargetInfo *STI = TheTarget->createMCSubtargetInfo(TripleName, CPU,
FeaturesStr);
assert(STI && "Unable to create subtarget info!");
// Set up the MCContext for creating symbols and MCExpr's.
MCContext *Ctx = new MCContext(*MAI, *MRI, 0);
assert(Ctx && "Unable to create MCContext!");
// Set up disassembler.
MCDisassembler *DisAsm = TheTarget->createMCDisassembler();
MCDisassembler *DisAsm = TheTarget->createMCDisassembler(*STI);
assert(DisAsm && "Unable to create disassembler!");
DisAsm->setupForSymbolicDisassembly(GetOpInfo, DisInfo, Ctx);
// Set up the instruction printer.
int AsmPrinterVariant = MAI->getAssemblerDialect();
MCInstPrinter *IP = TheTarget->createMCInstPrinter(AsmPrinterVariant,
*MAI);
*MAI, *STI);
assert(IP && "Unable to create instruction printer!");
LLVMDisasmContext *DC = new LLVMDisasmContext(TripleName, DisInfo, TagType,

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@ -178,7 +178,12 @@ EDDisassembler::EDDisassembler(CPUKey &key) :
if (!AsmInfo)
return;
Disassembler.reset(Tgt->createMCDisassembler());
STI.reset(Tgt->createMCSubtargetInfo(tripleString, "", ""));
if (!STI)
return;
Disassembler.reset(Tgt->createMCDisassembler(*STI));
if (!Disassembler)
return;
@ -187,7 +192,7 @@ EDDisassembler::EDDisassembler(CPUKey &key) :
InstString.reset(new std::string);
InstStream.reset(new raw_string_ostream(*InstString));
InstPrinter.reset(Tgt->createMCInstPrinter(LLVMSyntaxVariant, *AsmInfo));
InstPrinter.reset(Tgt->createMCInstPrinter(LLVMSyntaxVariant, *AsmInfo, *STI));
if (!InstPrinter)
return;

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@ -137,6 +137,8 @@ struct EDDisassembler {
const llvm::Target *Tgt;
/// The assembly information for the target architecture
llvm::OwningPtr<const llvm::MCAsmInfo> AsmInfo;
/// The subtarget information for the target architecture
llvm::OwningPtr<const llvm::MCSubtargetInfo> STI;
// The register information for the target architecture.
llvm::OwningPtr<const llvm::MCRegisterInfo> MRI;
/// The disassembler for the target architecture

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@ -11,6 +11,7 @@
#include "ARM.h"
#include "ARMRegisterInfo.h"
#include "ARMSubtarget.h"
#include "MCTargetDesc/ARMAddressingModes.h"
#include "MCTargetDesc/ARMBaseInfo.h"
#include "llvm/MC/EDInstInfo.h"
@ -34,8 +35,8 @@ class ARMDisassembler : public MCDisassembler {
public:
/// Constructor - Initializes the disassembler.
///
ARMDisassembler() :
MCDisassembler() {
ARMDisassembler(const MCSubtargetInfo &STI) :
MCDisassembler(STI) {
}
~ARMDisassembler() {
@ -58,8 +59,8 @@ class ThumbDisassembler : public MCDisassembler {
public:
/// Constructor - Initializes the disassembler.
///
ThumbDisassembler() :
MCDisassembler() {
ThumbDisassembler(const MCSubtargetInfo &STI) :
MCDisassembler(STI) {
}
~ThumbDisassembler() {
@ -296,12 +297,12 @@ static DecodeStatus DecodeIT(llvm::MCInst &Inst, unsigned Val,
#include "ARMGenInstrInfo.inc"
#include "ARMGenEDInfo.inc"
static MCDisassembler *createARMDisassembler(const Target &T) {
return new ARMDisassembler;
static MCDisassembler *createARMDisassembler(const Target &T, const MCSubtargetInfo &STI) {
return new ARMDisassembler(STI);
}
static MCDisassembler *createThumbDisassembler(const Target &T) {
return new ThumbDisassembler;
static MCDisassembler *createThumbDisassembler(const Target &T, const MCSubtargetInfo &STI) {
return new ThumbDisassembler(STI);
}
EDInstInfo *ARMDisassembler::getEDInfo() const {

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@ -35,6 +35,14 @@ static unsigned translateShiftImm(unsigned imm) {
return imm;
}
ARMInstPrinter::ARMInstPrinter(const MCAsmInfo &MAI,
const MCSubtargetInfo &STI) :
MCInstPrinter(MAI) {
// Initialize the set of available features.
setAvailableFeatures(STI.getFeatureBits());
}
StringRef ARMInstPrinter::getOpcodeName(unsigned Opcode) const {
return getInstructionName(Opcode);
}

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@ -15,6 +15,7 @@
#define ARMINSTPRINTER_H
#include "llvm/MC/MCInstPrinter.h"
#include "llvm/MC/MCSubtargetInfo.h"
namespace llvm {
@ -22,8 +23,7 @@ class MCOperand;
class ARMInstPrinter : public MCInstPrinter {
public:
ARMInstPrinter(const MCAsmInfo &MAI)
: MCInstPrinter(MAI) {}
ARMInstPrinter(const MCAsmInfo &MAI, const MCSubtargetInfo &STI);
virtual void printInst(const MCInst *MI, raw_ostream &O);
virtual StringRef getOpcodeName(unsigned Opcode) const;

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@ -164,9 +164,10 @@ static MCStreamer *createMCStreamer(const Target &T, StringRef TT,
static MCInstPrinter *createARMMCInstPrinter(const Target &T,
unsigned SyntaxVariant,
const MCAsmInfo &MAI) {
const MCAsmInfo &MAI,
const MCSubtargetInfo &STI) {
if (SyntaxVariant == 0)
return new ARMInstPrinter(MAI);
return new ARMInstPrinter(MAI, STI);
return 0;
}

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@ -696,8 +696,9 @@ MCDisassembler::DecodeStatus MBlazeDisassembler::getInstruction(MCInst &instr,
return Success;
}
static MCDisassembler *createMBlazeDisassembler(const Target &T) {
return new MBlazeDisassembler;
static MCDisassembler *createMBlazeDisassembler(const Target &T,
const MCSubtargetInfo &STI) {
return new MBlazeDisassembler(STI);
}
extern "C" void LLVMInitializeMBlazeDisassembler() {

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@ -32,8 +32,8 @@ class MBlazeDisassembler : public MCDisassembler {
public:
/// Constructor - Initializes the disassembler.
///
MBlazeDisassembler() :
MCDisassembler() {
MBlazeDisassembler(const MCSubtargetInfo &STI) :
MCDisassembler(STI) {
}
~MBlazeDisassembler() {

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@ -95,7 +95,8 @@ static MCStreamer *createMCStreamer(const Target &T, StringRef TT,
static MCInstPrinter *createMBlazeMCInstPrinter(const Target &T,
unsigned SyntaxVariant,
const MCAsmInfo &MAI) {
const MCAsmInfo &MAI,
const MCSubtargetInfo &STI) {
if (SyntaxVariant == 0)
return new MBlazeInstPrinter(MAI);
return 0;

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@ -22,7 +22,7 @@ namespace llvm {
class MSP430InstPrinter : public MCInstPrinter {
public:
MSP430InstPrinter(const MCAsmInfo &MAI)
: MCInstPrinter(MAI) {}
: MCInstPrinter(MAI) {}
virtual void printInst(const MCInst *MI, raw_ostream &O);

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@ -59,7 +59,8 @@ static MCCodeGenInfo *createMSP430MCCodeGenInfo(StringRef TT, Reloc::Model RM,
static MCInstPrinter *createMSP430MCInstPrinter(const Target &T,
unsigned SyntaxVariant,
const MCAsmInfo &MAI) {
const MCAsmInfo &MAI,
const MCSubtargetInfo &STI) {
if (SyntaxVariant == 0)
return new MSP430InstPrinter(MAI);
return 0;

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@ -78,7 +78,8 @@ static MCCodeGenInfo *createMipsMCCodeGenInfo(StringRef TT, Reloc::Model RM,
static MCInstPrinter *createMipsMCInstPrinter(const Target &T,
unsigned SyntaxVariant,
const MCAsmInfo &MAI) {
const MCAsmInfo &MAI,
const MCSubtargetInfo &STI) {
return new MipsInstPrinter(MAI);
}

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@ -105,7 +105,8 @@ static MCStreamer *createMCStreamer(const Target &T, StringRef TT,
static MCInstPrinter *createPPCMCInstPrinter(const Target &T,
unsigned SyntaxVariant,
const MCAsmInfo &MAI) {
const MCAsmInfo &MAI,
const MCSubtargetInfo &STI) {
return new PPCInstPrinter(MAI, SyntaxVariant);
}

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@ -21,6 +21,7 @@
#include "llvm/MC/MCDisassembler.h"
#include "llvm/MC/MCDisassembler.h"
#include "llvm/MC/MCInst.h"
#include "llvm/MC/MCSubtargetInfo.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/MemoryObject.h"
#include "llvm/Support/TargetRegistry.h"
@ -66,8 +67,8 @@ extern Target TheX86_32Target, TheX86_64Target;
static bool translateInstruction(MCInst &target,
InternalInstruction &source);
X86GenericDisassembler::X86GenericDisassembler(DisassemblerMode mode) :
MCDisassembler(),
X86GenericDisassembler::X86GenericDisassembler(const MCSubtargetInfo &STI, DisassemblerMode mode) :
MCDisassembler(STI),
fMode(mode) {
}
@ -578,12 +579,12 @@ static bool translateInstruction(MCInst &mcInst,
return false;
}
static MCDisassembler *createX86_32Disassembler(const Target &T) {
return new X86Disassembler::X86_32Disassembler;
static MCDisassembler *createX86_32Disassembler(const Target &T, const MCSubtargetInfo &STI) {
return new X86Disassembler::X86_32Disassembler(STI);
}
static MCDisassembler *createX86_64Disassembler(const Target &T) {
return new X86Disassembler::X86_64Disassembler;
static MCDisassembler *createX86_64Disassembler(const Target &T, const MCSubtargetInfo &STI) {
return new X86Disassembler::X86_64Disassembler(STI);
}
extern "C" void LLVMInitializeX86Disassembler() {

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@ -92,6 +92,7 @@ struct InternalInstruction;
namespace llvm {
class MCInst;
class MCSubtargetInfo;
class MemoryObject;
class raw_ostream;
@ -107,7 +108,7 @@ protected:
/// Constructor - Initializes the disassembler.
///
/// @param mode - The X86 architecture mode to decode for.
X86GenericDisassembler(DisassemblerMode mode);
X86GenericDisassembler(const MCSubtargetInfo &STI, DisassemblerMode mode);
public:
~X86GenericDisassembler();
@ -127,24 +128,24 @@ private:
/// X86_16Disassembler - 16-bit X86 disassembler.
class X86_16Disassembler : public X86GenericDisassembler {
public:
X86_16Disassembler() :
X86GenericDisassembler(MODE_16BIT) {
X86_16Disassembler(const MCSubtargetInfo &STI) :
X86GenericDisassembler(STI, MODE_16BIT) {
}
};
/// X86_16Disassembler - 32-bit X86 disassembler.
class X86_32Disassembler : public X86GenericDisassembler {
public:
X86_32Disassembler() :
X86GenericDisassembler(MODE_32BIT) {
X86_32Disassembler(const MCSubtargetInfo &STI) :
X86GenericDisassembler(STI, MODE_32BIT) {
}
};
/// X86_16Disassembler - 64-bit X86 disassembler.
class X86_64Disassembler : public X86GenericDisassembler {
public:
X86_64Disassembler() :
X86GenericDisassembler(MODE_64BIT) {
X86_64Disassembler(const MCSubtargetInfo &STI) :
X86GenericDisassembler(STI, MODE_64BIT) {
}
};

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@ -394,7 +394,8 @@ static MCStreamer *createMCStreamer(const Target &T, StringRef TT,
static MCInstPrinter *createX86MCInstPrinter(const Target &T,
unsigned SyntaxVariant,
const MCAsmInfo &MAI) {
const MCAsmInfo &MAI,
const MCSubtargetInfo &STI) {
if (SyntaxVariant == 0)
return new X86ATTInstPrinter(MAI);
if (SyntaxVariant == 1)

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@ -21,6 +21,7 @@
#include "llvm/MC/MCDisassembler.h"
#include "llvm/MC/MCInst.h"
#include "llvm/MC/MCInstPrinter.h"
#include "llvm/MC/MCSubtargetInfo.h"
#include "llvm/ADT/OwningPtr.h"
#include "llvm/ADT/Triple.h"
#include "llvm/ADT/Twine.h"
@ -140,6 +141,8 @@ static bool ByteArrayFromString(ByteArrayTy &ByteArray,
int Disassembler::disassemble(const Target &T,
const std::string &Triple,
const std::string &Cpu,
const std::string &FeaturesStr,
MemoryBuffer &Buffer,
raw_ostream &Out) {
// Set up disassembler.
@ -150,7 +153,13 @@ int Disassembler::disassemble(const Target &T,
return -1;
}
OwningPtr<const MCDisassembler> DisAsm(T.createMCDisassembler());
OwningPtr<const MCSubtargetInfo> STI(T.createMCSubtargetInfo(Triple, Cpu, FeaturesStr));
if (!STI) {
errs() << "error: no subtarget info for target " << Triple << "\n";
return -1;
}
OwningPtr<const MCDisassembler> DisAsm(T.createMCDisassembler(*STI));
if (!DisAsm) {
errs() << "error: no disassembler for target " << Triple << "\n";
return -1;
@ -158,7 +167,7 @@ int Disassembler::disassemble(const Target &T,
int AsmPrinterVariant = AsmInfo->getAssemblerDialect();
OwningPtr<MCInstPrinter> IP(T.createMCInstPrinter(AsmPrinterVariant,
*AsmInfo));
*AsmInfo, *STI));
if (!IP) {
errs() << "error: no instruction printer for target " << Triple << '\n';
return -1;

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@ -27,6 +27,8 @@ class Disassembler {
public:
static int disassemble(const Target &target,
const std::string &tripleString,
const std::string &Cpu,
const std::string &FeaturesStr,
MemoryBuffer &buffer,
raw_ostream &Out);

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@ -108,6 +108,12 @@ MCPU("mcpu",
cl::value_desc("cpu-name"),
cl::init(""));
static cl::list<std::string>
MAttrs("mattr",
cl::CommaSeparated,
cl::desc("Target specific attributes (-mattr=help for details)"),
cl::value_desc("a1,+a2,-a3,..."));
static cl::opt<Reloc::Model>
RelocModel("relocation-model",
cl::desc("Choose relocation model"),
@ -361,9 +367,6 @@ static int AssembleInput(const char *ProgName) {
llvm::OwningPtr<MCRegisterInfo> MRI(TheTarget->createMCRegInfo(TripleName));
assert(MRI && "Unable to create target register info!");
// Package up features to be passed to target/subtarget
std::string FeaturesStr;
// FIXME: This is not pretty. MCContext has a ptr to MCObjectFileInfo and
// MCObjectFileInfo needs a MCContext reference in order to initialize itself.
OwningPtr<MCObjectFileInfo> MOFI(new MCObjectFileInfo());
@ -373,6 +376,15 @@ static int AssembleInput(const char *ProgName) {
if (SaveTempLabels)
Ctx.setAllowTemporaryLabels(false);
// Package up features to be passed to target/subtarget
std::string FeaturesStr;
if (MAttrs.size()) {
SubtargetFeatures Features;
for (unsigned i = 0; i != MAttrs.size(); ++i)
Features.AddFeature(MAttrs[i]);
FeaturesStr = Features.getString();
}
OwningPtr<tool_output_file> Out(GetOutputStream());
if (!Out)
return 1;
@ -387,7 +399,7 @@ static int AssembleInput(const char *ProgName) {
// FIXME: There is a bit of code duplication with addPassesToEmitFile.
if (FileType == OFT_AssemblyFile) {
MCInstPrinter *IP =
TheTarget->createMCInstPrinter(OutputAsmVariant, *MAI);
TheTarget->createMCInstPrinter(OutputAsmVariant, *MAI, *STI);
MCCodeEmitter *CE = 0;
MCAsmBackend *MAB = 0;
if (ShowEncoding) {
@ -453,7 +465,16 @@ static int DisassembleInput(const char *ProgName, bool Enhanced) {
Res =
Disassembler::disassembleEnhanced(TripleName, *Buffer.take(), Out->os());
} else {
Res = Disassembler::disassemble(*TheTarget, TripleName,
// Package up features to be passed to target/subtarget
std::string FeaturesStr;
if (MAttrs.size()) {
SubtargetFeatures Features;
for (unsigned i = 0; i != MAttrs.size(); ++i)
Features.AddFeature(MAttrs[i]);
FeaturesStr = Features.getString();
}
Res = Disassembler::disassemble(*TheTarget, TripleName, MCPU, FeaturesStr,
*Buffer.take(), Out->os());
}

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@ -25,6 +25,7 @@
#include "llvm/MC/MCInstrAnalysis.h"
#include "llvm/MC/MCInstrDesc.h"
#include "llvm/MC/MCInstrInfo.h"
#include "llvm/MC/MCSubtargetInfo.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/Format.h"
@ -217,7 +218,14 @@ static void DisassembleInput(const StringRef &Filename) {
return;
}
OwningPtr<const MCDisassembler> DisAsm(TheTarget->createMCDisassembler());
OwningPtr<const MCSubtargetInfo> STI(TheTarget->createMCSubtargetInfo(TripleName, "", ""));
if (!STI) {
errs() << "error: no subtarget info for target " << TripleName << "\n";
return;
}
OwningPtr<const MCDisassembler> DisAsm(TheTarget->createMCDisassembler(*STI));
if (!DisAsm) {
errs() << "error: no disassembler for target " << TripleName << "\n";
return;
@ -225,7 +233,7 @@ static void DisassembleInput(const StringRef &Filename) {
int AsmPrinterVariant = AsmInfo->getAssemblerDialect();
OwningPtr<MCInstPrinter> IP(TheTarget->createMCInstPrinter(
AsmPrinterVariant, *AsmInfo));
AsmPrinterVariant, *AsmInfo, *STI));
if (!IP) {
errs() << "error: no instruction printer for target " << TripleName << '\n';
return;