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271 lines
9.6 KiB
C++
271 lines
9.6 KiB
C++
//===-- EDDisassembler.h - LLVM Enhanced Disassembler -----------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file defines the interface for the Enhanced Disassembly library's
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// disassembler class. The disassembler is responsible for vending individual
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// instructions according to a given architecture and disassembly syntax.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_EDDISASSEMBLER_H
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#define LLVM_EDDISASSEMBLER_H
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#include "EDInfo.h"
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#include "llvm/ADT/OwningPtr.h"
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#include "llvm/ADT/Triple.h"
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#include "llvm/Support/raw_ostream.h"
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#include "llvm/Support/Mutex.h"
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#include <map>
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#include <set>
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#include <vector>
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namespace llvm {
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class AsmLexer;
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class AsmParser;
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class AsmToken;
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class MCContext;
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class MCAsmInfo;
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class MCAsmLexer;
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class MCDisassembler;
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class MCInstPrinter;
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class MCInst;
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class MCParsedAsmOperand;
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class MCRegisterInfo;
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class MCStreamer;
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class MCSubtargetInfo;
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class MCTargetAsmLexer;
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class MCTargetAsmParser;
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template <typename T> class SmallVectorImpl;
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class SourceMgr;
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class Target;
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struct EDInstInfo;
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struct EDInst;
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struct EDOperand;
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struct EDToken;
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typedef int (*EDByteReaderCallback)(uint8_t *byte, uint64_t address, void *arg);
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/// EDDisassembler - Encapsulates a disassembler for a single architecture and
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/// disassembly syntax. Also manages the static disassembler registry.
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struct EDDisassembler {
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typedef enum {
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/*! @constant kEDAssemblySyntaxX86Intel Intel syntax for i386 and x86_64. */
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kEDAssemblySyntaxX86Intel = 0,
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/*! @constant kEDAssemblySyntaxX86ATT AT&T syntax for i386 and x86_64. */
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kEDAssemblySyntaxX86ATT = 1,
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kEDAssemblySyntaxARMUAL = 2
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} AssemblySyntax;
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////////////////////
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// Static members //
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////////////////////
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/// CPUKey - Encapsulates the descriptor of an architecture/disassembly-syntax
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/// pair
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struct CPUKey {
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/// The architecture type
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llvm::Triple::ArchType Arch;
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/// The assembly syntax
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AssemblySyntax Syntax;
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/// operator== - Equality operator
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bool operator==(const CPUKey &key) const {
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return (Arch == key.Arch &&
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Syntax == key.Syntax);
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}
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/// operator< - Less-than operator
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bool operator<(const CPUKey &key) const {
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return ((Arch < key.Arch) ||
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((Arch == key.Arch) && Syntax < (key.Syntax)));
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}
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};
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typedef std::map<CPUKey, EDDisassembler*> DisassemblerMap_t;
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/// True if the disassembler registry has been initialized; false if not
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static bool sInitialized;
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/// A map from disassembler specifications to disassemblers. Populated
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/// lazily.
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static DisassemblerMap_t sDisassemblers;
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/// getDisassembler - Returns the specified disassemble, or NULL on failure
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///
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/// @arg arch - The desired architecture
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/// @arg syntax - The desired disassembly syntax
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static EDDisassembler *getDisassembler(llvm::Triple::ArchType arch,
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AssemblySyntax syntax);
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/// getDisassembler - Returns the disassembler for a given combination of
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/// CPU type, CPU subtype, and assembly syntax, or NULL on failure
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///
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/// @arg str - The string representation of the architecture triple, e.g.,
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/// "x86_64-apple-darwin"
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/// @arg syntax - The disassembly syntax for the required disassembler
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static EDDisassembler *getDisassembler(llvm::StringRef str,
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AssemblySyntax syntax);
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/// initialize - Initializes the disassembler registry and the LLVM backend
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static void initialize();
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////////////////////////
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// Per-object members //
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////////////////////////
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/// True only if the object has been successfully initialized
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bool Valid;
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/// True if the disassembler can provide semantic information
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bool HasSemantics;
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/// The stream to write errors to
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llvm::raw_ostream &ErrorStream;
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/// The architecture/syntax pair for the current architecture
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CPUKey Key;
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/// The LLVM target corresponding to the disassembler
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const llvm::Target *Tgt;
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/// The assembly information for the target architecture
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llvm::OwningPtr<const llvm::MCAsmInfo> AsmInfo;
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/// The subtarget information for the target architecture
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llvm::OwningPtr<const llvm::MCSubtargetInfo> STI;
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// The register information for the target architecture.
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llvm::OwningPtr<const llvm::MCRegisterInfo> MRI;
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/// The disassembler for the target architecture
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llvm::OwningPtr<const llvm::MCDisassembler> Disassembler;
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/// The output string for the instruction printer; must be guarded with
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/// PrinterMutex
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llvm::OwningPtr<std::string> InstString;
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/// The output stream for the disassembler; must be guarded with
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/// PrinterMutex
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llvm::OwningPtr<llvm::raw_string_ostream> InstStream;
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/// The instruction printer for the target architecture; must be guarded with
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/// PrinterMutex when printing
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llvm::OwningPtr<llvm::MCInstPrinter> InstPrinter;
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/// The mutex that guards the instruction printer's printing functions, which
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/// use a shared stream
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llvm::sys::Mutex PrinterMutex;
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/// The array of instruction information provided by the TableGen backend for
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/// the target architecture
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const llvm::EDInstInfo *InstInfos;
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/// The target-specific lexer for use in tokenizing strings, in
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/// target-independent and target-specific portions
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llvm::OwningPtr<llvm::AsmLexer> GenericAsmLexer;
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llvm::OwningPtr<llvm::MCTargetAsmLexer> SpecificAsmLexer;
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/// The guard for the above
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llvm::sys::Mutex ParserMutex;
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/// The LLVM number used for the target disassembly syntax variant
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int LLVMSyntaxVariant;
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typedef std::vector<std::string> regvec_t;
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typedef std::map<std::string, unsigned> regrmap_t;
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/// A vector of registers for quick mapping from LLVM register IDs to names
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regvec_t RegVec;
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/// A map of registers for quick mapping from register names to LLVM IDs
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regrmap_t RegRMap;
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/// A set of register IDs for aliases of the stack pointer for the current
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/// architecture
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std::set<unsigned> stackPointers;
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/// A set of register IDs for aliases of the program counter for the current
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/// architecture
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std::set<unsigned> programCounters;
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/// Constructor - initializes a disassembler with all the necessary objects,
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/// which come pre-allocated from the registry accessor function
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///
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/// @arg key - the architecture and disassembly syntax for the
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/// disassembler
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EDDisassembler(CPUKey& key);
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/// valid - reports whether there was a failure in the constructor.
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bool valid() {
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return Valid;
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}
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/// hasSemantics - reports whether the disassembler can provide operands and
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/// tokens.
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bool hasSemantics() {
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return HasSemantics;
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}
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~EDDisassembler();
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/// createInst - creates and returns an instruction given a callback and
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/// memory address, or NULL on failure
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///
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/// @arg byteReader - A callback function that provides machine code bytes
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/// @arg address - The address of the first byte of the instruction,
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/// suitable for passing to byteReader
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/// @arg arg - An opaque argument for byteReader
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EDInst *createInst(EDByteReaderCallback byteReader,
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uint64_t address,
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void *arg);
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/// initMaps - initializes regVec and regRMap using the provided register
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/// info
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///
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/// @arg registerInfo - the register information to use as a source
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void initMaps(const llvm::MCRegisterInfo ®isterInfo);
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/// nameWithRegisterID - Returns the name (owned by the EDDisassembler) of a
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/// register for a given register ID, or NULL on failure
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///
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/// @arg registerID - the ID of the register to be queried
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const char *nameWithRegisterID(unsigned registerID) const;
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/// registerIDWithName - Returns the ID of a register for a given register
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/// name, or (unsigned)-1 on failure
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///
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/// @arg name - The name of the register
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unsigned registerIDWithName(const char *name) const;
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/// registerIsStackPointer - reports whether a register ID is an alias for the
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/// stack pointer register
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///
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/// @arg registerID - The LLVM register ID
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bool registerIsStackPointer(unsigned registerID);
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/// registerIsStackPointer - reports whether a register ID is an alias for the
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/// stack pointer register
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///
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/// @arg registerID - The LLVM register ID
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bool registerIsProgramCounter(unsigned registerID);
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/// printInst - prints an MCInst to a string, returning 0 on success, or -1
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/// otherwise
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///
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/// @arg str - A reference to a string which is filled in with the string
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/// representation of the instruction
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/// @arg inst - A reference to the MCInst to be printed
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int printInst(std::string& str,
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llvm::MCInst& inst);
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/// parseInst - extracts operands and tokens from a string for use in
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/// tokenizing the string. Returns 0 on success, or -1 otherwise.
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///
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/// @arg operands - A reference to a vector that will be filled in with the
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/// parsed operands
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/// @arg tokens - A reference to a vector that will be filled in with the
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/// tokens
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/// @arg str - The string representation of the instruction
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int parseInst(llvm::SmallVectorImpl<llvm::MCParsedAsmOperand*> &operands,
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llvm::SmallVectorImpl<llvm::AsmToken> &tokens,
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const std::string &str);
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/// llvmSyntaxVariant - returns the LLVM syntax variant for this disassembler
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int llvmSyntaxVariant() const;
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};
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} // end namespace llvm
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#endif
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