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Author SHA1 Message Date
Jim Grosbach
1e2566c20d Allow use of the 16-bit literal move instruction in CMOVs for ARM mode. 
llvm-svn: 115884
 2010-10-07 00:42:42 +00:00
Chris Lattner
0df71280d1 add a bunch of classes for other common patterns. 
As usual, no change in generated .inc files.

llvm-svn: 115882
 2010-10-07 00:35:28 +00:00
Owen Anderson
3bc77c4154 Since the Hello pass is built as a loadable dynamic library, don't try to convert it to new-style registration yet. 
llvm-svn: 115881
 2010-10-07 00:31:16 +00:00
Chris Lattner
9b3a494cdb Define a new BinOpRI8 class and use it to define the imm8 versions of and. 
llvm-svn: 115880
 2010-10-07 00:12:45 +00:00
Jakob Stoklund Olesen
5e329859cd Constrain the offset register to a *_NOSP register class when inserting LEA 
instructions.

This unbreaks the machine code verifier and fixes PR8317.

llvm-svn: 115879
 2010-10-07 00:07:26 +00:00
Chris Lattner
b520abade4 add the pattern operator to match to X86TypeInfo, use this to 
convert AND64ri32 to use BinOpRI.

llvm-svn: 115878
 2010-10-07 00:01:39 +00:00
Chris Lattner
2ccb760de0 add a common SDPatternOperator base class to SDNode and PatFrag for 
stuff that wants to take one or the other.  These can both be used
as the operation of a dag in a pattern match.

llvm-svn: 115877
 2010-10-07 00:01:00 +00:00
Jakob Stoklund Olesen
8c1eafb4cb Properly handle GR32_NOSP in X86RegisterInfo::getMatchingSuperRegClass. 
This function looks like it is about ready to be generated by TebleGen.

llvm-svn: 115876
 2010-10-06 23:56:46 +00:00
Jakob Stoklund Olesen
6b4557461f Add MachineRegisterInfo::constrainRegClass and use it in MachineCSE. 
This function is intended to be used when inserting a machine instruction that
trivially restricts the legal registers, like LEA requiring a GR32_NOSP
argument.

llvm-svn: 115875
 2010-10-06 23:54:39 +00:00
Jakob Stoklund Olesen
3ad7d4262d Skip unused registers when verifying LiveIntervals. 
llvm-svn: 115874
 2010-10-06 23:54:35 +00:00
Bill Wendling
154af563cf Fixed RELEASE_28 tags. 
llvm-svn: 115872
 2010-10-06 23:50:30 +00:00
Jim Grosbach
f2c54c9cf3 remove trailing whitespace 
llvm-svn: 115860
 2010-10-06 22:46:47 +00:00
Jason W Kim
de3044dcd1 First in a sequence of ARM/MC/*ELF* specific work. 
Lifted the EmitRawText calls to ARMAsmPrinter::emitAttribute()
Added ARMAsmPrinter::emitAttributes() (plural s).
TODO:
.cpu attribute needs to be refactored

llvm-svn: 115859
 2010-10-06 22:36:46 +00:00
Rafael Espindola
d0417ac2e1 Another case of 256 sections not being enough :-) 
llvm-svn: 115858
 2010-10-06 22:28:19 +00:00
Owen Anderson
65684877c5 Appease the clang self-host buildbot by providing a correct instantiation. 
llvm-svn: 115857
 2010-10-06 22:23:20 +00:00
Jim Grosbach
de2bd8cd3f Clean up MOVi32imm and t2MOVi32imm pseudo instruction definitions. 
llvm-svn: 115853
 2010-10-06 22:01:26 +00:00
Jim Grosbach
4c7da8acbc Kill of the vestiges of the 'call' Modifier (no longer needed for PLT). 
llvm-svn: 115845
 2010-10-06 21:36:43 +00:00
Jim Grosbach
e8a4fef4ea Now that VDUPfqf and VDUPfdfare properly pseudos, kill the no-longer-needed 
"lane" operand modifier.

llvm-svn: 115843
 2010-10-06 21:22:32 +00:00
Jim Grosbach
04a4f7c5d9 Now that VDUPfqf and VDUPfdfare properly pseudos, nuke the special handling. 
llvm-svn: 115841
 2010-10-06 21:17:07 +00:00
Jim Grosbach
e1e07b6bf1 Change the NEON VDUPfdf and VDUPfqf pseudo-instructions to actually be 
pseudo instructions.

llvm-svn: 115840
 2010-10-06 21:16:16 +00:00
Tobias Grosser
eecbee3024 Fix libc++ link in release notes. 
llvm-svn: 115837
 2010-10-06 21:07:30 +00:00
Rafael Espindola
ed469a30f0 Get binding and visibility info from the the alias, but Type from the symbol 
being aliased.

llvm-svn: 115836
 2010-10-06 21:02:29 +00:00
Owen Anderson
2a670815f6 Hide analysis group registration behind a macro, just like pass registration. 
llvm-svn: 115835
 2010-10-06 21:02:27 +00:00
Devang Patel
eeb0b64560 Add support for DW_TAG_unspecified_parameters. 
llvm-svn: 115833
 2010-10-06 20:50:40 +00:00
Jim Grosbach
54490de165 Add a 'pattern' arg to the ARM PseudoNeonI class. 
llvm-svn: 115831
 2010-10-06 20:36:55 +00:00
Michael J. Spencer
b1c4f7b52a MC: Add missing forward in MCLoggingStreamer. 
llvm-svn: 115830
 2010-10-06 20:36:47 +00:00
Michael J. Spencer
820fe774b4 Cleanup Whitespace. 
llvm-svn: 115829
 2010-10-06 20:36:38 +00:00
Bill Wendling
ee02c0c6fe Revert "RequiresUnique" patch. This should be handled at a lower level. 
llvm-svn: 115827
 2010-10-06 20:18:44 +00:00
Owen Anderson
123f4e5c19 Pass initialization functions should take a PassRegistry as a parameter 
rather than being fixed to the global registry.

llvm-svn: 115824
 2010-10-06 20:07:03 +00:00
Rafael Espindola
6283a4a478 If a symbol is global, reloc against it even if it is in a mergeable section. 
llvm-svn: 115817
 2010-10-06 19:27:21 +00:00
Nick Lewycky
d3c05136c1 Remove unused variables. 
llvm-svn: 115802
 2010-10-06 18:11:50 +00:00
Dan Gohman
149f643d1a Remove compatibilty code for old-style multiple return values. 
llvm-svn: 115799
 2010-10-06 16:59:24 +00:00
Jim Grosbach
dd7ee2836f target operand flag values aren't a bitmask 
llvm-svn: 115798
 2010-10-06 16:51:55 +00:00
Rafael Espindola
d085e53b36 Make sure weak symbols are listed after the local ones. 
llvm-svn: 115795
 2010-10-06 16:47:31 +00:00
Rafael Espindola
0c327e6e77 Correctly handle GOTPCREL relocations. 
llvm-svn: 115793
 2010-10-06 16:23:36 +00:00
Dan Gohman
57f707c6a7 ComputeLinearIndex doesn't need its TLI argument. 
llvm-svn: 115792
 2010-10-06 16:18:29 +00:00
Dan Gohman
52980b97f9 Constify isReachableFromEntry. 
llvm-svn: 115788
 2010-10-06 15:49:14 +00:00
Tobias Grosser
0285624d0a Add missing "-" to the command line. 
llvm-svn: 115777
 2010-10-06 11:43:06 +00:00
Bill Wendling
179ecd5159 Remove tabs. 
llvm-svn: 115764
 2010-10-06 07:19:18 +00:00
Bill Wendling
c44ee01ccc Change RequiresMerge to RequiresUnique. It's a better description of what this 
fix is trying to accomplish.

This code could still use some polishing.

llvm-svn: 115759
 2010-10-06 07:03:52 +00:00
Duncan Sands
faa847eb2b No need to check out everything: binutils is enough. 
Patch by John Tytgat.

llvm-svn: 115757
 2010-10-06 06:45:11 +00:00
Evan Cheng
6fbb6dea7c - Add TargetInstrInfo::getOperandLatency() to compute operand latencies. This 
allow target to correctly compute latency for cases where static scheduling
  itineraries isn't sufficient. e.g. variable_ops instructions such as
  ARM::ldm.
  This also allows target without scheduling itineraries to compute operand
  latencies. e.g. X86 can return (approximated) latencies for high latency
  instructions such as division.
- Compute operand latencies for those defined by load multiple instructions,
  e.g. ldm and those used by store multiple instructions, e.g. stm.

llvm-svn: 115755
 2010-10-06 06:27:31 +00:00
Bill Wendling
9372fed918 If the destination module all ready has a copy of the global coming from the 
source module *and* it must be merged (instead of simply replaced or appended
to), then merge instead of replacing or adding another global.

The ObjC __image_info section was being appended to because of this
failure. This caused a crash because the linker expects the image info section
to be a specific size.

<rdar://problem/8198537>

llvm-svn: 115753
 2010-10-06 06:16:30 +00:00
Chris Lattner
30c9a175a3 enhance X86TypeInfo to include information about the encoding and 
operand kind for immediates.  Use these to define a new BinOpRI
class and switch AND8/16/32ri over to it.  AND64ri32 needs some
more refactoring before it can make the switcheroo.

llvm-svn: 115752
 2010-10-06 05:55:42 +00:00
Tanya Lattner
2ddf96c6b9 Update release location. 
llvm-svn: 115749
 2010-10-06 05:36:01 +00:00
Chris Lattner
e9e2d51853 add a class for _REV nodes. 
llvm-svn: 115748
 2010-10-06 05:35:22 +00:00
Chris Lattner
88ccb4e6b5 sink more intelligence into the ITy base class. Now it knows 
that i8 operations are even and i16,i32,i64 operations have a
low opcode bit set (they are odd).

llvm-svn: 115747
 2010-10-06 05:28:38 +00:00
Chris Lattner
96dd50c055 refactor things a bit, now the REX_W and OpSize prefix bytes are inferred from the type info. 
llvm-svn: 115745
 2010-10-06 05:20:57 +00:00
Chris Lattner
7956e6b995 with tblgen suitably extended, we can now get the load node from typeinfo. 
llvm-svn: 115744
 2010-10-06 04:58:43 +00:00
Chris Lattner
0bc415a491 Generalize tblgen's dag parsing logic to handle arbitrary expressions 
as the operator of the dag.  Specifically, this allows parsing things
like (F.x 4) in addition to just (a 4).

Unfortunately, this runs afoul of an idiom being used by llvmc.  It
is using dags like (foo [1,2,3]) to represent a list of stuff being
passed into foo.  With this change, this is parsed as a [1,2,3] 
subscript on foo instead of being the first argument to the dag.
Cope with this in the short term by requiring a "-llvmc-temp-hack"
argument to tblgen to get the old parsing behavior.

llvm-svn: 115742
 2010-10-06 04:55:48 +00:00