Commit Graph

178655 Commits

Author SHA1 Message Date
David L. Jones
21592c0bd7 gn build: merge r360550
llvm-svn: 360551
2019-05-13 03:43:25 +00:00
David L. Jones
e4f7d3295f [WebAssembly] Move InstPrinter files to MCTargetDesc. NFC
For some targets, there is a circular dependency between InstPrinter and
MCTargetDesc. Merging them together will fix this. For the other targets,
the merging is to maintain consistency so all targets will have the same
structure.

llvm-svn: 360550
2019-05-13 03:32:41 +00:00
Nico Weber
2ca48a0383 gn build: Merge r360540
llvm-svn: 360549
2019-05-12 23:47:03 +00:00
Lang Hames
4e9a93b70e [JITLink] Add a test for zero-filled content.
Also updates RuntimeDyldChecker and llvm-rtdyld to support zero-fill tests by
returning a content address of zero (but no error) for zero-fill atoms, and
treating loads from zero as returning zero.

llvm-svn: 360547
2019-05-12 22:26:33 +00:00
Lang Hames
c175ee1a11 [ORC] Fix some typos.
Patch by Praveen Velliengiri. Thanks Praveen!

https://reviews.llvm.org/D61793

llvm-svn: 360546
2019-05-12 22:26:32 +00:00
Simon Pilgrim
0f8ed6eca9 [X86][AVX] Split VZEXT_MOVL ymm/zmm if the upper elements are not demanded.
Removes unnecessary vzeroupper noted in D61806

llvm-svn: 360543
2019-05-12 15:16:29 +00:00
Sanjay Patel
3cb04230f7 [LoopVectorizer] add tests for FP minmax; NFC
llvm-svn: 360542
2019-05-12 14:53:59 +00:00
Sanjay Patel
fb5b1cb482 [DAGCombiner] try to move bitcast after extract_subvector
I noticed that we were failing to narrow an x86 ymm math op in a case similar
to the 'madd' test diff. That is because a bitcast is sitting between the math
and the extract subvector and thwarting our pattern matching for narrowing:

       t56: v8i32 = add t59, t58
      t68: v4i64 = bitcast t56
    t73: v2i64 = extract_subvector t68, Constant:i64<2>
  t96: v4i32 = bitcast t73

There are a few wins and neutral diffs in the other tests.

Differential Revision: https://reviews.llvm.org/D61806

llvm-svn: 360541
2019-05-12 14:43:20 +00:00
Fangrui Song
60386c1c20 [utils] update_test_checks.py: allow opt-8, opt-9
Allow using Debian's opt-8, opt-9 with update_test_checks.py

Patch by Shawn Landden!

Differential Revision: https://reviews.llvm.org/D61148

llvm-svn: 360536
2019-05-12 04:55:09 +00:00
Simon Pilgrim
c9d82868e4 [X86][SSE] SimplifyDemandedBits - call PEXTRB/PEXTRW SimplifyDemandedVectorElts as well.
See if we can simplify the demanded vector elts from the extraction before trying to simplify the demanded bits.

This helps us with target shuffles and hops in particular.

llvm-svn: 360535
2019-05-11 21:35:50 +00:00
Simon Pilgrim
2804fea615 [DAG] Add SimplifyDemandedBits support for BITREVERSE
Pulled out of D58017 while I continue to investigate the BSWAP regression on PPC

llvm-svn: 360534
2019-05-11 20:56:05 +00:00
Simon Pilgrim
4d49252a31 [X86] Updated shift-mask test targets for D61830
llvm-svn: 360533
2019-05-11 20:28:20 +00:00
Don Hinton
bb972fd4a4 [CommandLine] Add long option flag for cl::ParseCommandLineOptions . Part 5 of 5
Summary:
If passed, the long option flag makes the CommandLine parser
mimic the behavior or GNU getopt_long.  Short options are a single
character prefixed by a single dash, and long options are multiple
characters prefixed by a double dash.

This patch was motivated by the discussion in the following thread:
http://lists.llvm.org/pipermail/llvm-dev/2019-April/131786.html

Reviewed By: MaskRay

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D61294

llvm-svn: 360532
2019-05-11 20:27:01 +00:00
Simon Pilgrim
c1f941f401 [X86] Add scalar shl+lshr -> shift+mask tests (PR40758)
As discussed on D61068, many x86 targets can perform 2 immediate shifts quicker than a shift + mask

llvm-svn: 360530
2019-05-11 19:16:46 +00:00
Simon Pilgrim
8615fb78b9 [X86] Add avx512f tests for boolean reduction
llvm-svn: 360529
2019-05-11 19:14:19 +00:00
Simon Pilgrim
93b6d00917 [CostModel][X86] Add min/max reduction costs for all SSE targets
The original costs stopped at SSE42, I've added conservative estimates for everything down to SSE1/SSE2 and moved some of the SSE42 costs to SSE41 (really only the addition of PCMPGT makes any difference).

I've also added missing vXi8 costs (we use PHMINPOSUW for i8/i16 for scarily quick results) and 256-bit vector costs for AVX1.

llvm-svn: 360528
2019-05-11 17:12:52 +00:00
Puyan Lotfi
e4aaf677e0 [NFC] yaml2obj/yam2elf.cpp whitespace changes: dos2unix removed CRs.
llvm-svn: 360527
2019-05-11 17:03:36 +00:00
Simon Pilgrim
b77f4d4239 [X86][SSE] Add SimplifyDemandedVectorElts HADD/HSUB handling.
Still missing PHADDW/PHSUBW tests because PEXTRW doesn't call SimplifyDemandedVectorElts

llvm-svn: 360526
2019-05-11 16:07:12 +00:00
Simon Pilgrim
db814d88d6 FixupLEAPass::fixupIncDec - non-LEA opcodes should not happen here. NFCI.
Matches what we do in other functions and fixes scan-build warning about uninitialized NewOpcode variable.

llvm-svn: 360525
2019-05-11 16:02:34 +00:00
Craig Topper
5e46e29239 [X86] Add CMOV_FR32X/CMOV_FR64X pseudo instructions. Use them in fast isel to fix a machine verifier error after adding test cases.
Fast isel picks the FR32X/FR64X register classes when lowering pseudo select, but it didn't have the right opcode to go with it.

llvm-svn: 360524
2019-05-11 16:00:28 +00:00
Craig Topper
dd16e15996 [X86] Sink some fast isel code into the only if that uses it. NFC
llvm-svn: 360523
2019-05-11 16:00:19 +00:00
Craig Topper
628ad6bc94 [X86] Use TLI.getRegClassFor to simplify some more fast isel code. NFCI
llvm-svn: 360522
2019-05-11 16:00:13 +00:00
Simon Pilgrim
c66652fd82 [MC][X86] Add test cases from PR14056
llvm-svn: 360521
2019-05-11 15:51:14 +00:00
Simon Pilgrim
a4e09df2ce HexagonConstEvaluator::evaluateHexExt - check incoming opcodes. NFCI.
Only certain extension opcodes are supported - fixes scan build warning.

llvm-svn: 360520
2019-05-11 15:24:34 +00:00
Simon Pilgrim
5a5b9a1626 [X86][SSE] Tweaked HADD/HSUB SimplifyDemandedVectorElts
Try to ensure we LHS and RHS test coverage

llvm-svn: 360519
2019-05-11 14:47:54 +00:00
Simon Pilgrim
ff411eaa54 [X86][SSE] Add integer HADD/HSUB SimplifyDemandedVectorElts tests
llvm-svn: 360518
2019-05-11 14:08:34 +00:00
Simon Pilgrim
95a16d62c9 [X86][SSE] Add HADD/HSUB SimplifyDemandedVectorElts tests
Shows missed opportunities to simplify args.

Will add integer HADD/HSUB tests in a future commit.

llvm-svn: 360517
2019-05-11 12:46:38 +00:00
Simon Pilgrim
8964f812ac Fix uninitialized variable analyzer warning. NFCI.
llvm-svn: 360516
2019-05-11 11:08:24 +00:00
Simon Pilgrim
993406437c SelectionDAGISel::CodeGenAndEmitDAG - remove unused variable. NFCI.
llvm-svn: 360514
2019-05-11 11:00:37 +00:00
Craig Topper
9c17901350 [X86] Use getRegClassFor to simplify some code in fast isel. NFCI
No need to select the register class based on type and features. It should
already be setup by X86ISelLowering.

llvm-svn: 360513
2019-05-11 05:18:58 +00:00
Craig Topper
16055b8837 [X86] Don't emit MOVNTDQA loads from fast-isel without SSE4.1.
We were checking for SSE4.1 for FP types, but not integer 128-bit types.

Fixes PR41837.

llvm-svn: 360512
2019-05-11 04:19:33 +00:00
Craig Topper
65d707bef0 [X86] Add a test case for idempotent atomic operations with speculative load hardening. Fix an additional issue found by the test.
This test covers the fix from r360475 as well.

llvm-svn: 360511
2019-05-11 04:00:27 +00:00
Richard Trieu
cedf1cc092 [SystemZ] Move InstPrinter files to MCTargetDesc. NFC
For some targets, there is a circular dependency between InstPrinter and
MCTargetDesc.  Merging them together will fix this.  For the other targets,
the merging is to maintain consistency so all targets will have the same
structure.

llvm-svn: 360510
2019-05-11 03:36:16 +00:00
David L. Jones
c867400ae9 gn build: sort tablegen rules for X86 and AArch64
llvm-svn: 360508
2019-05-11 03:23:37 +00:00
David L. Jones
f2f0101892 gn build: merge r360494 and r360502
llvm-svn: 360507
2019-05-11 03:20:09 +00:00
Richard Trieu
0d8cb05357 [Sparc] Move InstPrinter files to MCTargetDesc. NFC
For some targets, there is a circular dependency between InstPrinter and
MCTargetDesc.  Merging them together will fix this.  For the other targets,
the merging is to maintain consistency so all targets will have the same
structure.

llvm-svn: 360506
2019-05-11 02:59:02 +00:00
Richard Trieu
96750f8caa [RISCV] Move InstPrinter files to MCTargetDesc. NFC
For some targets, there is a circular dependency between InstPrinter and
MCTargetDesc.  Merging them together will fix this.  For the other targets,
the merging is to maintain consistency so all targets will have the same
structure

llvm-svn: 360505
2019-05-11 02:43:58 +00:00
Richard Trieu
be99cd7195 [PowerPC] Move InstPrinter files to MCTargetDesc. NFC
For some targets, there is a circular dependency between InstPrinter and
MCTargetDesc.  Merging them together will fix this.  For the other targets,
the merging is to maintain consistency so all targets will have the same
structure.

llvm-svn: 360502
2019-05-11 02:33:18 +00:00
Richard Trieu
b90fcb2383 [NVPTX] Move InstPrinter files to MCTargetDesc. NFC
For some targets, there is a circular dependency between InstPrinter and
MCTargetDesc.  Merging them together will fix this.  For the other targets,
the merging is to maintain consistency so all targets will have the same
structure.

llvm-svn: 360500
2019-05-11 02:09:13 +00:00
Richard Trieu
2f73701ac0 [MSP430] Move InstPrinter files to MCTargetDesc. NFC
For some targets, there is a circular dependency between InstPrinter and
MCTargetDesc.  Merging them together will fix this.  For the other targets,
the merging is to maintain consistency so all targets will have the same
structure.

llvm-svn: 360498
2019-05-11 01:58:52 +00:00
Richard Trieu
2fdd2393ce [Mips] Move InstPrinter files to MCTargetDesc. NFC
For some targets, there is a circular dependency between InstPrinter and
MCTargetDesc.  Merging them together will fix this.  For the other targets,
the merging is to maintain consistency so all targets will have the same
structure.

llvm-svn: 360497
2019-05-11 01:38:56 +00:00
Richard Trieu
8c588c9c24 [Lanai] Move InstPrinter files to MCTargetDesc. NFC
For some targets, there is a circular dependency between InstPrinter and
MCTargetDesc.  Merging them together will fix this.  For the other targets,
the merging is to maintain consistency so all targets will have the same
structure.

llvm-svn: 360496
2019-05-11 01:25:58 +00:00
Richard Trieu
b78f9f3417 [BPF] Move InstPrinter files to MCTargetDesc. NFC
For some targets, there is a circular dependency between InstPrinter and
MCTargetDesc.  Merging them together will fix this.  For the other targets,
the merging is to maintain consistency so all targets will have the same
structure.

llvm-svn: 360494
2019-05-11 01:13:21 +00:00
Richard Trieu
ce030df545 [AVR] Move InstPrinter files to MCTargetDesc. NFC
For some targets, there is a circular dependency between InstPrinter and
MCTargetDesc.  Merging them together will fix this.  For the other targets,
the merging is to maintain consistency so all targets will have the same
structure.

llvm-svn: 360493
2019-05-11 01:03:03 +00:00
David L. Jones
6f91878254 gn build: merge r360490
llvm-svn: 360492
2019-05-11 00:44:30 +00:00
David L. Jones
8e105e2823 gn build: merge r360484 and r360486
llvm-svn: 360491
2019-05-11 00:35:53 +00:00
Richard Trieu
5a0290e867 [ARM] Move InstPrinter files to MCTargetDesc. NFC
For some targets, there is a circular dependency between InstPrinter and
MCTargetDesc.  Merging them together will fix this.  For the other targets,
the merging is to maintain consistency so all targets will have the same
structure.

llvm-svn: 360490
2019-05-11 00:34:07 +00:00
David L. Jones
cc139afe3e gn build: merge r360345
llvm-svn: 360489
2019-05-11 00:20:18 +00:00
Richard Trieu
b8835c12e7 [ARC] Move InstPrinter files to MCTargetDesc. NFC
For some targets, there is a circular dependency between InstPrinter and
MCTargetDesc.  Merging them together will fix this.  For the other targets,
the merging is to maintain consistency so all targets will have the same
structure.

llvm-svn: 360488
2019-05-11 00:13:01 +00:00
Richard Trieu
129947aec0 [AMDGPU] Move InstPrinter files to MCTargetDesc. NFC
For some targets, there is a circular dependency between InstPrinter and
MCTargetDesc.  Merging them together will fix this.  For the other targets,
the merging is to maintain consistency so all targets will have the same
structure.

llvm-svn: 360487
2019-05-11 00:03:35 +00:00