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Author SHA1 Message Date
Chris Lattner
2875bb116e Support pattern matching vsldoi(x,y) and vsldoi(x,x), which allows the f.e. to 
lower it and LLVM to have one fewer intrinsic.  This implements
CodeGen/PowerPC/vec_shuffle.ll

llvm-svn: 27450
 2006-04-06 18:26:28 +00:00
Chris Lattner
e547562ea3 new testcase 
llvm-svn: 27449
 2006-04-06 18:26:13 +00:00
Chris Lattner
10fa7be550 Compile the vpkuhum/vpkuwum intrinsics into vpkuhum/vpkuwum instead of into 
vperm with a perm mask lvx'd from the constant pool.

llvm-svn: 27448
 2006-04-06 17:23:16 +00:00
Chris Lattner
df19e57d3f Add support for building the LLVM libraries and tools as a Mac OS/X 
universal binary, by specifying UNIVERSAL=1 on the make command line.

llvm-svn: 27447
 2006-04-06 06:30:15 +00:00
Evan Cheng
d2d7aff6ba POR encoded as PAND, yikes. 
llvm-svn: 27446
 2006-04-06 01:49:20 +00:00
Evan Cheng
dcf423ad74 An entry about comi / ucomi intrinsics. 
llvm-svn: 27445
 2006-04-05 23:46:04 +00:00
Evan Cheng
6d470008c8 Support for comi / ucomi intrinsics. 
llvm-svn: 27444
 2006-04-05 23:38:46 +00:00
Evan Cheng
f1a2e421c3 Added comi and ucomi SSE intrinsics. 
llvm-svn: 27443
 2006-04-05 23:37:18 +00:00
Chris Lattner
7f13e50435 Add all of the data stream intrinsics and instructions. woo 
llvm-svn: 27442
 2006-04-05 22:27:14 +00:00
Chris Lattner
86763bafa7 add altivec ds* intrinsics 
llvm-svn: 27441
 2006-04-05 22:18:01 +00:00
Chris Lattner
338945e669 Fix a typo 
llvm-svn: 27440
 2006-04-05 20:15:25 +00:00
Chris Lattner
d1b47b18ed Fix CodeGen/PowerPC/2006-04-05-splat-ish.ll 
llvm-svn: 27439
 2006-04-05 17:39:25 +00:00
Chris Lattner
e4a7c4ecc2 new testcase that was miscompiled to vspltisb 
llvm-svn: 27438
 2006-04-05 17:38:50 +00:00
Evan Cheng
056e0af55a Handle canonical form of e.g. 
vector_shuffle v1, v1, <0, 4, 1, 5, 2, 6, 3, 7>

This is turned into
vector_shuffle v1, <undef>, <0, 0, 1, 1, 2, 2, 3, 3>
by dag combiner.

It would match a {p}unpckl on x86.

llvm-svn: 27437
 2006-04-05 07:20:06 +00:00
Chris Lattner
fe2926cf46 Make a vector live across blocks have the correct Vec type. This fixes 
CodeGen/X86/2006-04-04-CrossBlockCrash.ll

llvm-svn: 27436
 2006-04-05 06:54:42 +00:00
Chris Lattner
4bdc1f01dd new testcase 
llvm-svn: 27435
 2006-04-05 06:54:14 +00:00
Evan Cheng
d562dfa0db Bogus assert 
llvm-svn: 27434
 2006-04-05 06:11:20 +00:00
Evan Cheng
9e56e97205 Fallthrough to expand if a VECTOR_SHUFFLE cannot be custom lowered. 
llvm-svn: 27433
 2006-04-05 06:09:26 +00:00
Evan Cheng
abd8dc54c2 Exapnd a VECTOR_SHUFFLE to a BUILD_VECTOR if target asks for it to be expanded 
or custom lowering fails.

llvm-svn: 27432
 2006-04-05 06:07:11 +00:00
Jeff Cohen
9455fcb13d Fix more tablegen depedency issues in Visual Studio. 
llvm-svn: 27431
 2006-04-05 05:19:18 +00:00
Evan Cheng
74a1eae0c4 Separate out to 2 test cases 
llvm-svn: 27430
 2006-04-05 04:40:55 +00:00
Andrew Lenharth
2fb0f0fa69 make this test less exacting 
llvm-svn: 27429
 2006-04-05 03:31:45 +00:00
Andrew Lenharth
58b9d4af7a revert this, this is safe, if conservative. leave a note to that effect 
llvm-svn: 27428
 2006-04-05 02:42:36 +00:00
Evan Cheng
849a726354 Handle v8i16 shuffle that must be broken into a pair of pshufhw / pshuflw. 
llvm-svn: 27427
 2006-04-05 01:47:37 +00:00
Evan Cheng
41d19540f2 Add a new shuffle test case that requires pshuflw / pshufhw pair. 
llvm-svn: 27426
 2006-04-05 01:44:57 +00:00
Chris Lattner
ee971bedf2 add vsl 
llvm-svn: 27425
 2006-04-05 01:16:22 +00:00
Chris Lattner
986d42c2e9 Get the types right, third time is the charm. Add vsl. 
llvm-svn: 27424
 2006-04-05 01:15:54 +00:00
Chris Lattner
993209029f add vmladduhm 
llvm-svn: 27423
 2006-04-05 00:49:48 +00:00
Chris Lattner
f41b7d5a80 correct the type of two intrinsics, add int_ppc_altivec_vmladduhm 
llvm-svn: 27422
 2006-04-05 00:49:14 +00:00
Chris Lattner
66c3b75644 Add m[tf]vscr instructions. 
llvm-svn: 27421
 2006-04-05 00:03:57 +00:00
Chris Lattner
0afabdfdaf Add m[tf]vscr intrinsics. 
llvm-svn: 27420
 2006-04-05 00:03:03 +00:00
Chris Lattner
10394b1c42 add a note 
llvm-svn: 27419
 2006-04-04 23:45:11 +00:00
Chris Lattner
e7a52b473f Add missing byte merges. 
llvm-svn: 27418
 2006-04-04 23:43:56 +00:00
Chris Lattner
ab137b431f Add FP -> Int Conversions 
llvm-svn: 27417
 2006-04-04 23:25:02 +00:00
Chris Lattner
6cf881590f add average intrinsics 
llvm-svn: 27416
 2006-04-04 23:14:00 +00:00
Chris Lattner
39a966beec add average intrinsics. 
llvm-svn: 27415
 2006-04-04 23:13:21 +00:00
Chris Lattner
59c4add58a add a note 
llvm-svn: 27414
 2006-04-04 22:43:55 +00:00
Chris Lattner
d1483ca1ad Fix some broken logic that would cause us to codegen {2147483647,2147483647,2147483647,2147483647} as 'vspltisb v0, -1'. 
llvm-svn: 27413
 2006-04-04 22:28:35 +00:00
Evan Cheng
f745d450c5 Added pslldq and psrldq. 
llvm-svn: 27412
 2006-04-04 21:49:39 +00:00
Evan Cheng
a4d3c6df75 Added intrinsics to match __builtin_ia32_pslldqi128 and 
__builtin_ia32_psrldqi128.

llvm-svn: 27411
 2006-04-04 21:48:31 +00:00
Evan Cheng
22dd2900e6 Minor fixes + naming changes. 
llvm-svn: 27410
 2006-04-04 19:12:30 +00:00
Chris Lattner
657e2d1d80 How could this ever have worked? 
llvm-svn: 27409
 2006-04-04 19:05:42 +00:00
Evan Cheng
3f7a10bee8 PSHUF* encoding bugs. 
llvm-svn: 27405
 2006-04-04 18:40:36 +00:00
Chris Lattner
6ce700fbae Make sure to consider alignment of variable sized objects. 
This, along with the previous dag combiner fix, fixes
CodeGen/Alpha/2006-04-04-zextload.ll

llvm-svn: 27403
 2006-04-04 17:39:56 +00:00
Chris Lattner
cad2bfa3d7 Do not create ZEXTLOAD's unless we are before legalize or the operation is 
legal.

llvm-svn: 27402
 2006-04-04 17:39:18 +00:00
Chris Lattner
1a4d5e9b56 New testcase 
llvm-svn: 27401
 2006-04-04 17:38:31 +00:00
Chris Lattner
4e99e6dfdd Ask legalize to promote all vector shuffles to be v16i8 instead of having to 
handle all 4 PPC vector types.   This simplifies the matching code and allows
us to eliminate a bunch of patterns.  This also adds cases we were missing,
such as CodeGen/PowerPC/vec_splat.ll:splat_h.

llvm-svn: 27400
 2006-04-04 17:25:31 +00:00
Chris Lattner
136a27d0d0 * Add supprot for SCALAR_TO_VECTOR operations where the input needs to be 
promoted/expanded (e.g. SCALAR_TO_VECTOR from i8/i16 on PPC).
* Add support for targets to request that VECTOR_SHUFFLE nodes be promoted
  to a canonical type, for example, we only want v16i8 shuffles on PPC.
* Move isShuffleLegal out of TLI into Legalize.
* Teach isShuffleLegal to allow shuffles that need to be promoted.

llvm-svn: 27399
 2006-04-04 17:23:26 +00:00
Chris Lattner
1dc3c03ee7 Move isShuffleLegal from TLI to Legalize. 
llvm-svn: 27398
 2006-04-04 17:21:22 +00:00
Chris Lattner
0e93cb9bc0 new testcase 
llvm-svn: 27397
 2006-04-04 17:20:45 +00:00