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32e376f7e1
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15106 Commits

Author SHA1 Message Date
Pete Cooper
32e376f7e1 Fixed deadstoreelimination bug where negative indices were incorrectly causing the optimisation to occur 
Turns out long long + unsigned long long is unsigned.  Doh!

Fixes http://llvm.org/bugs/show_bug.cgi?id=11455

llvm-svn: 145731
 2011-12-03 00:04:30 +00:00
Chad Rosier
d830d783e2 Add support for constant folding the pow intrinsic. 
rdar://10514247

llvm-svn: 145730
 2011-12-03 00:00:03 +00:00
Akira Hatanaka
16d404cca1 Test cases for 64-bit multiplication and division. 
llvm-svn: 145717
 2011-12-02 22:31:36 +00:00
Akira Hatanaka
8a6af7933c Fix test cases to use FileCheck. 
llvm-svn: 145716
 2011-12-02 22:28:09 +00:00
Jim Grosbach
6ae4df64e7 ARM tests for VLD1 single lane w/ writeback. 
llvm-svn: 145713
 2011-12-02 22:03:52 +00:00
Chad Rosier
b3b2871bbf [arm-fast-isel] After promoting a function parameter be sure to update the 
argument value type.  Otherwise, the sign/zero-extend has no effect on arguments
passed via the stack (i.e., undefined high-order bits).
rdar://10515467

llvm-svn: 145701
 2011-12-02 20:25:18 +00:00
Hal Finkel
a5b78f0e58 specify cpu for test to fix failure on some darwin systems with a g4+ cpu 
llvm-svn: 145699
 2011-12-02 19:38:17 +00:00
Jim Grosbach
a568ef0db6 Clean up aliases for ARM VLD1 single-lane assembly parsing a bit. 
Add the 16-bit lane variants while I'm at it.

llvm-svn: 145693
 2011-12-02 18:52:30 +00:00
Craig Topper
d381116357 Add instruction selection support for horizontal add/sub of 256-bit floating point vectors. Also add the test case for 256-bit integer vectors. 
llvm-svn: 145680
 2011-12-02 07:16:01 +00:00
Hal Finkel
2984a1dfcb adjust the instruction ordering in some PPC tests: changes due to postRA haz. rec. 
llvm-svn: 145678
 2011-12-02 04:58:12 +00:00
Chad Rosier
4d25975a28 Prevent library calls from being folded if -fno-builtin has been specified. 
rdar://10500969

llvm-svn: 145639
 2011-12-01 22:14:50 +00:00
Pete Cooper
c708e83499 Improved fix for abs(val) != 0 to check other similar case. Also fixed style issues and confusing comment 
llvm-svn: 145618
 2011-12-01 19:13:26 +00:00
Eric Christopher
4aa8024569 For 64-bit the rest of the general regs are ok for the q constraint. Make 
sure we can emit both the high and low versions of those registers.

Fixes rdar://10392864

llvm-svn: 145579
 2011-12-01 08:12:41 +00:00
Eli Friedman
ad916965a6 Pass AVX vectors which are arguments to varargs functions on the stack. <rdar://problem/10463281>. 
llvm-svn: 145573
 2011-12-01 04:49:21 +00:00
Pete Cooper
d4569610df Removed use of grep from test and moved it to be with other icmp tests 
llvm-svn: 145570
 2011-12-01 04:35:26 +00:00
Pete Cooper
7e03b7250d Added instcombine pattern to spot comparing -val or val against 0. 
(val != 0) == (-val != 0) so "abs(val) != 0" becomes "val != 0"

Fixes <rdar://problem/10482509>

llvm-svn: 145563
 2011-12-01 03:58:40 +00:00
Jan Sjödin
2dfb343ffa Support for encoding all FMA4 instructions and tablegen patterns for all 
remaining FMA4 instructions and intrinsics with tests.

llvm-svn: 145525
 2011-11-30 22:09:42 +00:00
Eli Friedman
2d9e4aa665 Make GlobalMerge honor the preferred alignment on globals without an explicitly specified alignment. 
<rdar://problem/10497732>.

llvm-svn: 145523
 2011-11-30 21:54:15 +00:00
Jim Grosbach
3129a92b38 Add some tests for all-lanes VLD1 parsing. 
llvm-svn: 145512
 2011-11-30 19:37:38 +00:00
Nadav Rotem
148d347bb7 Add test arch to make it pass on non x86 targets 
llvm-svn: 145498
 2011-11-30 17:34:28 +00:00
Nadav Rotem
bef49f31be Add a tripple to the test 
llvm-svn: 145489
 2011-11-30 11:20:56 +00:00
Nadav Rotem
f8e096f4ee X86: PerformOrCombine introduced a vselect node with a wrong order of operands. This bug was introduced when a dedicated blend sdnode was replaced with the vselect node (in 139479). 
llvm-svn: 145488
 2011-11-30 10:13:37 +00:00
Andrew Trick
8da55f9048 Better test case found in duplicate PR10570. 
llvm-svn: 145484
 2011-11-30 06:26:42 +00:00
Andrew Trick
247f749767 LSR: handle the expansion of phi operands that use postinc forms of the IV. 
Fixes PR11431: SCEVExpander::expandAddRecExprLiterally(const llvm::SCEVAddRecExpr*): Assertion `(!isa<Instruction>(Result) || SE.DT->dominates(cast<Instruction>(Result), Builder.GetInsertPoint())) && "postinc expansion does not dominate use"' failed.

llvm-svn: 145482
 2011-11-30 06:07:54 +00:00
Chad Rosier
c5fa9f413a Add support for sqrt, sqrtl, and sqrtf in TargetLibraryInfo. Disable 
(fptrunc (sqrt (fpext x))) -> (sqrtf x) transformation if -fno-builtin is 
specified.
rdar://10466410

llvm-svn: 145460
 2011-11-29 23:57:10 +00:00
Jakob Stoklund Olesen
f227c539d4 FileCheckize. 
llvm-svn: 145452
 2011-11-29 23:09:16 +00:00
Akira Hatanaka
fd548b69f5 Change names for MIPS "generic" processors defined in Mips.td to match what GNU 
tools use. Patch by Simon Atanasyan.

"mips32r1" => "mips32"
"4ke" => mips32r2"
"mips64r1" => "mips64"

llvm-svn: 145451
 2011-11-29 23:08:41 +00:00
Jim Grosbach
538759efa7 ARM assembly parsing and encoding for four-register VST1. 
llvm-svn: 145450
 2011-11-29 22:58:48 +00:00
Evan Cheng
5c1efd630b Add another missing pattern. llvm-gcc likes f64 but clang likes i64 so it was generating poor code for some SSE builtins. 
llvm-svn: 145448
 2011-11-29 22:48:34 +00:00
Jim Grosbach
fc7e76b194 Enable some VST1 tests and add a few more. 
llvm-svn: 145443
 2011-11-29 22:40:32 +00:00
Jakob Stoklund Olesen
5d6a4584d9 Make X86::FsFLD0SS / FsFLD0SD real pseudo-instructions. 
Like V_SET0, these instructions are expanded by ExpandPostRA to xorps /
vxorps so they can participate in execution domain swizzling.

This also makes the AVX variants redundant.

llvm-svn: 145440
 2011-11-29 22:27:25 +00:00
Chad Rosier
0ff2f46d12 If fast-isel fails, remove dead instructions generated during the failed 
attempt.  

llvm-svn: 145425
 2011-11-29 19:40:47 +00:00
Duncan Sands
97cc6da56c Fix a theoretical problem (not seen in the wild): if different instances of a 
weak variable are compiled by different compilers, such as GCC and LLVM, while
LLVM may increase the alignment to the preferred alignment there is no reason to
think that GCC will use anything more than the ABI alignment.  Since it is the
GCC version that might end up in the final program (as the linkage is weak), it
is wrong to increase the alignment of loads from the global up to the preferred
alignment as the alignment might only be the ABI alignment.

Increasing alignment up to the ABI alignment might be OK, but I'm not totally
convinced that it is.  It seems better to just leave the alignment of weak
globals alone.

llvm-svn: 145413
 2011-11-29 18:26:38 +00:00
Michael J. Spencer
5fade79478 MC/X86/COFF: Allow quotes in names when targeting MS/Windows, 
as MC is the only assembler we support.

This splits MS/Windows and GNU/Windows ASM infos into two seperate classes.
While there is currently only one difference, full MS C++ ABI support will
require many more.

llvm-svn: 145409
 2011-11-29 18:00:06 +00:00
Danil Malyshev
5ce4e1a9d3 Fixed ObjectFile functions: 
- getSymbolOffset() renamed as getSymbolFileOffset()
- getSymbolFileOffset(), getSymbolAddress(), getRelocationAddress() returns same result for ELFObjectFile, MachOObjectFile and COFFObjectFile.
- added getRelocationOffset()
- fixed MachOObjectFile::getSymbolSize()
- fixed MachOObjectFile::getSymbolSection()
- fixed MachOObjectFile::getSymbolOffset() for symbols without section data.

llvm-svn: 145408
 2011-11-29 17:40:10 +00:00
Elena Demikhovsky
735cff1fa8 Fixed vsqrt.ss intrinsic usage - order of input operands was wrong. 
Added a test.
Thanks Bruno for reviewing the patch.

llvm-svn: 145403
 2011-11-29 15:00:45 +00:00
Craig Topper
637e60afdd Fix shuffle decoding for memory forms for (V)SHUFPS/D. 
llvm-svn: 145392
 2011-11-29 07:58:09 +00:00
Craig Topper
4550fc2649 Fix issues in shuffle decoding around VPERM* instructions. Fix shuffle decoding for VSHUFPS/D for 256-bit types. Add pattern matching for memory forms of VPERMILPS/VPERMILPD. 
llvm-svn: 145390
 2011-11-29 07:49:05 +00:00
Craig Topper
aca91b9f14 Fix VINSERTF128/VEXTRACTF128 to be marked as FP instructions. Allow execution dependency fix pass to convert them to their integer equivalents when AVX2 is enabled. 
llvm-svn: 145376
 2011-11-29 05:37:58 +00:00
Craig Topper
a6c1d25798 Correctly mark VPERM2F128 as being an FP instruction and add execution domain fixing support to convert it to VPERM2I128 for AVX2. 
llvm-svn: 145370
 2011-11-29 03:57:34 +00:00
Andrew Trick
63f81b112e SCEV fix. In general, Add/Mul expressions should not inherit NSW/NUW. 
This reverts r139450, fixes r139453, and adds much needed comments and a
unit test.

llvm-svn: 145367
 2011-11-29 02:16:38 +00:00
Andrew Trick
a033165cf9 Filecheckize. 
llvm-svn: 145363
 2011-11-29 02:05:23 +00:00
Andrew Trick
4c2bb1ade3 Reenable this IndVars unit test. 
SCEV can't optimize undef in all cases, which is a separate issue from this test case.

llvm-svn: 145343
 2011-11-29 00:52:04 +00:00
Eli Friedman
bc47555417 Add a missing safety check to ProcessUGT_ADDCST_ADD. Fixes PR11438. 
llvm-svn: 145316
 2011-11-28 23:32:19 +00:00
Eli Friedman
473a76a0df Make SelectionDAG::InferPtrAlignment use llvm::ComputeMaskedBits instead of duplicating the logic for globals. Make llvm::ComputeMaskedBits handle GlobalVariables slightly more aggressively, to match what InferPtrAlignment knew how to do. 
llvm-svn: 145304
 2011-11-28 22:48:22 +00:00
Evan Cheng
1435aa5fdc Revert r145273 and fix in SelectionDAG::InferPtrAlignment() instead. 
Conservatively returns zero when the GV does not specify an alignment nor is it
initialized. Previously it returns ABI alignment for type of the GV. However, if
the type is a "packed" type, then the under-specified alignments is attached to
the load / store instructions. In that case, the alignment of the type cannot be
trusted.
rdar://10464621

llvm-svn: 145300
 2011-11-28 22:37:34 +00:00
Evan Cheng
567aa3dfb3 DAG combine should not increase alignment of loads / stores with alignment less 
than ABI alignment. These are loads / stores from / to "packed" data structures.
Their alignments are intentionally under-specified.

rdar://10301431

llvm-svn: 145273
 2011-11-28 20:42:56 +00:00
Craig Topper
6f5a0bc4e3 Add X86 instruction selection for VPERM2I128 when AVX2 is enabled. Merge VPERMILPS/VPERMILPD detection since they are pretty similar. 
llvm-svn: 145238
 2011-11-28 10:14:51 +00:00
NAKAMURA Takumi
85ad69c8df test/lit.cfg: Enable the feature 'asserts' to check output of llc -version. 
llc knows whether he is compiled with -DNDEBUG.
|  Optimized build with assertions.

llvm-svn: 145230
 2011-11-28 05:09:15 +00:00
Chris Lattner
c050288d89 remove a test that is using old-style llvm.dbg intrinsics, apparently only 
fails on ppc and arm hosts.

llvm-svn: 145188
 2011-11-27 18:13:47 +00:00