52465 Commits

Author SHA1 Message Date
Evan Cheng
5b9107c1b9 Forgot about ARM::tPUSH. It also has a new writeback operand.
llvm-svn: 83237
2009-10-02 05:03:07 +00:00
Evan Cheng
d6e64a4cfd Move load / store multiple before post-alloc scheduling.
llvm-svn: 83236
2009-10-02 04:57:15 +00:00
Evan Cheng
1532dec48b Test case for aligned attribute on function declaration.
llvm-svn: 83234
2009-10-02 04:45:37 +00:00
David Goodwin
cb4a66977c All callee-saved registers are live-out of a return block.
llvm-svn: 83223
2009-10-01 23:28:47 +00:00
David Goodwin
a4b73e486e Remove neonfp attribute and instead set default based on CPU string. Add -arm-use-neon-fp to override the default.
llvm-svn: 83218
2009-10-01 22:19:57 +00:00
Mike Stump
532ed49e39 Expand api out in the usual inserter way, though, I do have a
question, can we get rid of the BasicBlock versions of all inserters
and use Head == 0 to indicate the old case when GetInsertBlock == 0?

llvm-svn: 83216
2009-10-01 22:08:58 +00:00
David Goodwin
d0edce4c0d Restore the -post-RA-scheduler flag as an override for the target specification. Remove -mattr for setting PostRAScheduler enable and instead use CPU string.
llvm-svn: 83215
2009-10-01 21:46:35 +00:00
Evan Cheng
272a738580 ARM::tPOP and tPOP_RET each has an extra writeback operand now.
llvm-svn: 83214
2009-10-01 20:54:53 +00:00
Jim Grosbach
f106b9ad37 remove trailing whitespace
llvm-svn: 83213
2009-10-01 20:45:06 +00:00
Devang Patel
7aa19711f8 Add support to extract lexical scope information from DebugLoc attached with an machine instruction.
This is not yet enabled.

llvm-svn: 83210
2009-10-01 20:31:14 +00:00
David Goodwin
0a7770b3e0 Use MachineFrameInfo.getPristineRegs() to determine which callee-saved registers are available for anti-dependency breaking. Some cleanup.
llvm-svn: 83208
2009-10-01 19:45:32 +00:00
Devang Patel
7b4ba71afa Record first and last instruction of a scope in DbgScope.
llvm-svn: 83207
2009-10-01 18:25:23 +00:00
Dan Gohman
7cdf41cf01 Don't use identifiers that start with an underscore followed
by a capital letter, which invokes undefined behavior.

llvm-svn: 83206
2009-10-01 17:39:52 +00:00
Douglas Gregor
a3fb17c280 Teach CMake to look for bidirectional_iterator, iterator, forward_iterator, uint64_t, and u_int64_t, from Yonggang Luo
llvm-svn: 83203
2009-10-01 17:25:36 +00:00
Evan Cheng
68d79a17a0 Observe hasExtraSrcRegAllocReq and hasExtraDefRegAllocReq. Do not change
operands of instructions with these properties while breaking anti-dep.

llvm-svn: 83198
2009-10-01 08:26:23 +00:00
Evan Cheng
241092d89f Add hasExtraSrcRegAllocReq and hasExtraDefRegAllocReq flags to ld / st multiple,
ld / st pairs, etc.

llvm-svn: 83197
2009-10-01 08:22:27 +00:00
Evan Cheng
8ea3f4a592 Add instruction flags: hasExtraSrcRegAllocReq and hasExtraDefRegAllocReq. When
set, these flags indicate the instructions source / def operands have special
register allocation requirement that are not captured in their register classes.
Post-allocation passes (e.g. post-alloc scheduler) should not change their
allocations. e.g. ARM::LDRD require the two definitions to be allocated
even / odd register pair.

llvm-svn: 83196
2009-10-01 08:21:18 +00:00
Douglas Gregor
b4e6fce681 Remove GVNPRE.cpp from the CMake makefile
llvm-svn: 83194
2009-10-01 05:30:05 +00:00
Chris Lattner
857ed445a8 remove the GVNPRE pass. It has been subsumed by the GVN pass.
Ok'd by Owen.

llvm-svn: 83193
2009-10-01 02:18:36 +00:00
Evan Cheng
dc5ac208bf Update ARM JIT emitter to account for ld/st multiple changes.
llvm-svn: 83192
2009-10-01 01:39:21 +00:00
Evan Cheng
4dd7d7156e Change ld/st multiples to explicitly model the writeback to base register. This fixes most of the -ldstopti-before-sched2 regressions.
llvm-svn: 83191
2009-10-01 01:33:39 +00:00
Devang Patel
4f1147e386 Add another MDNode into DebugLocTuple. This will be used to keep track of inlined functions.
llvm-svn: 83190
2009-10-01 01:15:28 +00:00
Devang Patel
d24ba7a101 If location info is attached with an instruction then keep track of alloca slots used by a variable. This info will be used by AsmPrinter to emit debug info for variables.
llvm-svn: 83189
2009-10-01 01:03:26 +00:00
Devang Patel
e097bf49d0 Use MachineInstr as an processDebugLoc() argument.
This will allow processDebugLoc() to handle scopes for DWARF debug info. 

llvm-svn: 83183
2009-09-30 23:12:50 +00:00
Devang Patel
044648c2d7 Use MDNode * directly as an RecordSourceLine() argument.
llvm-svn: 83182
2009-09-30 22:51:28 +00:00
Devang Patel
ef84ca6011 Remove dead code.
llvm-svn: 83181
2009-09-30 22:43:52 +00:00
Devang Patel
cb516787d0 Add isFOO() helpers. Fix getDirectory() and getFilename() for DIScope.
llvm-svn: 83180
2009-09-30 22:34:41 +00:00
Bob Wilson
d6896006b1 Use OutStreamer.SwitchSection instead of writing out textual section directives.
Add a new TargetLoweringObjectFileMachO::getConstTextCoalSection method to
get access to that section.

llvm-svn: 83178
2009-09-30 22:25:37 +00:00
Bob Wilson
1cf44c8225 Add a new virtual EmitStartOfAsmFile method to the AsmPrinter and use this
to emit target-specific things at the beginning of the asm output.  This
fixes a problem for PPC, where the text sections are not being kept together
as expected.  The base class doInitialization code calls DW->BeginModule()
which emits a bunch of DWARF section directives.  The PPC doInitialization
code then emits all the TEXT section directives, with the intention that they
will be kept together. But as I understand it, the Darwin assembler treats
the default TEXT section as a special case and moves it to the beginning of
the file, which means that all those DWARF sections are in the middle of
the text.  With this change, the EmitStartOfAsmFile hook is called before
the DWARF section directives are emitted, so that all the PPC text section
directives come out right at the beginning of the file.

llvm-svn: 83176
2009-09-30 22:06:26 +00:00
Bob Wilson
59eb323058 Fix a comment typo.
llvm-svn: 83174
2009-09-30 21:44:42 +00:00
Devang Patel
43ce9e3e75 Check for null MDNode element while printing comment.
llvm-svn: 83172
2009-09-30 21:26:51 +00:00
Bob Wilson
44b5a5a58c Fix a comment.
llvm-svn: 83171
2009-09-30 21:26:13 +00:00
Bob Wilson
233aa46c87 The AsmPrinter base class contains a DwarfWriter member, so there's no need
for derived AsmPrinters to add another one.  In some cases, fixing this
removes the need to override the doInitialization method.

llvm-svn: 83170
2009-09-30 21:24:45 +00:00
Jeffrey Yasskin
2d4f3f6704 Assert that ConstantArrays are created with correctly-typed elements.
llvm-svn: 83168
2009-09-30 21:08:08 +00:00
Dan Gohman
2ecc146f0c Fix this code so that it doesn't try to iterate through a std::vector
while calling changeImmediateDominator, which removes elements from the
vector. This fixes PR5097.

llvm-svn: 83166
2009-09-30 20:54:16 +00:00
Reid Kleckner
4c0732ea64 Silence comparison always false warning in -Asserts mode.
llvm-svn: 83164
2009-09-30 20:43:07 +00:00
Jim Grosbach
b4fdc9252d Add additional assert() to verify no extraneous use of a scavenged register.
llvm-svn: 83163
2009-09-30 20:35:36 +00:00
Devang Patel
24270e88cc Print tag name for MDNodes that are used to encode debug info.
llvm-svn: 83160
2009-09-30 20:16:54 +00:00
Reid Kleckner
ffe2b97d7a Fix integer overflow in instruction scheduling. This can happen if we have
basic blocks that are so long that their size overflows a short.

Also assert that overflow does not happen in the future, as requested by Evan.

This fixes PR4401.

llvm-svn: 83159
2009-09-30 20:15:38 +00:00
Devang Patel
5d5d1f31b7 Silence unused variable warning.
llvm-svn: 83151
2009-09-30 17:13:41 +00:00
Jim Grosbach
2c211c7bfe Clarify comment phrasing.
llvm-svn: 83148
2009-09-30 15:23:38 +00:00
Evan Cheng
86bd5c3ae1 Add a option which would move ld/st multiple pass before post-alloc scheduling.
llvm-svn: 83145
2009-09-30 08:53:01 +00:00
Evan Cheng
bb0561f2dd Add a target hook to add pre- post-regalloc scheduling passes.
llvm-svn: 83144
2009-09-30 08:49:50 +00:00
Evan Cheng
a335221976 Forgot this test earlier.
llvm-svn: 83143
2009-09-30 08:41:27 +00:00
Chris Lattner
0731e5bc62 add macruby, fix a validation problem.
llvm-svn: 83142
2009-09-30 06:27:22 +00:00
Nick Lewycky
a44b8327fb Fix compile error as debug interface changed.
By the way, this code is buggy. You can't keep a map<MDNode *, something>
because the MDNode may be destroyed and reused for something else.

llvm-svn: 83141
2009-09-30 04:50:26 +00:00
Jim Grosbach
d885068ad4 replace TRI->isVirtualRegister() with TargetRegisterInfo::isVirtualRegister()
per customary usage

llvm-svn: 83137
2009-09-30 01:47:59 +00:00
Jim Grosbach
9655673c95 When checking whether we need to reserve a register for the scavenger,
the size of the saved frame pointer needs to be taken into account.

llvm-svn: 83136
2009-09-30 01:43:29 +00:00
Jim Grosbach
2d057f09e8 Add "isBarrier = 1" to return instructions.
Patch by Sylvere Teissier.

llvm-svn: 83135
2009-09-30 01:35:11 +00:00
Jim Grosbach
5cc33f7dac fix compiler warning
llvm-svn: 83132
2009-09-30 00:37:40 +00:00