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Author SHA1 Message Date
Dan Gohman
4d2339f18d Make SCEVExpander and LSR more aggressive about hoisting expressions out 
of loops.

llvm-svn: 97642
 2010-03-03 05:29:13 +00:00
Dan Gohman
da13ee1220 Revert r97580; that's not the right way to fix this. 
llvm-svn: 97639
 2010-03-03 04:36:42 +00:00
Evan Cheng
13f096bf0a Work in progress. Finding some cse now. 
llvm-svn: 97635
 2010-03-03 02:48:20 +00:00
Chris Lattner
2e934b978c remove nvload and two patterns that use it which are 
better done by dag combine.

llvm-svn: 97633
 2010-03-03 02:14:54 +00:00
Johnny Chen
6ecb4d7b7c Added 32-bit Thumb instructions t2NOP, t2YIELD, t2WFE, t2WFI, t2SEV, and t2DBG 
for disassembly only.

llvm-svn: 97632
 2010-03-03 02:09:43 +00:00
Bill Wendling
65baaf9499 Use APInt instead of zext value. 
llvm-svn: 97631
 2010-03-03 01:58:01 +00:00
Chris Lattner
88f948aec4 factor the 'in the default address space' check out to a single 
'dsload' pattern.  tblgen doesn't check patterns to see if they're
textually identical.  This allows better factoring.

llvm-svn: 97630
 2010-03-03 01:52:59 +00:00
Chris Lattner
b178d16c23 factor the 'sign extended from 8 bit' patterns better so 
that they are not destination type specific.  This allows
tblgen to factor them and the type check is redundant with
what the isel does anyway.

llvm-svn: 97629
 2010-03-03 01:45:01 +00:00
Evan Cheng
70b7ecdef9 - Change MachineInstr::isIdenticalTo to take a new option that determines whether it should skip checking defs or at least virtual register defs. This subsumes part of the TargetInstrInfo::isIdentical functionality. 
- Eliminate TargetInstrInfo::isIdentical and replace it with produceSameValue. In the default case, produceSameValue just checks whether two machine instructions are identical (except for virtual register defs). But targets may override it to check for unusual cases (e.g. ARM pic loads from constant pools).

llvm-svn: 97628
 2010-03-03 01:44:33 +00:00
Evan Cheng
ae376081d2 Add an option to enable machine cse (it's not doing anything yet. 
llvm-svn: 97627
 2010-03-03 01:38:35 +00:00
Evan Cheng
3f08373243 Ordering forward declarations. 
llvm-svn: 97626
 2010-03-03 01:37:50 +00:00
Bill Wendling
959aa1373b Don't turn assertions on by default. 
llvm-svn: 97623
 2010-03-03 01:13:55 +00:00
Evan Cheng
4e3c0e66f7 Eliminate unused instruction classes. 
llvm-svn: 97617
 2010-03-03 00:43:15 +00:00
Bill Wendling
d1f658563d This test case: 
long test(long x) { return (x & 123124) | 3; }

Currently compiles to:

_test:
        orl     $3, %edi
        movq    %rdi, %rax
        andq    $123127, %rax
        ret

This is because instruction and DAG combiners canonicalize

  (or (and x, C), D) -> (and (or, D), (C | D))

However, this is only profitable if (C & D) != 0. It gets in the way of the
3-addressification because the input bits are known to be zero.

llvm-svn: 97616
 2010-03-03 00:35:56 +00:00
Johnny Chen
7be11bea79 Added 32-bit Thumb instructions t2DMB variants, t2DSB variants, and t2ISBsy for 
disassembly only.

llvm-svn: 97614
 2010-03-03 00:16:28 +00:00
Erick Tryzelaar
9a8b7c41c3 Use the ocaml tag 0 since we are just returning an option value. 
llvm-svn: 97612
 2010-03-02 23:59:08 +00:00
Erick Tryzelaar
481b9b1d9f Don't use an ocaml keyword in an ocamldoc comment. 
llvm-svn: 97611
 2010-03-02 23:59:05 +00:00
Erick Tryzelaar
99a0f1ebff Expose the optimization level for the jit in ocaml. 
llvm-svn: 97610
 2010-03-02 23:59:03 +00:00
Erick Tryzelaar
f04f234444 Remove module providers from ocaml. 
llvm-svn: 97609
 2010-03-02 23:59:00 +00:00
Erick Tryzelaar
66bf49241f Add Module functions in place of module providers. 
llvm-svn: 97608
 2010-03-02 23:58:54 +00:00
Chris Lattner
eed11ae4f8 merge two loops over all nodes in the graph into one. 
llvm-svn: 97606
 2010-03-02 23:12:51 +00:00
Chris Lattner
27d98e4772 eliminate PreprocessForRMW now that isel handles it. 
We still preprocess calls and fp return stuff.

llvm-svn: 97598
 2010-03-02 22:33:56 +00:00
Chris Lattner
f781ca5fcb remove 300 lines of code that is now dead in the MSP430 backend 
now that isel handles chains more aggressively.  This also
allows us to make isLegalToFold non-virtual.

llvm-svn: 97597
 2010-03-02 22:30:08 +00:00
Chris Lattner
9c9c1158cb Fix some issues in WalkChainUsers dealing with 
CopyToReg/CopyFromReg/INLINEASM.  These are annoying because
they have the same opcode before an after isel.  Fix this by
setting their NodeID to -1 to indicate that they are selected,
just like what automatically happens when selecting things that
end up being machine nodes.

With that done, give IsLegalToFold a new flag that causes it to
ignore chains.  This lets the HandleMergeInputChains routine be
the one place that validates chains after a match is successful,
enabling the new hotness in chain processing.  This smarter
chain processing eliminates the need for "PreprocessRMW" in the
X86 and MSP430 backends and enables MSP to start matching it's
multiple mem operand instructions more aggressively.

I currently #if out the dead code in the X86 backend and MSP 
backend, I'll remove it for real in a follow-on patch.

The testcase changes are:
  test/CodeGen/X86/sse3.ll: we generate better code
  test/CodeGen/X86/store_op_load_fold2.ll: PreprocessRMW was 
      miscompiling this before, we now generate correct code
      Convert it to filecheck while I'm at it.
  test/CodeGen/MSP430/Inst16mm.ll: Add a testcase for mem/mem
      folding to make anton happy. :)

llvm-svn: 97596
 2010-03-02 22:20:06 +00:00
Johnny Chen
96f78fcb96 Added 32-bit Thumb instruction CLREX (Clear-Exclusive) for disassembly only. 
llvm-svn: 97595
 2010-03-02 22:11:06 +00:00
Evan Cheng
90979fa639 Allow specialization of ScopedHashTable of non-default DenseMapInfo. 
llvm-svn: 97594
 2010-03-02 22:10:24 +00:00
Bill Wendling
1ad5825d64 Okay. One last attempt: 
Place the LSDA into the TEXT section on Mach-O. This saves space.

llvm-svn: 97592
 2010-03-02 21:50:35 +00:00
Chris Lattner
d25f212f9f this testcase is failing because pic16 doesn't define a reg/reg 
xor pattern.  I have no plans to fix this XFAIL.

llvm-svn: 97587
 2010-03-02 20:48:24 +00:00
Erick Tryzelaar
0b0e6ace2c Add support for use to ocaml. 
llvm-svn: 97586
 2010-03-02 20:32:32 +00:00
Erick Tryzelaar
0d0b778d8b Rename LLVMUseIteratorRef to LLVMUseRef since we don't refer to iterators in llvm-c. 
llvm-svn: 97585
 2010-03-02 20:32:28 +00:00
Chris Lattner
f84b94d738 xfail this for now. 
llvm-svn: 97584
 2010-03-02 19:53:25 +00:00
Johnny Chen
dc6ad68a6d Removed the extra S from the multiclass def T2I_adde_sube_s_irs as well as from 
the opc string passed in, since it's a given from the class inheritance of T2sI.
The fixed the extra 's' in adcss & sbcss when disassembly printing.

llvm-svn: 97582
 2010-03-02 19:38:59 +00:00
Chris Lattner
0c14477270 run HandleMergeInputChains even if we only have one input chain. 
llvm-svn: 97581
 2010-03-02 19:34:59 +00:00
Dan Gohman
f06941597a When expanding an expression such as (A + B + C + D), sort the operands 
by loop depth and emit loop-invariant subexpressions outside of loops.
This speeds up MultiSource/Applications/viterbi and others.

llvm-svn: 97580
 2010-03-02 19:32:21 +00:00
Evan Cheng
a93cb01841 Swap parameters of isSafeToMove and isSafeToReMat for consistency. 
llvm-svn: 97578
 2010-03-02 19:03:01 +00:00
Evan Cheng
e335555959 Fix typo. 
llvm-svn: 97577
 2010-03-02 19:02:27 +00:00
Chris Lattner
845db3b26d clean up some testcases. 
llvm-svn: 97576
 2010-03-02 18:56:03 +00:00
Chris Lattner
13bece08fd the sorting predicate should work for comparing an element 
to itself, even though this isn't wildly useful.

llvm-svn: 97574
 2010-03-02 18:15:02 +00:00
Johnny Chen
88f05c26a5 Added 32-bit Thumb instructions: CPS, SDIV, UDIV, SXTB16, SXTAB16, UXTAB16, SEL, 
SMMULR, SMMLAR, SMMLSR, TBB, TBH, and 16-bit Thumb instruction CPS for
disassembly only.

llvm-svn: 97573
 2010-03-02 18:14:57 +00:00
Devang Patel
7de01928e9 Fix grammar. 
Thanks Duncan!

llvm-svn: 97572
 2010-03-02 17:58:15 +00:00
Johnny Chen
9b5f5645e4 AL is an optional mnemonic extension for always, except in IT instructions. 
Add printMandatoryPredicateOperand() PrintMethod for IT predicate printing.

Ref: A8.3 Conditional execution
llvm-svn: 97571
 2010-03-02 17:57:15 +00:00
Johnny Chen
ddbf29a06c Change some asm shift opcode strings to lowercase. 
llvm-svn: 97567
 2010-03-02 17:03:18 +00:00
Xerxes Ranby
8f57e7907a fix typo add missing ( 
llvm-svn: 97565
 2010-03-02 13:42:03 +00:00
Xerxes Ranby
1adef1fad2 Unbreak llvm-arm-linux buildbot and fix PR5309. 
llvm-svn: 97564
 2010-03-02 13:26:18 +00:00
Duncan Sands
5a60a368dd Rather than passing "false" for InsertBefore, AddressSpace for ThreadLocal, 
and nothing for AddressSpace, pass 0 for InsertBefore, "false" for ThreadLocal
and AddressSpace for AddressSpace.  Spotted by gcc-4.5.

llvm-svn: 97563
 2010-03-02 11:18:43 +00:00
Chris Lattner
2019e2922f Fix the xfail I added a couple of patches back. The issue 
was that we weren't properly handling the case when interior
nodes of a matched pattern become dead after updating chain
and flag uses.  Now we handle this explicitly in 
UpdateChainsAndFlags.

llvm-svn: 97561
 2010-03-02 07:50:03 +00:00
Chris Lattner
d23cbd049d I was confused about this, it turns out that MorphNodeTo 
*does* delete ex-operands that become dead.

llvm-svn: 97559
 2010-03-02 07:14:49 +00:00
Chris Lattner
bd1d913a9d factor node morphing out to its own helper method. 
llvm-svn: 97558
 2010-03-02 06:55:04 +00:00
Chris Lattner
56c9bd0c6b attributes are not part of types anymore, patch by James Woodyatt! 
llvm-svn: 97557
 2010-03-02 06:36:51 +00:00
Chris Lattner
3cfdaec84a eliminate CodeGen/DAGISelHeader.h, it is empty now. 
llvm-svn: 97556
 2010-03-02 06:36:28 +00:00