Commit Graph

94302 Commits

Author SHA1 Message Date
Elena Demikhovsky
505373db43 Added encoding prefixes for KNL instructions (EVEX).
Added 512-bit operands printing.
Added instruction formats for KNL instructions.

llvm-svn: 187324
2013-07-28 08:28:38 +00:00
Chandler Carruth
d3834e5bef Now that mem2reg understands how to cope with a slightly wider set of
uses of an alloca, we can pre-compute promotability while analyzing an
alloca for splitting in SROA. That lets us short-circuit the common case
of a bunch of trivially promotable allocas. This cuts 20% to 30% off the
run time of SROA for typical frontend-generated IR sequneces I'm seeing.
It gets the new SROA to within 20% of ScalarRepl for such code. My
current benchmark for these numbers is PR15412, but it fits the general
pattern of IR emitted by Clang so it should be widely applicable.

llvm-svn: 187323
2013-07-28 08:27:12 +00:00
Chandler Carruth
ca3736c604 Thread DataLayout through the callers and into mem2reg. This will be
useful in a subsequent patch, but causes an unfortunate amount of noise,
so I pulled it out into a separate patch.

llvm-svn: 187322
2013-07-28 06:43:11 +00:00
Bill Schmidt
f400d5844e [PowerPC] Add comment explaining preprocessor directive.
llvm-svn: 187320
2013-07-28 03:23:32 +00:00
Bill Schmidt
795f27eb7f Revert 187318
llvm-svn: 187319
2013-07-28 02:13:24 +00:00
Bill Schmidt
0c824086d1 [PowerPC] Remove unnecessary preprocessor checking.
The tests !defined(__ppc__) && !defined(__powerpc__) are not needed
or helpful when verifying that code is being compiled for a 64-bit
target.  The simpler test provided by this revision is sufficient to
tell if the target is 64-bit.

llvm-svn: 187318
2013-07-28 02:08:13 +00:00
Nadav Rotem
b6c365bd70 Update the comment
llvm-svn: 187316
2013-07-27 23:28:47 +00:00
Michael Gottesman
f899e8827f [APFloat] Make all arithmetic operations with NaN produce positive NaNs.
IEEE-754R 1.4 Exclusions states that IEEE-754R does not specify the
interpretation of the sign of NaNs. In order to remove an irrelevant
variable that most floating point implementations do not use,
standardize add, sub, mul, div, mod so that operating anything with
NaN always yields a positive NaN.

In a later commit I am going to update the APIs for creating NaNs so
that one can not even create a negative NaN.

llvm-svn: 187314
2013-07-27 21:49:25 +00:00
Michael Gottesman
8ccc9506c7 [APFloat] Move setting fcNormal in zeroSignificand() to calling code.
Zeroing the significand of a floating point number does not necessarily cause a
floating point number to become finite non zero. For instance, if one has a NaN,
zeroing the significand will cause it to become +/- infinity.

llvm-svn: 187313
2013-07-27 21:49:21 +00:00
Michael Gottesman
a84f57e3e2 [APFloat] Removed nextafter from missing operations since it is implemented in APFloat::next.
llvm-svn: 187312
2013-07-27 21:49:19 +00:00
Aaron Ballman
d188c8d939 Re-enabling some more MSVC warnings; all of these compile cleanly with no further changes required.
llvm-svn: 187310
2013-07-27 20:20:28 +00:00
Matt Arsenault
124fe61a07 Minor code simplification suggested by Duncan
llvm-svn: 187309
2013-07-27 19:22:28 +00:00
Benjamin Kramer
2b93c9d1a8 DwarfDebug: MD5 is always little endian, bswap on big endian platforms.
This makes LLVM emit the same signature regardless of host and target endianess.

llvm-svn: 187304
2013-07-27 14:14:43 +00:00
Chandler Carruth
4602399982 Create a constant pool symbol for the GOT in the ARMCGBR the same way we
do in the SDag when lowering references to the GOT: use
ARMConstantPoolSymbol rather than creating a dummy global variable. The
computation of the alignment still feels weird (it uses IR types and
datalayout) but it preserves the exact previous behavior. This change
fixes the memory leak of the global variable detected on the valgrind
leak checking bot.

Thanks to Benjamin Kramer for pointing me at ARMConstantPoolSymbol to
handle this use case.

llvm-svn: 187303
2013-07-27 11:58:26 +00:00
Chandler Carruth
36e7c40816 Fix yet another memory leak found by the vg-leak bot. Folks (including
me) should start watching this bot more as its catching lots of bugs.

The fix here is to not construct the global if we aren't going to need
it. That's cheaper anyways, and globals have highly predictable types in
practice. I've added an assert to catch skew between our manual testing
of the type and the actual type just for paranoia's sake.

Note that this pattern is actually fine in most globals because when you
build a global with a module it automatically is moved to be owned by
that module. But here, we're in isel and don't really want to do that.
The solution of not creating a global is simpler anyways.

llvm-svn: 187302
2013-07-27 11:23:08 +00:00
Chandler Carruth
45c5f8b159 Fix a memory leak in the debug emission by simply not allocating memory.
There doesn't appear to be any reason to put this variable on the heap.
I'm suspicious of the LexicalScope above that we stuff in a map and then
delete afterward, but I'm just trying to get the valgrind bot clean.

llvm-svn: 187301
2013-07-27 11:09:58 +00:00
Chandler Carruth
19f241c35f Fix a memory leak in the hexagon scheduler. We call initialize here more
than once, and the second time through we leaked memory. Found thanks to
the vg-leak bot, but I can't locally reproduce it with valgrind. The
debugger confirms that it is in fact leaking here.

This whole code is totally gross. Why is initialize being called on each
runOnFunction??? Why aren't these OwningPtr<>s, and why aren't their
lifetimes better defined? Anyways, this is just a surgical change to
help out the leak checking bots.

llvm-svn: 187299
2013-07-27 10:48:45 +00:00
Chandler Carruth
b3e0150179 Don't use all the #ifdefs to hide the stats counters and instead rely on
their being optimized out in debug mode. Realistically, this just isn't
going to be the slow part anyways. This also fixes unused variable
warnings that are breaking LLD build bots. =/ I didn't see these at
first, and kept losing track of the fact that they were broken.

llvm-svn: 187297
2013-07-27 10:17:49 +00:00
Chandler Carruth
b4731e3c73 Merge the removal of dead instructions and lifetime markers with the
analysis of the alloca. We don't need to visit all the users twice for
this. We build up a kill list during the analysis and then just process
it afterward. This recovers the tiny bit of performance lost by moving
to the visitor based analysis system as it removes one entire use-list
walk from mem2reg. In some cases, this is now faster than mem2reg was
previously.

llvm-svn: 187296
2013-07-27 09:43:30 +00:00
Aaron Ballman
593ee49c2d Re-enabling a warning in MSVC mode now that r187292 fixed the only instance of the warning.
llvm-svn: 187293
2013-07-27 03:35:44 +00:00
Tom Stellard
7c0a09eccb SimplifyCFG: Add missing tests from r187278
llvm-svn: 187291
2013-07-27 02:54:44 +00:00
Nick Lewycky
5cf284ba76 Update this CMakeLists.txt for r187283 too.
llvm-svn: 187286
2013-07-27 01:26:30 +00:00
Manman Ren
d32ce58b2f Debug Info Verifier: verify SPs in llvm.dbg.sp.
Also always add DIType, DISubprogram and DIGlobalVariable to the list
in DebugInfoFinder without checking them, so we can verify them later
on.

llvm-svn: 187285
2013-07-27 01:26:08 +00:00
Nick Lewycky
fc32c79b3a Also update CMakeLists.txt for r187283.
llvm-svn: 187284
2013-07-27 01:25:51 +00:00
Nick Lewycky
3d5df03884 Reimplement isPotentiallyReachable to make nocapture deduction much stronger.
Adds unit tests for it too.

Split BasicBlockUtils into an analysis-half and a transforms-half, and put the
analysis bits into a new Analysis/CFG.{h,cpp}. Promote isPotentiallyReachable
into llvm::isPotentiallyReachable and move it into Analysis/CFG.

llvm-svn: 187283
2013-07-27 01:24:00 +00:00
Aaron Ballman
def9cd5679 Re-enabling some more MSVC warnings; all of these compile cleanly with no further changes required.
llvm-svn: 187279
2013-07-27 00:13:11 +00:00
Tom Stellard
8e98bf332b SimplifyCFG: Use parallel-and and parallel-or mode to consolidate branch conditions
Merge consecutive if-regions if they contain identical statements.
Both transformations reduce number of branches.  The transformation
is guarded by a target-hook, and is currently enabled only for +R600,
but the correctness has been tested on X86 target using a variety of
CPU benchmarks.

Patch by: Mei Ye

llvm-svn: 187278
2013-07-27 00:01:07 +00:00
Rafael Espindola
7aa572b49e Move the default back to pipefail. I accidentally reverted it before.
llvm-svn: 187271
2013-07-26 23:22:43 +00:00
Rafael Espindola
095401ba0b Propagate pipefail when cloning.
llvm-svn: 187268
2013-07-26 23:17:38 +00:00
Nadav Rotem
9bebda1517 SLP Vectorier: Don't vectorize really short chains because they are already handled by the SelectionDAG store-vectorizer, which does a better job in deciding when to vectorize.
llvm-svn: 187267
2013-07-26 23:07:55 +00:00
Nadav Rotem
965db2159b SLP Vectorizer: Disable the vectorization of non power of two chains, such as <3 x float>, because we dont have a good cost model for these types.
llvm-svn: 187265
2013-07-26 22:53:11 +00:00
Rafael Espindola
2cf6d36f16 Use pipefail when available.
This change makes test with RUN lines like
RUN: opt ... | FileCheck

fail if opt fails, even if it prints what FileCheck wants. Enabling this
found some interesting cases of broken tests that were not being noticed
because opt (or some other tool) was crashing late.

Pipefail is used when the shell supports it or when using the internal
python based tester.

llvm-svn: 187261
2013-07-26 22:32:58 +00:00
Rafael Espindola
d96265e7c2 next batch of -disable-debug-info-verifier
llvm-svn: 187260
2013-07-26 22:31:26 +00:00
Rafael Espindola
326babb234 Revert "[PowerPC] Improve consistency in use of __ppc__, __powerpc__, etc."
This reverts commit r187248. It broke many bots.

llvm-svn: 187254
2013-07-26 22:13:57 +00:00
Owen Anderson
e7a1434407 Fix variable name.
llvm-svn: 187253
2013-07-26 22:06:21 +00:00
Aaron Ballman
0de85fc511 Re-enabling the C4065 warning for MSVC builds as it no longer fires due to tablegen.
llvm-svn: 187252
2013-07-26 22:03:03 +00:00
Bill Wendling
7cdb6620b2 Use a non-c'tor for converting a boolean into a StringRef.
llvm-svn: 187250
2013-07-26 21:50:30 +00:00
Owen Anderson
841856eb0b When InstCombine tries to fold away (fsub x, (fneg y)) into (fadd x, y), it is
also worthwhile for it to look through FP extensions and truncations, whose
application commutes with fneg.

llvm-svn: 187249
2013-07-26 21:40:29 +00:00
Bill Schmidt
149eda1b1e [PowerPC] Improve consistency in use of __ppc__, __powerpc__, etc.
Both GCC and LLVM will implicitly define __ppc__ and __powerpc__ for
all PowerPC targets, whether 32- or 64-bit.  They will both implicitly
define __ppc64__ and __powerpc64__ for 64-bit PowerPC targets, and not
for 32-bit targets.  We cannot be sure that all other possible
compilers used to compile Clang/LLVM define both __ppc__ and
__powerpc__, for example, so it is best to check for both when relying
on either inside the Clang/LLVM code base.

This patch makes sure we always check for both variants.  In addition,
it fixes one unnecessary check in lib/Target/PowerPC/PPCJITInfo.cpp.
(At least one of __ppc__ and __powerpc__ should always be defined when
compiling for a PowerPC target, no matter which compiler is used, so
testing for them is unnecessary.)

There are some places in the compiler that check for other variants,
like __POWERPC__ and _POWER, and I have left those in place.  There is
no need to add them elsewhere.  This seems to be in Apple-specific
code, and I won't take a chance on breaking it.

There is no intended change in behavior; thus, no test cases are
added.

llvm-svn: 187248
2013-07-26 21:39:15 +00:00
Eric Christopher
69a99888d5 Use more parens to clarify assert.
llvm-svn: 187247
2013-07-26 21:16:25 +00:00
Eric Christopher
6e8fb58fea Remove addLetterToHash, no functional change.
llvm-svn: 187245
2013-07-26 21:07:18 +00:00
Akira Hatanaka
329763d851 [mips] Implement llvm.trap intrinsic.
Patch by Sasa Stankovic.

llvm-svn: 187244
2013-07-26 20:58:55 +00:00
Akira Hatanaka
689acaf88f [mips] Fix FP conditional move instructions to have explicit FP condition code
register operands.

llvm-svn: 187242
2013-07-26 20:51:20 +00:00
Rafael Espindola
8c0a020996 Add missing 'n'.
Thanks to Han Finkel for noticing it.

llvm-svn: 187241
2013-07-26 20:44:45 +00:00
Akira Hatanaka
35c6208a5a [mips] Fix FP branch instructions to have explicit FP condition code register
operands.

llvm-svn: 187238
2013-07-26 20:13:47 +00:00
Manman Ren
2bd542e9c6 Debug Info Verifier: enable verification of DICompileUnit.
We used to call Verify before adding DICompileUnit to the list, and now we
remove the check and always add DICompileUnit to the list in DebugInfoFinder,
so we can verify them later on.

llvm-svn: 187237
2013-07-26 20:04:30 +00:00
Akira Hatanaka
6e2705a339 [mips] Increase the number of floating point condition code registers to eight.
llvm-svn: 187234
2013-07-26 19:03:48 +00:00
Akira Hatanaka
e6ef926882 [mips] Fix floating point branch, comparison, and conditional move instructions
to have register FCC0 (the first floating point condition code register) in
their Uses/Defs list.

No intended functionality change.

llvm-svn: 187233
2013-07-26 19:01:56 +00:00
Akira Hatanaka
f96ca1bdd3 [mips] Delete register print method MipsInstPrinter::printCPURegs that is not
needed. The generic method printOperand will do.

No functionality change.

llvm-svn: 187231
2013-07-26 18:50:42 +00:00
Akira Hatanaka
66dcf905b6 [mips] Print instructions "beq", "bne" and "or" using assembler pseudo
instructions "beqz", "bnez" and "move", when possible.

beq $2, $zero, $L1 => beqz $2, $L1
bne $2, $zero, $L1 => bnez $2, $L1
or  $2, $3, $zero  => move $2, $3

llvm-svn: 187229
2013-07-26 18:34:25 +00:00