ilist of MachineInstr objects. This allows constant time removal and
insertion of MachineInstr instances from anywhere in each
MachineBasicBlock. It also allows for constant time splicing of
MachineInstrs into or out of MachineBasicBlocks.
llvm-svn: 11340
methods which have strangely different semantics in different backends,
and noone knew what any did.
Getting rid of these ALSO allows the dependence of MachineInstr.h on
MRegisterInfo.h to be removed, which makes me much happier, and probably
alkis too. :)
llvm-svn: 11287
a) remove opIsUse(), opIsDefOnly(), opIsDefAndUse()
b) add isUse(), isDef()
c) rename opHiBits32() to isHiBits32(),
opLoBits32() to isLoBits32(),
opHiBits64() to isHiBits64(),
opLoBits64() to isLoBits64().
This results to much more readable code, for example compare
"op.opIsDef() || op.opIsDefAndUse()" to "op.isDef()" a pattern used
very often in the code.
llvm-svn: 10461
This substantially shrinks the size of each machine instruction, which should
make allocation faster and the cache footprint of the machine code lighter.
Here are some timings for code generation of the larger benchmarks we have.
This are timings of code generation phases of the X86 JIT, when compiled in
debug mode:
Before After Diff
164.gzip:
InstSel 0.0878 0.0722 -21.6%
RegAlloc 0.2031 0.1757 -15.6%
TOTAL 0.5585 0.4999 -11.7%
Ptrdist-bc:
InstSel 0.0878 0.0722 -21.6%
RegAlloc 0.2070 0.1933 - 7.1%
TOTAL 0.6972 0.6464 - 7.9%
197.parser:
InstSel 0.2148 0.2148 - 0.0%
RegAlloc 0.4941 0.4277 -15.5%
TOTAL 1.3749 1.2851 - 7.0%
175.vpr:
InstSel 0.2519 0.2109 -19.4%
RegAlloc 0.5976 0.5663 - 5.5%
TOTAL 1.6933 1.6347 - 3.5%
254.gap:
InstSel 1.1328 0.9921 -14.2%
RegAlloc 2.6933 2.4804 - 8.6%
TOTAL 7.7871 7.2499 - 7.4%
llvm-svn: 7622
so get rid of the def/use parameters that were getting passed in.
**** This now changes the semantics of these methods to preserve the flags,
not clobber them!
llvm-svn: 7602
* Document the MOTy namespace correctly for doxygen
* Eliminate usage of the MachineOpCode typedef, which should eventually
be eliminated entirely.
llvm-svn: 6584
* Add new isPCRelative modifier flag which should be used in place of MO_PCRelativeDisp type.
* Fix a bug in isPhysicalRegister
* Add new setOpcode and RemoveOperand methods
llvm-svn: 5209
MO_MachineRegister, we no longer distinguish Virtual vs. Machine registers
externally, they're ALL registers, all equal.
Registers are only differentiated whether they are >=
MRegisterInfo::FirstVirtual or not.
llvm-svn: 4823
