Commit Graph

6574 Commits

Author SHA1 Message Date
Lauro Ramos Venancio
5765bcd825 Define PrivateGlobalPrefix for ARM Linux. (Fix CodeGen/ARM/large_stack.ll)
llvm-svn: 33763
2007-02-01 21:43:53 +00:00
Evan Cheng
3d9b702988 Pasto. Lots of it.
llvm-svn: 33762
2007-02-01 20:44:52 +00:00
Lauro Ramos Venancio
5781691b22 Fix .thumb_func directive on linux.
llvm-svn: 33759
2007-02-01 18:25:34 +00:00
Jim Laskey
52a12383a4 Support for non-landing pad exception handling.
llvm-svn: 33755
2007-02-01 16:31:34 +00:00
Evan Cheng
88b703eec4 - Off by one bugs in maximum displacement calculation / testing.
- In thumb mode, a new constpool island BB size should be 4 + 2 to
  compensate for the potential padding due to alignment requirement.

llvm-svn: 33753
2007-02-01 10:16:15 +00:00
Anton Korobeynikov
c469cbc2e7 Fixed uninitialized stuff inside LegalizeDAG. Fortunately, the only
affected part is codegen of "memove" inside x86 backend. This fixes
PR1144

llvm-svn: 33752
2007-02-01 08:39:52 +00:00
Evan Cheng
d3dc2eefc2 .set pc relative displacement bug: label should be moved down one instruction
to just before the add r1, pc:

Before:
        .set PCRELV0, (LJTI1_0_0-(LPCRELL0+4))
LPCRELL0:
        mov r1, #PCRELV0
        add r1, pc

Now:
        .set PCRELV0, (LJTI1_0_0-(LPCRELL0+4))
        mov r1, #PCRELV0
LPCRELL0:
        add r1, pc

llvm-svn: 33744
2007-02-01 03:04:49 +00:00
Evan Cheng
eafe1f7bd9 Add a note.
llvm-svn: 33743
2007-02-01 02:46:20 +00:00
Evan Cheng
9f177f9058 Also set alignment of stack-based structs to 4 in thumb mode.
llvm-svn: 33741
2007-02-01 02:18:36 +00:00
Evan Cheng
439dcbedba Special epilogue for vararg functions. We cannot do a pop to pc because
there follows a sp increment for the va register save region. Instead issue
a separate pop to another register, increment sp, and then return:
        pop {r4, r5, r6, r7}
        pop {r3}
        add sp, #3 * 4
        bx r3

llvm-svn: 33739
2007-02-01 01:49:46 +00:00
Evan Cheng
9f87fca49c Pessmistically assume the .align 2 before the first constpool entry adds
two bytes padding.

llvm-svn: 33734
2007-02-01 01:09:47 +00:00
Evan Cheng
3d8d381600 Possible JT improvements.
llvm-svn: 33733
2007-02-01 01:07:48 +00:00
Chris Lattner
f4e5c29cb9 Fix CodeGen/PowerPC/2007-01-31-InlineAsmAddrMode.ll
llvm-svn: 33732
2007-02-01 00:39:08 +00:00
Evan Cheng
54a1324bae Don't emit unnecessary .align directive.
llvm-svn: 33729
2007-01-31 23:39:39 +00:00
Evan Cheng
765de99fac Handle an interesting corner case: the constpool_entry being reference is two
instructions away, i.e. its address is equal to PC.
        %r0 = tLDRpci <cp#0>
        bx
        CONSTPOOL_ENTRY 0 <cp#0>, 4

llvm-svn: 33728
2007-01-31 23:35:18 +00:00
Evan Cheng
082e441207 Don't want to add FramePtr to callee save spill list twice.
llvm-svn: 33727
2007-01-31 23:17:29 +00:00
Evan Cheng
457d429cab Darwin ABI requires FP to point to stack slot of prev FP.
llvm-svn: 33724
2007-01-31 22:25:33 +00:00
Evan Cheng
0ce094c7a8 Add entry.
llvm-svn: 33723
2007-01-31 22:11:38 +00:00
Evan Cheng
41bee13a0e Thumb add sp, #imm requires the immediate value be multiple of 4. For now,
change preferred alignment of short, byte, bool to 4.

llvm-svn: 33722
2007-01-31 22:08:40 +00:00
Evan Cheng
476cd5c2d1 Update comment.
llvm-svn: 33721
2007-01-31 22:06:44 +00:00
Evan Cheng
8596afac45 Dead comment.
llvm-svn: 33719
2007-01-31 21:31:25 +00:00
Evan Cheng
a08ef111bb Thumb asm syntax does not want 's' suffix for flag setting opcodes.
llvm-svn: 33717
2007-01-31 20:12:31 +00:00
Evan Cheng
1df8529721 When determining whether a pc relative branch / load displacement fits in the
instruction field, adjust it for PC value (4 for thumb, 8 for arm).

llvm-svn: 33711
2007-01-31 19:57:44 +00:00
Chris Lattner
084d1d8706 A relatively simple PPC optimization.
llvm-svn: 33709
2007-01-31 19:49:20 +00:00
Evan Cheng
f6e0e6cada Some comments.
llvm-svn: 33707
2007-01-31 18:29:27 +00:00
Evan Cheng
16edf4f9bf ConstPool island bug: watch out for cases where UserMI is the last MI of the BB.
llvm-svn: 33706
2007-01-31 18:19:07 +00:00
Lauro Ramos Venancio
e22bc8635e ARM fix: Miscompilation when frame pointer can't be eliminated. Uninitialized frame pointer register is used.
llvm-svn: 33703
2007-01-31 13:12:46 +00:00
Evan Cheng
608ad034b0 Specify the right CC for comparison libcalls.
llvm-svn: 33702
2007-01-31 09:30:58 +00:00
Evan Cheng
e5f5439313 Observe -soft-float.
llvm-svn: 33699
2007-01-31 08:40:13 +00:00
Evan Cheng
0ee9a27976 - Added Thumb constpool island support.
- Islands are inserted right after the user MI since thumb LDR cannot encode
  negative offset.

llvm-svn: 33690
2007-01-31 02:22:22 +00:00
Evan Cheng
26ee4f882b During PEI, if the immediate value of sp + offset is too large (i.e. something
that would require > 3 instructions to materialize), load the immediate from a
constpool entry.

llvm-svn: 33667
2007-01-30 23:01:46 +00:00
Evan Cheng
0f07707270 - Fix codegen for pc relative constant (e.g. JT) in thumb mode:
.set PCRELV0, (LJTI1_0_0-(LPCRELL0+4))
LPCRELL0:
        add r1, pc, #PCRELV0
This is not legal since add r1, pc, #c requires the constant be a multiple of 4.
Do the following instead:
        .set PCRELV0, (LJTI1_0_0-(LPCRELL0+4))
LPCRELL0:
        mov r1, #PCRELV0
        add r1, pc

- In thumb mode, it's not possible to use .set generate a pc relative stub
  address. The stub is ARM code which is in a different section from the thumb
  code. Load the value from a constpool instead.
- Some asm printing clean up.

llvm-svn: 33664
2007-01-30 20:37:08 +00:00
Reid Spencer
19af04a142 For PR1136: Rename GlobalVariable::isExternal as isDeclaration to avoid
confusion with external linkage types.

llvm-svn: 33663
2007-01-30 20:08:39 +00:00
Evan Cheng
5e0f0364d0 Copy and paste bug.
llvm-svn: 33658
2007-01-30 08:22:33 +00:00
Evan Cheng
3f02e5b1e7 Darwin -static should codegen static ctors / dtors to .constructor / .destructor sections.
llvm-svn: 33657
2007-01-30 08:04:53 +00:00
Evan Cheng
78628c7f32 Misseed thumb jumptable branch.
llvm-svn: 33656
2007-01-30 08:03:06 +00:00
Evan Cheng
d0ed3f753b In thumb mode, round up stack frame size to multiple of 4 since add/sub
sp, imm instructions implicitly multiply the offset by 4.

llvm-svn: 33653
2007-01-30 02:57:02 +00:00
Evan Cheng
36f03730d0 Thumb eliminateFrameIndex fixes.
llvm-svn: 33652
2007-01-30 02:36:01 +00:00
Evan Cheng
99a2f7d598 Change the operand orders to t_addrmode_s* to make it easier to morph
instructions that use these address modes to instructions that use
t_addrmode_sp.

llvm-svn: 33651
2007-01-30 02:35:32 +00:00
Evan Cheng
91ad06dd75 - In thumb mode, if size of MachineFunction is >= 2048, force LR to be
spilled (if it is not already).
- If LR is spilled, use BL to implement far jumps. LR is not used as a GPR
  in thumb mode so it can be clobbered if it is properly spilled / restored
  in prologue / epilogue.
- If LR is force spilled but no far jump has been emitted, try undo'ing the
  spill by:
  push lr -> delete
  pop pc -> bx lr

llvm-svn: 33650
2007-01-30 01:18:38 +00:00
Evan Cheng
a16118a6cf Use BL to implement Thumb far jumps.
llvm-svn: 33649
2007-01-30 01:13:37 +00:00
Evan Cheng
171943e26e Factor GetInstSize() out of constpool island pass.
llvm-svn: 33644
2007-01-29 23:45:17 +00:00
Jim Laskey
6f5d7d292f Only gather frame info if debug or eh.
llvm-svn: 33639
2007-01-29 23:20:22 +00:00
Nate Begeman
dc46021355 Finish off bug 680, allowing targets to custom lower frame and return
address nodes.

llvm-svn: 33636
2007-01-29 22:58:52 +00:00
Nate Begeman
32cbf413b6 We'd still like to register allocate r2 on darwin before the callee-save
regs.

llvm-svn: 33635
2007-01-29 22:57:48 +00:00
Jim Laskey
5fdc488d4a rename flag
llvm-svn: 33634
2007-01-29 22:40:03 +00:00
Evan Cheng
903e98b477 Comment.
llvm-svn: 33633
2007-01-29 22:23:02 +00:00
Evan Cheng
fe602cabee Remember if LR register has been spilled in this function.
llvm-svn: 33632
2007-01-29 22:22:24 +00:00
Anton Korobeynikov
2b2aa3f0a1 Save all registers by default, as they can be used to pass parameters
for "inreg" calls

llvm-svn: 33631
2007-01-29 21:28:01 +00:00
Nate Begeman
484e7a8b01 Update some of the llvm in the readme
llvm-svn: 33630
2007-01-29 21:21:22 +00:00