Devang Patel
e4f39224eb
Keep track of analysis information inherited from Module pass manager.
...
llvm-svn: 48576
2008-03-20 01:09:53 +00:00
Scott Michel
e747d20130
Add more patterns to match in the integer comparison test harnesses.
...
Fix bugs encountered, mostly due to range matching for immediates;
the CellSPU's 10-bit immediates are sign extended, covering a
larger range of unsigned values.
llvm-svn: 48575
2008-03-20 00:51:36 +00:00
Evan Cheng
c5f34f6463
80 col violation.
...
llvm-svn: 48573
2008-03-20 00:20:23 +00:00
Evan Cheng
6f729b2820
Add intrinsics to match mmx shift builtin's with immediate operand.
...
llvm-svn: 48569
2008-03-19 23:38:52 +00:00
Devang Patel
c9c6d88ee5
Add comment.
...
llvm-svn: 48567
2008-03-19 23:05:52 +00:00
Devang Patel
3af681c5fb
#if 1 .. #endif markers do not add any value.
...
llvm-svn: 48560
2008-03-19 22:24:25 +00:00
Evan Cheng
5ef962445a
Remove dead options.
...
llvm-svn: 48556
2008-03-19 22:02:26 +00:00
Devang Patel
5e8cbbea65
PassInfo keep tracks whether a pass is an analysis pass or not.
...
llvm-svn: 48554
2008-03-19 21:56:59 +00:00
Dan Gohman
c9dec33f3f
Add support for multiple return values for the PPC target by
...
converting call result lowering to use the CallingConvLowering
infastructure.
llvm-svn: 48552
2008-03-19 21:39:28 +00:00
Arnold Schwaighofer
19a78545d9
Don't loose incoming argument registers. Fix documentation style.
...
llvm-svn: 48545
2008-03-19 16:39:45 +00:00
Christopher Lamb
958b0494c3
Fix X86's isTruncateFree to not claim that truncate to i1 is free. This fixes Bill's testcase that failed for r48491.
...
llvm-svn: 48542
2008-03-19 08:30:06 +00:00
Chris Lattner
1642451cf7
add some convenience methods for creating GEP instructions and
...
struct types. Patch by David Chisnall, with some tweaks.
llvm-svn: 48531
2008-03-19 05:06:05 +00:00
Gordon Henriksen
e4b3339de8
C bindings for Module-, Function-, and BasicBlock::iterator.
...
llvm-svn: 48528
2008-03-19 03:47:18 +00:00
Evan Cheng
e9aa507edc
Fixed a coalescer bug caused by a typo.
...
llvm-svn: 48526
2008-03-19 02:26:36 +00:00
Gordon Henriksen
15006d5da0
C and Objective Caml bindings for the various getParent methods of the IR.
...
Based on Erick Tryzelaar's patch.
llvm-svn: 48523
2008-03-19 01:11:35 +00:00
Evan Cheng
3d9309c11d
Fix live variables issues:
...
1. If part of a register is re-defined, an implicit kill and an implicit def are added to denote read / mod / write. However, this should only be necessary if the register is actually read later. This is a performance issue.
2. If a sub-register is being defined, and it doesn't have a previous use, do not add a implicit kill to the last use of a super-register:
= EAX, AX<imp-use,kill>
...
AX =
In this case, EAX is live but AX is killed, this is wrong and will cause the coalescer to do bad things.
llvm-svn: 48521
2008-03-19 00:52:20 +00:00
Devang Patel
38f181fa8c
Do not use virtual function to identify an analysis pass.
...
llvm-svn: 48520
2008-03-19 00:48:41 +00:00
Bill Wendling
7ae70d6441
On Darwin, GCC issues a ".globl" for something that has a "visibility protected"
...
attribute instead of ".protected".
llvm-svn: 48516
2008-03-18 23:38:12 +00:00
Evan Cheng
5ac87b837e
Fix a x86-64 isel lowering bug that's been around forever. A x86-64 varargs function implicitly reads X86::AL, don't clobber it!
...
llvm-svn: 48515
2008-03-18 23:36:35 +00:00
Bill Wendling
5ea2aec3ac
Temporarily revert r48491. It's breaking test/CodeGen/X86/xorl.ll.
...
llvm-svn: 48510
2008-03-18 22:29:51 +00:00
Daniel Berlin
0f20fa71ba
Fix PR 2160 by making sure arguments to external functions get marked as pointing to anything
...
llvm-svn: 48509
2008-03-18 22:22:53 +00:00
Dale Johannesen
7f51ebc90c
Make conversions of i8/i16 to ppcf128 work.
...
llvm-svn: 48493
2008-03-18 17:28:38 +00:00
Scott Michel
889ee011f7
Dial down gcc's warnings: don't use 0UL when 0U suffices (and when the
...
variables and methods themselves only use unsigned.)
llvm-svn: 48492
2008-03-18 16:55:06 +00:00
Christopher Lamb
1d70509b55
Target independent DAG transform to use truncate for field extraction + sign extend on targets where this is profitable. Passes nightly on x86-64.
...
llvm-svn: 48491
2008-03-18 16:46:39 +00:00
Evan Cheng
5750c3cd1e
Rewrite code that propagate isDead information after a dead copy is coalesced. This remove some ugly spaghetti code and fixed a number of subtle bugs.
...
llvm-svn: 48490
2008-03-18 08:26:47 +00:00
Devang Patel
811ca3ddba
Identify Analysis pass.
...
Do not run analysis pass again if analysis info is still available.
This fixes PR1441.
llvm-svn: 48476
2008-03-18 00:39:19 +00:00
Devang Patel
7efcb7de6b
Update heuritics that estimates cost of call instructions.
...
llvm-svn: 48474
2008-03-17 23:41:20 +00:00
Dale Johannesen
861708b8bb
Make Complex long long/double/long double work
...
in ppc64 mode.
llvm-svn: 48459
2008-03-17 17:11:08 +00:00
Chris Lattner
c0ac2481af
Check in some #ifdef'd out code switching call argument
...
lowering over to SparcCallingConv.td. We can't make the switch
yet because we can't say to pass f64 registers in 2 x i32 registers
with the td file yet.
llvm-svn: 48449
2008-03-17 06:58:37 +00:00
Chris Lattner
98f1bf9d41
minor cleanups
...
llvm-svn: 48448
2008-03-17 06:57:02 +00:00
Evan Cheng
07643ce604
Unbreak JIT. Ignore TargetInstrInfo::IMPLICIT_DEF.
...
llvm-svn: 48447
2008-03-17 06:56:52 +00:00
Owen Anderson
5da16e856c
A first attempt at updating live intervals, with code lifted from
...
the coalescer. This doesn't really work, but gets us farther than
before.
llvm-svn: 48446
2008-03-17 06:08:26 +00:00
Chris Lattner
40ba51c972
remove dead code
...
llvm-svn: 48445
2008-03-17 06:04:10 +00:00
Chris Lattner
fa003f7a57
Switch sparc from using LowerCallTo to using LowerOperation(CALL) like
...
other targets. Use autogenerated calling conv to lower result of
calls.
llvm-svn: 48444
2008-03-17 06:01:07 +00:00
Chris Lattner
3098125c84
Start moving sparc to use SparcCallingConv.td, switching over
...
return lowering first. This fixes a bug where the top and bottom
of i64 values were returned in the wrong registers before.
llvm-svn: 48443
2008-03-17 05:41:48 +00:00
Chris Lattner
5cb886d4d6
split sparc lowering out into SparcISelLowering.{cpp|h} to follow
...
best practices.
llvm-svn: 48442
2008-03-17 03:21:36 +00:00
Chris Lattner
5aef54c950
refactor the LowerOperation code out to individual functions for
...
each lowering, which is 'best practice'.
llvm-svn: 48441
2008-03-17 02:52:07 +00:00
Dale Johannesen
ee1e5be870
Next round of PPC32 ABI changes. Allow for gcc
...
behavior where a callee thinks a param will be
present in memory, even though the ABI doc says
it doesn't have to be. Handle complex long long
and complex double (4 and 8 return regs).
llvm-svn: 48439
2008-03-17 02:13:43 +00:00
Chris Lattner
dc9bf8fda9
various rotate fun.
...
llvm-svn: 48438
2008-03-17 01:47:51 +00:00
Nate Begeman
f9691b8236
Add a couple missing SSE4 instructions
...
llvm-svn: 48430
2008-03-16 21:14:46 +00:00
Gordon Henriksen
04a60ddcd2
C and Objective Caml bindings for the TargetData class.
...
llvm-svn: 48422
2008-03-16 20:08:03 +00:00
Bill Wendling
301783caf7
Add assert for non-hexadecimal radixes.
...
llvm-svn: 48421
2008-03-16 20:05:52 +00:00
Gordon Henriksen
8c33afc50c
C and Objective Caml bindings for several scalar transforms.
...
Patch originally by Erick Tryzelaar, but has been modified somewhat.
llvm-svn: 48419
2008-03-16 16:32:40 +00:00
Gordon Henriksen
caeafc4911
C and Objective Caml bindings for PassManagers.
...
llvm-svn: 48413
2008-03-16 04:20:44 +00:00
Christopher Lamb
b4f4b41048
Make insert_subreg a two-address instruction, vastly simplifying LowerSubregs pass. Add a new TII, subreg_to_reg, which is like insert_subreg except that it takes an immediate implicit value to insert into rather than a register.
...
llvm-svn: 48412
2008-03-16 03:12:01 +00:00
Evan Cheng
9af68f56c5
Remove isImplicitDef TargetInstrDesc flag.
...
llvm-svn: 48381
2008-03-15 00:19:36 +00:00
Evan Cheng
11d2c09adc
Replace all target specific implicit def instructions with a target independent one: TargetInstrInfo::IMPLICIT_DEF.
...
llvm-svn: 48380
2008-03-15 00:03:38 +00:00
Gordon Henriksen
7ebaba8579
Expose Module::dump via C and Ocaml.
...
Patch by Erick Tryzelaar.
llvm-svn: 48379
2008-03-14 23:58:56 +00:00
Duncan Sands
3760c87373
Do not generate special entries in the dwarf eh
...
table for nounwind calls.
llvm-svn: 48373
2008-03-14 21:36:24 +00:00
Evan Cheng
3612a7ed30
Fix PR2138. Apparently any modification to a std::multimap (including remove entries for a different key) can invalidate multimap iterators.
...
llvm-svn: 48371
2008-03-14 20:44:01 +00:00
Chris Lattner
c4f8df4a84
this was removed from the Unix side.
...
llvm-svn: 48370
2008-03-14 20:41:50 +00:00
Dan Gohman
37a26f973f
Update comments; getPassName no longer uses RTTI.
...
llvm-svn: 48369
2008-03-14 18:27:04 +00:00
Dale Johannesen
6195ace4c0
Implement the real calling convention for ppc32 Altivec:
...
vectors go at the end of the memory area, after all
non-vector parameters.
llvm-svn: 48364
2008-03-14 17:41:26 +00:00
Evan Cheng
877c5ecabd
Fix some 80 col violations.
...
llvm-svn: 48361
2008-03-14 07:46:48 +00:00
Evan Cheng
fc6645a382
Fix a number of encoding bugs. SSE 4.1 instructions MPSADBWrri, PINSRDrr, etc. have 8-bits immediate field (ImmT == Imm8).
...
llvm-svn: 48360
2008-03-14 07:39:27 +00:00
Evan Cheng
6ef1ca4e87
Add debugging stuff.
...
llvm-svn: 48359
2008-03-14 07:13:42 +00:00
Chris Lattner
c60749aa4c
Add an issue that is preventing instcombine from doing a simplification.
...
llvm-svn: 48356
2008-03-14 06:00:19 +00:00
Duncan Sands
d3859c83a5
Simplify using getIntPtrConstant.
...
llvm-svn: 48355
2008-03-14 05:23:57 +00:00
Bill Wendling
7d054f8b3f
The inst combining of inttoptr into GEP with one index was using the bit size of
...
the type instead of the byte size. This was causing troublesome mis-compilations.
True to form, this took 2 days to find and is a one-line fix. :-P
llvm-svn: 48354
2008-03-14 05:12:19 +00:00
Nate Begeman
f06c08e652
Tabs -> spaces
...
Use getIntPtrConstant in a couple places to shorten stuff up
Handle splitting vector shuffles with undefs in the mask
llvm-svn: 48351
2008-03-14 00:53:31 +00:00
Evan Cheng
1ce3ba341d
Livein copy scheduling fixes: do not coalesce physical register copies, correctly determine the safe location to insert the copies.
...
llvm-svn: 48348
2008-03-14 00:14:55 +00:00
Dan Gohman
6a74c23363
Use SDTNone instead of duplicating it.
...
llvm-svn: 48346
2008-03-13 23:07:40 +00:00
Dan Gohman
486f664806
More APInt-ification.
...
llvm-svn: 48344
2008-03-13 22:13:53 +00:00
Owen Anderson
6c2454d9d1
Fix a bug in GVN that Duncan noticed, where we potentially need to insert a
...
pointer bitcast when performing return slot optimization.
llvm-svn: 48343
2008-03-13 22:07:10 +00:00
Evan Cheng
b479bf0d0c
Undo tweak. It had no obvious benefit.
...
llvm-svn: 48341
2008-03-13 17:42:48 +00:00
Devang Patel
2c38efe128
Remove unused GetAddressOfSymbol()
...
Thanks Daniel Dunbar!
llvm-svn: 48340
2008-03-13 16:55:34 +00:00
Evan Cheng
a7c38d1ce9
Typo.
...
llvm-svn: 48337
2008-03-13 08:04:35 +00:00
Evan Cheng
9a7395ba78
Don't try to sink 3-address instruction if convertToThreeAddress created more than one instructions.
...
llvm-svn: 48336
2008-03-13 07:56:58 +00:00
Evan Cheng
38a8da7b16
Remove an unused command line option.
...
llvm-svn: 48334
2008-03-13 06:38:28 +00:00
Evan Cheng
0b8b1647dd
TwoAddressInstructionPass enhancement. After it converts a two address instruction into a 3-address one, sink it past the instruction that kills the read-mod-write register if its definition is used past the kill. This reduces the number of live register by one.
...
llvm-svn: 48333
2008-03-13 06:37:55 +00:00
Christopher Lamb
0f1c32eb63
Get rid of a pseudo instruction and replace it with subreg based operation on real instructions, ridding the asm printers of the hack used to do this previously. In the process, update LowerSubregs to be careful about eliminating copies that have side affects.
...
Note: the coalescer will have to be careful about this too, when it starts coalescing insert_subreg nodes.
llvm-svn: 48329
2008-03-13 05:47:01 +00:00
Chris Lattner
bc18b99af2
Fix Path::GetMainExecutable on cygwin, patch by Sam Bishop.
...
llvm-svn: 48328
2008-03-13 05:22:05 +00:00
Chris Lattner
3220bb0859
remove extraneous namespace qualifier, PR2142
...
llvm-svn: 48327
2008-03-13 05:17:59 +00:00
Chris Lattner
a14cdebdd9
move a bunch of trivial methods to be inline.
...
llvm-svn: 48326
2008-03-13 05:00:21 +00:00
Chris Lattner
d4a9aafc3f
Various improvements suggested by Duncan
...
llvm-svn: 48325
2008-03-13 04:33:03 +00:00
Nick Lewycky
b827640141
Update -mem2reg to use succ_iterator instead of iterating across TerminatorInst
...
successors. This makes it support nounwind.
llvm-svn: 48320
2008-03-13 02:42:41 +00:00
Evan Cheng
6b57844f0c
Remove unused options.
...
llvm-svn: 48319
2008-03-13 02:41:34 +00:00
Dan Gohman
e84a9f3740
Eliminate a few unnecessary uses of dynamic_cast.
...
llvm-svn: 48318
2008-03-13 02:08:36 +00:00
Dan Gohman
548e24d9ae
Fix a typo.
...
llvm-svn: 48317
2008-03-13 01:58:48 +00:00
Dan Gohman
971fdb877c
Don't redundantly clear std::vector members in destructors.
...
llvm-svn: 48316
2008-03-13 01:57:34 +00:00
Dan Gohman
abf6c9aa1d
Change PMTopLevelManager's PassManagers vector element type from
...
Pass* to PMDataManager*. PMDataManager is more specific than Pass,
so this more accurately describes the objects that are being stored.
This eliminates the need for several dynamic_casts to PMDataManager*.
It does introduce one dynamic_cast though, in dumpPasses(). Give
this one a comment describing why a dynamic_cast is being used.
llvm-svn: 48315
2008-03-13 01:48:32 +00:00
Dan Gohman
70f4b55e3f
Change PMStack::push to accept a PMDataManager* instead of
...
a Pass*. PMDataManager* is what it actually holds, so this
makes it clearer.
llvm-svn: 48314
2008-03-13 01:21:31 +00:00
Evan Cheng
b9fc5d6d07
Refactor some code out of MachineSink into a MachineInstr query.
...
llvm-svn: 48311
2008-03-13 00:44:09 +00:00
Dale Johannesen
1e54f7c2b6
Do not promote float params to double in varargs
...
calls here. This was done earlier for params in
the varargs part of the params; any float params
that survive to here are in the non-varargs part,
and must not be promoted.
llvm-svn: 48310
2008-03-12 23:40:01 +00:00
Evan Cheng
620fd19798
Experimental scheduler change to schedule / coalesce the copies added for function livein's. Take 2008-03-10-RegAllocInfLoop.ll, the schedule looks like this after these copies are inserted:
...
entry: 0x12049d0, LLVM BB @0x1201fd0, ID#0:
Live Ins: %EAX %EDX %ECX
%reg1031<def> = MOVPC32r 0
%reg1032<def> = ADD32ri %reg1031, <es:_GLOBAL_OFFSET_TABLE_>, %EFLAGS<imp-def>
%reg1028<def> = MOV32rr %EAX
%reg1029<def> = MOV32rr %EDX
%reg1030<def> = MOV32rr %ECX
%reg1027<def> = MOV8rm %reg0, 1, %reg0, 0, Mem:LD(1,1) [0x1201910 + 0]
%reg1025<def> = MOV32rr %reg1029
%reg1026<def> = MOV32rr %reg1030
%reg1024<def> = MOV32rr %reg1028
The copies unnecessarily increase register pressure and it will end up requiring a physical register to be spilled.
With -schedule-livein-copies:
entry: 0x12049d0, LLVM BB @0x1201fa0, ID#0:
Live Ins: %EAX %EDX %ECX
%reg1031<def> = MOVPC32r 0
%reg1032<def> = ADD32ri %reg1031, <es:_GLOBAL_OFFSET_TABLE_>, %EFLAGS<imp-def>
%reg1024<def> = MOV32rr %EAX
%reg1025<def> = MOV32rr %EDX
%reg1026<def> = MOV32rr %ECX
%reg1027<def> = MOV8rm %reg0, 1, %reg0, 0, Mem:LD(1,1) [0x12018e0 + 0]
Much better!
llvm-svn: 48307
2008-03-12 22:19:41 +00:00
Duncan Sands
f830ed681b
Initial soft-float support for LegalizeTypes. I rewrote
...
the fcopysign expansion from LegalizeDAG to get rid of
what seems to be a bug: the use of sign extension means
that when copying the sign bit from an f32 to an f64,
the upper 32 bits of the f64 (now an i64) are set, not
just the top bit... I also generalized it to work for
any sized floating point types, and removed the bogosity:
SDOperand Mask1 = (SrcVT == MVT::f64)
? DAG.getConstantFP(BitsToDouble(1ULL << 63), SrcVT)
: DAG.getConstantFP(BitsToFloat(1U << 31), SrcVT);
Mask1 = DAG.getNode(ISD::BIT_CONVERT, SrcNVT, Mask1);
(here SrcNVT is an integer with the same size as SrcVT).
As far as I can see this takes a 1 << 63, converts to
a double, converts that to a floating point constant
then converts that to an integer constant, ending up
with... 1 << 63 as an integer constant! So I just
generate this integer constant directly.
llvm-svn: 48305
2008-03-12 21:27:04 +00:00
Dan Gohman
e40582180e
Change VirtRegMap's dump to dump to cerr, not DOUT, so that it
...
can be called from within a debuger without having -debug specified
on the command-line.
llvm-svn: 48298
2008-03-12 20:52:10 +00:00
Dan Gohman
4e4f2e2ba4
Fix typos in comments.
...
llvm-svn: 48297
2008-03-12 20:50:04 +00:00
Duncan Sands
f9de87eae8
Fix typo.
...
llvm-svn: 48295
2008-03-12 20:35:19 +00:00
Duncan Sands
05eb212b2d
Don't try to extract an i32 from an f64. This
...
getCopyToParts problem was noticed by the new
LegalizeTypes infrastructure. In order to avoid
this kind of thing in the future I've added a
check that EXTRACT_ELEMENT is only used with
integers. Once LegalizeTypes is up and running
most likely BUILD_PAIR and EXTRACT_ELEMENT can
be removed, in favour of using apints instead.
llvm-svn: 48294
2008-03-12 20:30:08 +00:00
Chris Lattner
7925cc72c0
Reimplement the parameter attributes support, phase #1 . hilights:
...
1. There is now a "PAListPtr" class, which is a smart pointer around
the underlying uniqued parameter attribute list object, and manages
its refcount. It is now impossible to mess up the refcount.
2. PAListPtr is now the main interface to the underlying object, and
the underlying object is now completely opaque.
3. Implementation details like SmallVector and FoldingSet are now no
longer part of the interface.
4. You can create a PAListPtr with an arbitrary sequence of
ParamAttrsWithIndex's, no need to make a SmallVector of a specific
size (you can just use an array or scalar or vector if you wish).
5. All the client code that had to check for a null pointer before
dereferencing the pointer is simplified to just access the
PAListPtr directly.
6. The interfaces for adding attrs to a list and removing them is a
bit simpler.
Phase #2 will rename some stuff (e.g. PAListPtr) and do other less
invasive changes.
llvm-svn: 48289
2008-03-12 17:45:29 +00:00
Owen Anderson
5887233a3f
Improve the return slot optimization to be both more aggressive (not limited to sret parameters), and
...
safer (when the passed pointer might be invalid). Thanks to Duncan and Chris for the idea behind this,
and extra thanks to Duncan for helping me work out the trap-safety.
llvm-svn: 48280
2008-03-12 07:37:44 +00:00
Evan Cheng
df92afe7d3
Clean up my own mess.
...
X86 lowering normalize vector 0 to v4i32. However DAGCombine can fold (sub x, x) -> 0 after legalization. It can create a zero vector of a type that's not expected (e.g. v8i16). We don't want to disable the optimization since leaving a (sub x, x) is really bad. Add isel patterns for other types of vector 0 to ensure correctness. It's highly unlikely to happen other than in bugpoint reduced test cases.
llvm-svn: 48279
2008-03-12 07:02:50 +00:00
Owen Anderson
df98435a16
We also need to collect the VN IDs for the PHI instructions for later updating.
...
llvm-svn: 48278
2008-03-12 04:22:57 +00:00
Owen Anderson
ecc3b561eb
When we're determining what registers to coallesce, track the VNInfo IDs for the definitions that
...
feed the PHI instructions. We'll need these IDs in order to update LiveIntervals properly.
llvm-svn: 48277
2008-03-12 03:13:29 +00:00
Chris Lattner
5563a38088
when the bitcode reader is referencing a paramattr, make sure to bump its refcount.
...
llvm-svn: 48276
2008-03-12 02:25:52 +00:00
Evan Cheng
ee092b2dfc
Total brain cramp.
...
llvm-svn: 48274
2008-03-12 02:05:05 +00:00
Chris Lattner
1eca74f70e
This is a simple fix for getting error messages from dlerror in
...
LoadLibraryPermanently. The current code modifies the value of a pointer
that is passed by value, so the caller never gets the message.
Patch by Julien Lerouge!
llvm-svn: 48270
2008-03-12 00:50:01 +00:00
Dale Johannesen
19b4c2dfaf
One more bit of Altivec parameter passing.
...
llvm-svn: 48269
2008-03-12 00:49:20 +00:00
Anton Korobeynikov
192ff9b2d3
Be backward compatible
...
llvm-svn: 48268
2008-03-12 00:49:19 +00:00
Devang Patel
0b10747ac8
Check multiple return values.
...
llvm-svn: 48267
2008-03-12 00:32:32 +00:00
Dale Johannesen
460dc31418
Implement Altivec passing to varargs functions on ppc.
...
llvm-svn: 48264
2008-03-12 00:22:17 +00:00
Evan Cheng
1812351f99
Set NextMII after issuing a physical register spill.
...
llvm-svn: 48263
2008-03-12 00:14:07 +00:00
Devang Patel
9e4d8236fc
Fix attribute handling.
...
llvm-svn: 48262
2008-03-12 00:07:03 +00:00
Evan Cheng
909992f970
Minor debug output bug.
...
llvm-svn: 48261
2008-03-12 00:02:46 +00:00
Anton Korobeynikov
a69bd8b0e6
Ultimately resolve aliases during linking, if possible
...
llvm-svn: 48259
2008-03-11 22:51:09 +00:00
Anton Korobeynikov
55f54ba252
Correctly propagate thread-local flag from aliasee to alias. This fixes PR2137
...
llvm-svn: 48257
2008-03-11 22:38:53 +00:00
Dan Gohman
8e3c88c4e9
Use PassManagerBase instead of FunctionPassManager for functions
...
that merely add passes. This allows them to be used with either
FunctionPassManager or PassManager, or even with a custom new
kind of pass manager.
llvm-svn: 48256
2008-03-11 22:29:46 +00:00
Anton Korobeynikov
38bc6e43f7
Add helper for ultimate aliasee resoltion
...
llvm-svn: 48255
2008-03-11 22:28:56 +00:00
Devang Patel
54b2c77a4e
Handle multiple ret values.
...
llvm-svn: 48254
2008-03-11 22:24:29 +00:00
Devang Patel
0fbeba7276
Initialize.
...
llvm-svn: 48253
2008-03-11 22:08:21 +00:00
Dan Gohman
34ea45f10d
Check to see if a two-entry PHI block can be simplified
...
before trying to merge the block into its predecessors.
This allows two-entry-phi-return.ll to be simplified
into a single basic block.
llvm-svn: 48252
2008-03-11 21:53:06 +00:00
Anton Korobeynikov
aa1433ab47
Honour aliases visibility during asm emission
...
llvm-svn: 48249
2008-03-11 21:41:14 +00:00
Anton Korobeynikov
9b16a36886
Honour aliases visibility when reading from/writing to bitcode
...
llvm-svn: 48248
2008-03-11 21:40:17 +00:00
Evan Cheng
665363494f
Transfer physical register spill info when load / store folding happens.
...
llvm-svn: 48246
2008-03-11 21:34:46 +00:00
Dan Gohman
1fece90de9
Use the correct value for InSignBit.
...
llvm-svn: 48245
2008-03-11 21:29:43 +00:00
Dan Gohman
55a443d612
Initial codegen support for functions and calls with multiple return values.
...
llvm-svn: 48244
2008-03-11 21:11:25 +00:00
Chris Lattner
fd2c24af72
Implement basic support for the 'f' register class constraint. This basically
...
works, but probably won't if you mix it with 't' or 'u' yet.
llvm-svn: 48243
2008-03-11 19:50:13 +00:00
Chris Lattner
4458eecb7a
coalesce away 80-bit floating point copies.
...
llvm-svn: 48241
2008-03-11 19:30:09 +00:00
Chris Lattner
aa2287714e
convert a massive if statement to a switch.
...
llvm-svn: 48240
2008-03-11 19:28:17 +00:00
Chris Lattner
b3fefb1e5c
start handling the 'f' x87 constraint.
...
llvm-svn: 48239
2008-03-11 19:06:29 +00:00
Devang Patel
0c7fb89803
Skip functions that return multiple values.
...
llvm-svn: 48233
2008-03-11 18:04:06 +00:00
Devang Patel
cb8f342ea8
Become multiple return value aware.
...
Right now, the pass does not optimize tail recursions
involving multiple return values.
llvm-svn: 48228
2008-03-11 17:33:32 +00:00
Devang Patel
e163bda565
Add TODO reminder.
...
llvm-svn: 48227
2008-03-11 17:32:05 +00:00
Dan Gohman
2b0112a65a
Give PassManager and FunctionPassManager a common base class, with
...
add(Pass *) as a pure virtual member function. This will allow all
the various addPassesTo* functions in LLVM to avoid hard-coding what
type of PassManager is used.
llvm-svn: 48226
2008-03-11 16:41:42 +00:00
Dan Gohman
54b152cbbf
Fix typos in comments.
...
llvm-svn: 48225
2008-03-11 16:18:48 +00:00
Christopher Lamb
4d5034cf91
Missed part of recommit.
...
llvm-svn: 48224
2008-03-11 10:27:36 +00:00
Christopher Lamb
74f4d837df
Recommitting parts of r48130. These do not appear to cause the observed failures.
...
llvm-svn: 48223
2008-03-11 10:09:17 +00:00
Evan Cheng
794f4ee703
Use TargetRegisterInfo::getPhysicalRegisterRegClass. Remove duplicated code.
...
llvm-svn: 48221
2008-03-11 07:55:13 +00:00
Evan Cheng
318a01e5fb
If there are multiple register classes that a register belongs to, return the super-class (e.g. on x86, returns GR32, not GR32_).
...
llvm-svn: 48220
2008-03-11 07:54:14 +00:00
Evan Cheng
af1c76846d
When the register allocator runs out of registers, spill a physical register around the def's and use's of the interval being allocated to make it possible for the interval to target a register and spill it right away and restore a register for uses. This likely generates terrible code but is before than aborting.
...
llvm-svn: 48218
2008-03-11 07:19:34 +00:00
Evan Cheng
53213ba056
In 32-bit mode, mark 64-bit GPR's as unallocatable.
...
llvm-svn: 48217
2008-03-11 07:16:00 +00:00
Duncan Sands
1b059ad5d5
Some LegalizeTypes code factorization and minor
...
enhancements.
llvm-svn: 48215
2008-03-11 06:41:14 +00:00
Chris Lattner
3241d0df37
compile: double test() {}
...
into:
_test:
fldz
ret
instead of:
_test:
subl $12, %esp
#IMPLICIT_DEF %xmm0
movsd %xmm0, (%esp)
fldl (%esp)
addl $12, %esp
ret
llvm-svn: 48213
2008-03-11 06:21:08 +00:00
Nick Lewycky
02e4d6f2dd
Fix the build on gcc 4.2.
...
llvm-svn: 48212
2008-03-11 05:56:09 +00:00
Devang Patel
6c189c16b5
Initial multiple return values support.
...
llvm-svn: 48210
2008-03-11 05:46:42 +00:00
Chris Lattner
9826c9365e
Change the model for FP Stack return to use fp operands on the
...
RET instruction instead of using FpSET_ST0_32. This also generalizes
the code to handling returning of multiple FP results.
llvm-svn: 48209
2008-03-11 03:23:40 +00:00
Chris Lattner
e58af59475
variadic instructions don't have operand info for variadic arguments.
...
llvm-svn: 48208
2008-03-11 03:14:42 +00:00
Dan Gohman
85bfbe2293
Generalize ExpandIntToFP to handle the case where the operand is legal
...
and it's the result that requires expansion. This code is a little confusing
because the TargetLoweringInfo tables for [US]INT_TO_FP use the operand type
(the integer type) rather than the result type.
llvm-svn: 48206
2008-03-11 01:59:03 +00:00
Chris Lattner
98af9eac5f
If a register operand comes from the variadic part of a node, don't
...
verify the register constraint matches what the instruction expects.
llvm-svn: 48205
2008-03-11 00:59:28 +00:00
Evan Cheng
77df19cb8c
Temporarily revert 48175.
...
llvm-svn: 48204
2008-03-11 00:27:34 +00:00
Anton Korobeynikov
da7746cf43
Fix thinko: alias always defines new symbol. Even is aliasee itself is undefined.
...
llvm-svn: 48203
2008-03-11 00:24:53 +00:00
Dan Gohman
1a65335a9b
More APInt-ification.
...
llvm-svn: 48201
2008-03-11 00:11:06 +00:00
Chris Lattner
d1a014af4e
abort with an assert instead of a cerr to get line#
...
llvm-svn: 48199
2008-03-10 23:56:08 +00:00
Dan Gohman
13e8dd3b34
Use utostr instead of a stringstream.
...
llvm-svn: 48198
2008-03-10 23:55:07 +00:00
Scott Michel
599ff689d0
- Style cleanup in IA64ISelLowering.h: add 'virtual' keyword for consistency.
...
- Add test pattern matching in CellSPU's icmp32.ll test harness
- Fix CellSPU fcmp.ll-generated assert.
llvm-svn: 48197
2008-03-10 23:49:09 +00:00
Dan Gohman
65bfbfb8dd
Correctly clone FlaggedNodes.
...
llvm-svn: 48196
2008-03-10 23:48:14 +00:00
Dan Gohman
0b00b3b786
Initialize ArgTypes directly instead of manually copying in the elements.
...
llvm-svn: 48195
2008-03-10 23:41:23 +00:00
Dan Gohman
7f8c939777
APInt-ify this.
...
llvm-svn: 48194
2008-03-10 23:38:17 +00:00
Dan Gohman
70ab77e185
Remove an unnecessary #include
...
llvm-svn: 48193
2008-03-10 23:37:12 +00:00
Chris Lattner
f0684bfd16
Don't emit FP_REG_KILL into a block that just returns. Nothing
...
can be live out of the block anyway, so it isn't needed.
llvm-svn: 48192
2008-03-10 23:34:12 +00:00
Dan Gohman
67aed9bbb0
Implement more support for fp-to-i128 and i128-to-fp conversions.
...
llvm-svn: 48189
2008-03-10 23:03:31 +00:00
Dale Johannesen
3278acdaaa
Disable prolog code that aligns the stack when a
...
local object of >16 byte alignment exists. It does not
work and getting it to work is not trivial, as explained
in the comment. This fixes all the remaining ppc32
failures in the struct-layout-1 part of the gcc testsuite.
(gcc does not support this either, and the only way to
get such an object is with __attribute__((aligned)) or
generic vectors; it can't be done in a standard-conforming
program, or with Altivec. So I think disabling it is OK.)
llvm-svn: 48188
2008-03-10 22:59:46 +00:00
Bill Wendling
80bc045af5
Change the "enable/disable" mechanism so that we can enable PPC register
...
scavenging for 32-bit and 64-bit separately.
llvm-svn: 48186
2008-03-10 22:49:16 +00:00
Anton Korobeynikov
6d98df2a25
Add sanity checks
...
llvm-svn: 48184
2008-03-10 22:36:53 +00:00
Anton Korobeynikov
ada9acedd4
Typo: 'function' => 'alias'
...
llvm-svn: 48183
2008-03-10 22:36:35 +00:00
Anton Korobeynikov
25b1121a28
Syntactic sugar'ify stuff :)
...
llvm-svn: 48182
2008-03-10 22:36:08 +00:00
Anton Korobeynikov
4a897017af
Always run 'make check' :) Fix fallout from prev. commit: query for possible
...
alias destination only if we don't have anything to link to
llvm-svn: 48181
2008-03-10 22:35:31 +00:00
Anton Korobeynikov
24360dead3
Make error messages to have common style
...
llvm-svn: 48180
2008-03-10 22:34:46 +00:00
Anton Korobeynikov
a17ceb586c
Properly link globals with aliases
...
llvm-svn: 48179
2008-03-10 22:34:28 +00:00
Anton Korobeynikov
d33dd5acd2
Remove the LinkGlobal weirderness in common linking phase.
...
llvm-svn: 48177
2008-03-10 22:33:53 +00:00
Anton Korobeynikov
7ce7d7173a
Typo
...
llvm-svn: 48176
2008-03-10 22:33:22 +00:00
Evan Cheng
863da1c28c
If the register allocator ran out of registers, just abort for now.
...
llvm-svn: 48175
2008-03-10 21:27:20 +00:00
Chris Lattner
d393772580
Eliminate the FP_GET_ST0/FP_SET_ST0 target-specific dag nodes, just lower to
...
copyfromreg/copytoreg instead.
llvm-svn: 48174
2008-03-10 21:08:41 +00:00
Dan Gohman
47137eba06
Fix mul expansion to check the correct number of bits for
...
zero extension when checking if an unsigned multiply is
safe.
llvm-svn: 48171
2008-03-10 20:42:19 +00:00
Evan Cheng
8b8d58e1aa
Somewhat better solution.
...
llvm-svn: 48170
2008-03-10 19:58:22 +00:00
Evan Cheng
7d9e5a7680
Default ISD::PREFETCH to expand.
...
llvm-svn: 48169
2008-03-10 19:38:10 +00:00
Evan Cheng
067ecbc341
Revert 48125, 48126, and 48130 for now to unbreak some x86-64 tests.
...
llvm-svn: 48167
2008-03-10 19:31:26 +00:00
Chris Lattner
52be2c645e
fix 80 col violations.
...
llvm-svn: 48166
2008-03-10 18:55:53 +00:00
Devang Patel
f749084aa3
Restore optimization that merges blocks when inline function
...
has single return value.
llvm-svn: 48162
2008-03-10 18:34:00 +00:00
Devang Patel
0df6cb288f
Simplify
...
llvm-svn: 48161
2008-03-10 18:22:16 +00:00
Devang Patel
f81f0781cb
simplify
...
llvm-svn: 48160
2008-03-10 18:11:41 +00:00
Nicolas Geoffray
a904844534
Stylistic modifications. No functionality changes.
...
llvm-svn: 48158
2008-03-10 17:46:45 +00:00
Scott Michel
38f8a1043a
Integer comparison tests for CellSPU.
...
llvm-svn: 48152
2008-03-10 16:58:52 +00:00
Duncan Sands
1a76dafb41
Fix formatting.
...
llvm-svn: 48151
2008-03-10 16:38:37 +00:00
Scott Michel
bb8e8fca47
Give TargetLowering::getSetCCResultType() a parameter so that ISD::SETCC's
...
return ValueType can depend its operands' ValueType.
This is a cosmetic change, no functionality impacted.
llvm-svn: 48145
2008-03-10 15:42:14 +00:00
Nicolas Geoffray
e3381f0f1f
Add description of individual bits in CR. This fix PR1765.
...
llvm-svn: 48143
2008-03-10 14:12:10 +00:00
Bill Wendling
91ff268a77
Minor cleanup. No functionality change.
...
llvm-svn: 48142
2008-03-10 08:13:01 +00:00
Evan Cheng
02b66c3a32
- Fix a subtle bug in RemoveCopyByCommutingDef. ALR is the live range where the source is defined; BLR is the live range which is defined by the copy.
...
If ALR and BLR overlaps and end of BLR extends beyond end of ALR, e.g.
A = or A, B
...
B = A
...
C = A<kill>
...
= B
then do not add kills of A to the newly created B interval.
- Also fix some kill info update bug.
llvm-svn: 48141
2008-03-10 08:11:32 +00:00
Evan Cheng
554d2c443b
Doh
...
llvm-svn: 48140
2008-03-10 07:59:01 +00:00
Owen Anderson
6b69a8671e
Move StrongPHIElimination after live interval analysis. This will make things happier down the road.
...
llvm-svn: 48138
2008-03-10 07:22:36 +00:00
Evan Cheng
3c0ddc999f
Avoid creating BUILD_VECTOR of all zero elements of "non-normalized" type (e.g. v8i16 on x86) after legalizer. Instruction selection does not expect to see them. In all likelihood this can only be an issue in a bugpoint reduced test case.
...
llvm-svn: 48136
2008-03-10 07:19:13 +00:00
Christopher Lamb
32e5ce3d96
Allow insert_subreg into implicit, target-specific values.
...
Change insert/extract subreg instructions to be able to be used in TableGen patterns.
Use the above features to reimplement an x86-64 pseudo instruction as a pattern.
llvm-svn: 48130
2008-03-10 06:12:08 +00:00
Nick Lewycky
fac0f67198
Update the .cvs files to match today's asm syntax change.
...
llvm-svn: 48128
2008-03-10 05:01:34 +00:00
Nick Lewycky
5dd879d5b5
Turn unwind_to into "unwinds to".
...
llvm-svn: 48123
2008-03-10 02:20:00 +00:00
Dale Johannesen
e6b0009792
Increase ISD::ParamFlags to 64 bits. Increase the ByValSize
...
field to 32 bits, thus enabling correct handling of ByVal
structs bigger than 0x1ffff. Abstract interface a bit.
Fixes gcc.c-torture/execute/pr23135.c and
gcc.c-torture/execute/pr28982b.c in gcc testsuite (were ICE'ing
on ppc32, quietly producing wrong code on x86-32.)
llvm-svn: 48122
2008-03-10 02:17:22 +00:00
Chris Lattner
4a5abdbe3f
Darwin PPC64 indirect call target goes in X12, not R12. This fixes these
...
two regression tests:
test/CodeGen/PowerPC/2007-10-21-LocalRegAllocAssert.ll
test/CodeGen/PowerPC/2007-10-21-LocalRegAllocAssert2.ll
llvm-svn: 48120
2008-03-09 20:49:33 +00:00
Chris Lattner
23ee644c71
cell really does support cross-regclass moves, because R3 is in lots of different regclasses, and the code is not consistent when it comes to value tracking.
...
llvm-svn: 48119
2008-03-09 20:31:11 +00:00
Chris Lattner
9185c43c7d
make sure ar.pfs is in a register class, this fixes test/CodeGen/IA64/ret-0.ll
...
llvm-svn: 48118
2008-03-09 20:12:44 +00:00
Chris Lattner
9d93efcfbd
remove an extraneous (and ugly) default argument, thanks Duncan.
...
llvm-svn: 48117
2008-03-09 20:04:36 +00:00
Ted Kremenek
b05e945be4
Fix some compilation errors on msvc:
...
- "Redefinition of I" (iterator masks previous definition)
- include missing header file
Patch by Argiris Kirtzidis!
llvm-svn: 48115
2008-03-09 18:32:50 +00:00
Nick Lewycky
efac6a28b4
And again.
...
llvm-svn: 48112
2008-03-09 17:13:05 +00:00
Nick Lewycky
dd4885aa80
Braces belong here. No functionality change.
...
llvm-svn: 48111
2008-03-09 17:11:18 +00:00
Nick Lewycky
8626cfb86d
SCCP also needs to be taught to follow unwind_to
...
llvm-svn: 48109
2008-03-09 09:44:38 +00:00
Chris Lattner
a85b0b591e
fp_round's produced by getCopyFromParts should always be exact, because
...
they are produced by calls (which are known exact) and by cross block copies
which are known to be produced by extends.
This improves:
define double @test2() {
%tmp85 = call double asm sideeffect "fld0", "={st(0)}"()
ret double %tmp85
}
from:
_test2:
subl $20, %esp
# InlineAsm Start
fld0
# InlineAsm End
fstpl 8(%esp)
movsd 8(%esp), %xmm0
movsd %xmm0, (%esp)
fldl (%esp)
addl $20, %esp
#FP_REG_KILL
ret
to:
_test2:
# InlineAsm Start
fld0
# InlineAsm End
#FP_REG_KILL
ret
by avoiding a f64 <-> f80 trip
llvm-svn: 48108
2008-03-09 09:38:46 +00:00
Chris Lattner
b6bfedbcfd
teach X86InstrInfo::copyRegToReg how to copy into ST(0) from
...
an RFP register class.
Teach ScheduleDAG how to handle CopyToReg with different src/dst
reg classes.
This allows us to compile trivial inline asms that expect stuff
on the top of x87-fp stack.
llvm-svn: 48107
2008-03-09 09:15:31 +00:00
Nick Lewycky
1d6b50743f
Don't eliminate blocks that are only reachable by unwind_to.
...
llvm-svn: 48106
2008-03-09 08:50:23 +00:00
Chris Lattner
8d0203478f
Add ScheduleDAG support for copytoreg where the src/dst register are
...
in different register classes, e.g. copy of ST(0) to RFP*. This gets
some really trivial inline asm working that plops things on the top of
stack (PR879)
llvm-svn: 48105
2008-03-09 08:49:15 +00:00
Chris Lattner
b29a963cf5
add some code to support cross-register class copying from
...
RST -> RFP{32/64/80}. We only handle ST(0) for now.
llvm-svn: 48104
2008-03-09 08:46:19 +00:00
Chris Lattner
53b86390b7
rearrange some code, no functionality change.
...
llvm-svn: 48101
2008-03-09 07:58:04 +00:00