Commit Graph

687 Commits

Author SHA1 Message Date
Evan Cheng
6782480bd1 Update test.
llvm-svn: 47527
2008-02-23 02:57:25 +00:00
Evan Cheng
4e9d5f1ead Remat of pic loads are now on by default.
llvm-svn: 47525
2008-02-23 02:08:30 +00:00
Evan Cheng
7c3a8d0056 Really. Why doesn't every arch support MMX?
llvm-svn: 47513
2008-02-23 00:56:14 +00:00
Evan Cheng
3b35d2a86c Test case for PR2082.
llvm-svn: 47501
2008-02-22 20:38:49 +00:00
Evan Cheng
1b417c4d84 Allow re-materialization of pic load (controlled by -remat-pic-load for now).
llvm-svn: 47476
2008-02-22 09:25:47 +00:00
Chris Lattner
a64d4179d4 copy mmx values from/to memory with GPRs on x86-32
instead of with mmx registers.  This horribleness is apparently
done by gcc to avoid having to insert emms in places that really 
should have it.  This is the second half of rdar://5741668.

llvm-svn: 47474
2008-02-22 05:18:04 +00:00
Chris Lattner
e70bc39d74 Start using GPR's to copy around mmx value instead of mmx regs.
GCC apparently does this, and code depends on not having to do
emms when this happens.  This is x86-64 only so far, second half
should handle x86-32.

rdar://5741668

llvm-svn: 47470
2008-02-22 02:09:43 +00:00
Chris Lattner
4f87f1c087 Treat clobber operands like early clobbers: if we have
any, we force sdisel to do all regalloc for an asm.  This
leads to gross but correct codegen.

This fixes the rest of PR2078.

llvm-svn: 47454
2008-02-21 19:43:13 +00:00
Tanya Lattner
8116db05a6 Remove llvm-upgrade and update tests.
llvm-svn: 47432
2008-02-21 07:42:26 +00:00
Chris Lattner
2f3bffc338 testcase for PR1133
llvm-svn: 47427
2008-02-21 05:27:08 +00:00
Chris Lattner
99b5a37d39 Fix a (harmless) but where vregs were added to the used reg lists for
inline asms.

Fix PR2078 by marking aliases of registers used when a register is 
marked used.  This prevents EAX from being allocated when AX is listed
in the clobber set for the asm.

llvm-svn: 47426
2008-02-21 04:55:52 +00:00
Evan Cheng
33ee06fa48 XFAIL this for now.
llvm-svn: 47355
2008-02-20 02:38:58 +00:00
Chris Lattner
aaafe47a55 this test requires sse2
llvm-svn: 47331
2008-02-19 18:07:46 +00:00
Chris Lattner
3a4ac3a69e Don't fold and's into test instructions if they have multiple uses.
This compiles test-nofold.ll into:

_test:
	movl	$15, %ecx
	andl	4(%esp), %ecx
	testl	%ecx, %ecx
	movl	$42, %eax
	cmove	%ecx, %eax
	ret

instead of:
_test:
	movl	4(%esp), %eax
	movl	%eax, %ecx
	andl	$15, %ecx
	testl	$15, %eax
	movl	$42, %eax
	cmove	%ecx, %eax
	ret

llvm-svn: 47330
2008-02-19 17:37:35 +00:00
Chris Lattner
67f2a6c009 rename tests to avoid a test- prefix when they aren't related to the test instruction.
llvm-svn: 47329
2008-02-19 17:33:52 +00:00
Tanya Lattner
230c714773 Remove llvm-upgrade and update tests.
llvm-svn: 47325
2008-02-19 08:07:33 +00:00
Nick Lewycky
69457748ab Don't spew stats to stderr.
llvm-svn: 47308
2008-02-19 03:11:47 +00:00
Nick Lewycky
0560401b2e Fix up the run line for this new test.
llc: for the -info-output-file option:  requires a value!

llvm-svn: 47306
2008-02-19 02:58:36 +00:00
Evan Cheng
de4579d0b3 New test.
llvm-svn: 47302
2008-02-19 02:09:58 +00:00
Tanya Lattner
aeb9bb8ba4 Remove llvm-upgrade and update tests.
llvm-svn: 47296
2008-02-19 01:41:04 +00:00
Evan Cheng
bb577266bf - When DAG combiner is folding a bit convert into a BUILD_VECTOR, it should check if it's essentially a SCALAR_TO_VECTOR. Avoid turning (v8i16) <10, u, u, u> to <10, 0, u, u, u, u, u, u>. Instead, simply convert it to a SCALAR_TO_VECTOR of the proper type.
- X86 now normalize SCALAR_TO_VECTOR to (BIT_CONVERT (v4i32 SCALAR_TO_VECTOR)). Get rid of X86ISD::S2VEC.

llvm-svn: 47290
2008-02-18 23:04:32 +00:00
Dan Gohman
70b9b2f77f Don't mark scalar integer multiplication as Expand on x86, since x86
has plain one-result scalar integer multiplication instructions.
This avoids expanding such instructions into MUL_LOHI sequences that
must be special-cased at isel time, and avoids the problem with that
code that provented memory operands from being folded.

This fixes PR1874, addressesing the most common case. The uncommon
cases of optimizing multiply-high operations will require work
in DAGCombiner.

llvm-svn: 47277
2008-02-18 17:55:26 +00:00
Tanya Lattner
03755061ae Remove llvm-upgrade.
llvm-svn: 47238
2008-02-17 20:02:20 +00:00
Andrew Lenharth
c178981b85 llvm.memory.barrier, and impl for x86 and alpha
llvm-svn: 47204
2008-02-16 01:24:58 +00:00
Evan Cheng
94742fb5d4 This test is not interesting.
llvm-svn: 47189
2008-02-15 23:06:21 +00:00
Chris Lattner
9c24f3ec37 Fix a miscompilation from Dan's recent apintification.
llvm-svn: 47128
2008-02-14 18:48:56 +00:00
Chris Lattner
d696c25db5 This readme entry is done, testcase here: CodeGen/X86/zero-remat.ll
llvm-svn: 47106
2008-02-14 05:39:46 +00:00
Evan Cheng
cbbcb3144d Fix test.
llvm-svn: 47102
2008-02-14 01:32:53 +00:00
Duncan Sands
2e9661573f Teach LegalizeTypes how to expand and promote CTLZ,
CTTZ and CTPOP.  The expansion code differs from
that in LegalizeDAG in that it chooses to take the
CTLZ/CTTZ count from the Hi/Lo part depending on
whether the Hi/Lo value is zero, not on whether
CTLZ/CTTZ of Hi/Lo returned 32 (or whatever the
width of the type is) for it.  I made this change
because the optimizers may well know that Hi/Lo
is zero and exploit it.  The promotion code for
CTTZ also differs from that in LegalizeDAG: it
uses an "or" to get the right result when the
original value is zero, rather than using a compare
and select.  This also means the value doesn't
need to be zero extended.

llvm-svn: 47075
2008-02-13 18:01:53 +00:00
Chris Lattner
a30946c576 In SDISel, for targets that support FORMAL_ARGUMENTS nodes, lower this
node as soon as we create it in SDISel.  Previously we would lower it in
legalize.  The problem with this is that it only exposes the argument
loads implied by FORMAL_ARGUMENTs after legalize, so that only dag combine 2
can hack on them.  This causes us to miss some optimizations because 
datatype expansion also happens here.

Exposing the loads early allows us to do optimizations on them.  For example
we now compile arg-cast.ll to:

_foo:
	movl	$2147483647, %eax
	andl	8(%esp), %eax
	ret

where we previously produced:

_foo:
	subl	$12, %esp
	movsd	16(%esp), %xmm0
	movsd	%xmm0, (%esp)
	movl	$2147483647, %eax
	andl	4(%esp), %eax
	addl	$12, %esp
	ret

It might also make sense to do this for ISD::CALL nodes, which have implicit
stores on many targets.

llvm-svn: 47054
2008-02-13 07:39:09 +00:00
Nate Begeman
cfd9883301 Add testcase for recent legalizer change
llvm-svn: 47049
2008-02-13 06:48:40 +00:00
Evan Cheng
68a88c1f52 New tests.
llvm-svn: 47047
2008-02-13 03:23:53 +00:00
Evan Cheng
0d2efb485d Don't mask the isel bug.
llvm-svn: 47018
2008-02-12 19:11:29 +00:00
Evan Cheng
6c7520f922 This test assumes no SSE4.1.
llvm-svn: 47017
2008-02-12 19:11:08 +00:00
Evan Cheng
1ab096a313 Fix some test cases.
llvm-svn: 46998
2008-02-12 07:22:46 +00:00
Evan Cheng
19f684ed72 Determine whether a spill kills the register it's spilling before insertion rather than trying to undo the kill marker afterwards.
llvm-svn: 46953
2008-02-11 08:30:52 +00:00
Dale Johannesen
304406f01c Alignment of struct containing vectors depends on
whether SSE is present, on Darwin anyway.  Make it
explicit.

llvm-svn: 46909
2008-02-09 19:04:25 +00:00
Evan Cheng
90f03a0b88 It's not always safe to fold movsd into xorpd, etc. Check the alignment of the load address first to make sure it's 16 byte aligned.
llvm-svn: 46893
2008-02-08 21:20:40 +00:00
Evan Cheng
b2bc19ee5b Added missing entries in X86 load / store folding tables.
llvm-svn: 46866
2008-02-08 00:12:56 +00:00
Evan Cheng
a377b2bbd1 Fix a x86-64 codegen deficiency. Allow gv + offset when using rip addressing mode.
Before:
_main:
        subq    $8, %rsp
        leaq    _X(%rip), %rax
        movsd   8(%rax), %xmm1
        movss   _X(%rip), %xmm0
        call    _t
        xorl    %ecx, %ecx
        movl    %ecx, %eax
        addq    $8, %rsp
        ret
Now:
_main:
        subq    $8, %rsp
        movsd   _X+8(%rip), %xmm1
        movss   _X(%rip), %xmm0
        call    _t
        xorl    %ecx, %ecx
        movl    %ecx, %eax
        addq    $8, %rsp
        ret

Notice there is another idiotic codegen issue that needs to be fixed asap:
xorl    %ecx, %ecx
movl    %ecx, %eax

llvm-svn: 46850
2008-02-07 08:53:49 +00:00
Evan Cheng
6b03a1aeb9 It's PR1925, not PR1609.
llvm-svn: 46825
2008-02-06 22:07:17 +00:00
Evan Cheng
2091d9a2e8 Fix a number of local register allocator issues: PR1609.
llvm-svn: 46821
2008-02-06 19:16:53 +00:00
Evan Cheng
851d353eb8 Fix PR1975: dag isel emitter produces patterns that isel wrong flag result.
llvm-svn: 46776
2008-02-05 22:50:29 +00:00
Evan Cheng
69d5e0fc0f If a vr is already marked alive in a bb, then it has PHI uses that are visited earlier, then it is not killed in the def block (i.e. not dead).
llvm-svn: 46763
2008-02-05 20:04:18 +00:00
Duncan Sands
b65b2462c8 Crashes LegalizeTypes with "Do not know how to
expand the result of this operator!" (node: ctlz).

llvm-svn: 46713
2008-02-04 18:07:02 +00:00
Duncan Sands
123f86e781 Crashes LegalizeTypes with "Do not know how to split
this operator's operand" (node: extract_subvector).

llvm-svn: 46712
2008-02-04 18:05:42 +00:00
Chris Lattner
cad0478491 remove target triple to make this test more "generic"
llvm-svn: 46711
2008-02-04 18:02:37 +00:00
Duncan Sands
36a938c4fb Crashed the new type legalizer. Not likely to catch
any bugs in the future since to get the crash you also
need hacked in fake libcall support (which creates odd
but legal trees), but since adding it doesn't hurt...
Thanks to Chris for this ultimately reduced version.

llvm-svn: 46706
2008-02-04 09:40:27 +00:00
Lauro Ramos Venancio
563e0a3ea3 CBackend: Implement unaligned load/store.
llvm-svn: 46646
2008-02-01 21:25:59 +00:00
Chris Lattner
35f063e37c Add target triples to these so they don't fail on linux.
llvm-svn: 46496
2008-01-29 06:26:07 +00:00