Evan Cheng
89f7ea0382
Another typo. Pointed out by Nate Begeman.
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llvm-svn: 28353
2006-05-17 18:22:14 +00:00
Evan Cheng
1d570d9be1
Fix an obvious bug in getPackedTypeBreakdown. Return 1 if type is legal.
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llvm-svn: 28351
2006-05-17 18:10:06 +00:00
Andrew Lenharth
bfb68e47ca
this should be 128 I think
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llvm-svn: 28330
2006-05-16 17:45:23 +00:00
Andrew Lenharth
14504c85ed
Move this code to a common place
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llvm-svn: 28329
2006-05-16 17:42:15 +00:00
Owen Anderson
29e4d70aed
Refactor a bunch of includes so that TargetMachine.h doesn't have to include
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TargetData.h. This should make recompiles a bit faster with my current
TargetData tinkering.
llvm-svn: 28238
2006-05-12 06:33:49 +00:00
Chris Lattner
6cac867da1
When tracking demanded bits, if any bits from the sext of an SRA are demanded,
...
then so is the input sign bit. This fixes mediabench/g721 on X86.
llvm-svn: 28166
2006-05-08 17:22:53 +00:00
Chris Lattner
5c9c9f0eb6
Use ComputeMaskedBits to determine # sign bits as a fallback. This allows us
...
to handle all kinds of stuff, including silly things like:
sextinreg(setcc,i16) -> setcc.
llvm-svn: 28155
2006-05-06 23:48:13 +00:00
Chris Lattner
8b8093dea2
Add some more sign propagation cases
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llvm-svn: 28154
2006-05-06 23:40:29 +00:00
Chris Lattner
1fce346023
Add some more simple sign bit propagation cases.
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llvm-svn: 28149
2006-05-06 22:39:59 +00:00
Chris Lattner
3a77411d76
Add some really really simple code for computing sign-bit propagation.
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This will certainly be enhanced in the future.
llvm-svn: 28145
2006-05-06 09:27:13 +00:00
Chris Lattner
fd1923bfa6
Fold (trunc (srl x, c)) -> (srl (trunc x), c)
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llvm-svn: 28138
2006-05-06 00:11:52 +00:00
Chris Lattner
2f0d27a72a
Implement ComputeMaskedBits/SimplifyDemandedBits for ISD::TRUNCATE
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llvm-svn: 28135
2006-05-05 22:32:12 +00:00
Owen Anderson
71bc529dfa
Refactor TargetMachine, pushing handling of TargetData into the target-specific subclasses. This has one caller-visible change: getTargetData() now returns a pointer instead of a reference.
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This fixes PR 759.
llvm-svn: 28074
2006-05-03 01:29:57 +00:00
Chris Lattner
0b4f7786d2
relax assertion
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llvm-svn: 27358
2006-04-02 06:19:46 +00:00
Chris Lattner
6433904644
Allow targets to compute masked bits for intrinsics.
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llvm-svn: 27357
2006-04-02 06:15:09 +00:00
Chris Lattner
00921c047c
Was returning the wrong type.
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llvm-svn: 27277
2006-03-31 01:50:09 +00:00
Chris Lattner
8e0dfe133c
Modify the TargetLowering::getPackedTypeBreakdown method to also return the
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unpromoted element type.
llvm-svn: 27273
2006-03-31 00:46:36 +00:00
Chris Lattner
7f48037ef1
Implement TargetLowering::getPackedTypeBreakdown
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llvm-svn: 27270
2006-03-31 00:28:56 +00:00
Evan Cheng
7528344998
Typo
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llvm-svn: 27008
2006-03-23 23:24:51 +00:00
Chris Lattner
eac8e98036
set TransformToType correctly for vector types.
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llvm-svn: 26797
2006-03-16 19:50:01 +00:00
Evan Cheng
ed013bd937
Add LSR hooks.
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llvm-svn: 26740
2006-03-13 23:18:16 +00:00
Chris Lattner
1782f3971d
I can't convince myself that this is safe, remove the recursive call.
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llvm-svn: 26725
2006-03-13 06:42:16 +00:00
Chris Lattner
f8cbc8c4ea
Do not fold (add (shl x, c1), (shl c2, c1)) -> (shl (add x, c2), c1),
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we want to canonicalize the other way.
llvm-svn: 26547
2006-03-05 19:52:57 +00:00
Evan Cheng
0c445855f2
Number of NodeTypes now exceeds 128.
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llvm-svn: 26503
2006-03-03 06:58:59 +00:00
Chris Lattner
40501a50fe
Add interfaces for targets to provide target-specific dag combiner optimizations.
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llvm-svn: 26442
2006-03-01 04:52:55 +00:00
Chris Lattner
799e9e2e64
Implement bit propagation through sub nodes, this (re)implements
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PowerPC/div-2.ll
llvm-svn: 26392
2006-02-27 01:00:42 +00:00
Chris Lattner
4a7d24d210
Check RHS simplification before LHS simplification to avoid infinitely looping
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on PowerPC/small-arguments.ll
llvm-svn: 26389
2006-02-27 00:36:27 +00:00
Chris Lattner
265c99ec1c
Just like we use the RHS of an AND to simplify the LHS, use the LHS to
...
simplify the RHS. This allows for the elimination of many thousands of
ands from multisource, and compiles CodeGen/PowerPC/and-elim.ll:test2
into this:
_test2:
srwi r2, r3, 1
xori r3, r2, 40961
blr
instead of this:
_test2:
rlwinm r2, r3, 31, 17, 31
xori r2, r2, 40961
rlwinm r3, r2, 0, 16, 31
blr
llvm-svn: 26388
2006-02-27 00:22:28 +00:00
Chris Lattner
8f6651a056
Add a bunch of missed cases. Perhaps the most significant of which is that
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assertzext produces zero bits.
llvm-svn: 26386
2006-02-26 23:36:02 +00:00
Chris Lattner
b5df999862
Recognize memory operand codes
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llvm-svn: 26345
2006-02-24 01:10:46 +00:00
Chris Lattner
db19979bea
Don't return registers from register classes that aren't legal.
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llvm-svn: 26317
2006-02-22 23:00:51 +00:00
Chris Lattner
6bb2c3e9cd
split register class handling from explicit physreg handling.
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llvm-svn: 26308
2006-02-22 00:56:39 +00:00
Chris Lattner
a124432746
Updates to match change of getRegForInlineAsmConstraint prototype
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llvm-svn: 26305
2006-02-21 23:11:00 +00:00
Nate Begeman
d89b8719f3
Add a fold for add that exchanges it with a constant shift if possible, so
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that the shift may be more easily folded into other operations.
llvm-svn: 26286
2006-02-18 02:43:25 +00:00
Jeff Cohen
04caf92624
Fix bug noticed by VC++.
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llvm-svn: 26252
2006-02-17 02:12:18 +00:00
Nate Begeman
0bc71999b9
Rework the SelectionDAG-based implementations of SimplifyDemandedBits
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and ComputeMaskedBits to match the new improved versions in instcombine.
Tested against all of multisource/benchmarks on ppc.
llvm-svn: 26238
2006-02-16 21:11:51 +00:00
Evan Cheng
f6c74c0096
Rename maxStoresPerMemSet to maxStoresPerMemset, etc.
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llvm-svn: 26174
2006-02-14 08:38:30 +00:00
Chris Lattner
785771db97
implementation of some methods for inlineasm
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llvm-svn: 25951
2006-02-04 02:13:02 +00:00
Nate Begeman
5a58572b9b
Implement some feedback from sabre
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llvm-svn: 25946
2006-02-03 22:38:07 +00:00
Nate Begeman
2d9838ec9b
Add a framework for eliminating instructions that produces undemanded bits.
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llvm-svn: 25945
2006-02-03 22:24:05 +00:00
Chris Lattner
c2ec404142
Implement MaskedValueIsZero for ANY_EXTEND nodes
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llvm-svn: 25900
2006-02-02 06:43:15 +00:00
Chris Lattner
fa15301572
Beef up the interface to inline asm constraint parsing, making it more general, useful, and easier to use.
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llvm-svn: 25866
2006-02-01 01:29:47 +00:00
Chris Lattner
a44182300b
Move MaskedValueIsZero from the DAGCombiner to the TargetLowering interface,making isMaskedValueZeroForTargetNode simpler, and useable from other partsof the compiler.
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llvm-svn: 25803
2006-01-30 04:09:27 +00:00
Chris Lattner
754bc1f46c
adjust prototype
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llvm-svn: 25798
2006-01-30 03:49:07 +00:00
Chris Lattner
81edad23a6
clean up interface to ValueTypeActions
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llvm-svn: 25783
2006-01-29 08:41:12 +00:00
Chris Lattner
800999ca4b
Implement a method for inline asm support
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llvm-svn: 25660
2006-01-26 20:37:03 +00:00
Chris Lattner
91a347233d
initialize an instance var, apparently I forgot to commit this long ago
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llvm-svn: 25609
2006-01-25 18:57:15 +00:00
Evan Cheng
7da6daadc7
Set SchedulingForLatency to be the default scheduling preference for all.
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llvm-svn: 25607
2006-01-25 18:52:42 +00:00
Evan Cheng
d33f8fde4a
Lefted out TargetLowering::
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llvm-svn: 24922
2005-12-21 23:14:54 +00:00
Evan Cheng
fb6413e05a
* Fix a GlobalAddress lowering bug.
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* Teach DAG combiner about X86ISD::SETCC by adding a TargetLowering hook.
llvm-svn: 24921
2005-12-21 23:05:39 +00:00