Commit Graph

95087 Commits

Author SHA1 Message Date
Hans Wennborg
6ea73f0a52 Remove llvm-lit from the cmake install target.
Since it's an llvm-internal tool, we shouldn't install it.

llvm-svn: 188976
2013-08-22 01:34:09 +00:00
Bill Wendling
df27f44bd7 FileCheck-ize tests.
llvm-svn: 188971
2013-08-22 00:51:19 +00:00
Jim Grosbach
d6ff6507fa ARM: R9 is not safe to use for tcGPR.
Indirect tail-calls shouldn't use R9 for the branch destination, as
it's not reliably a call-clobbered register.

rdar://14793425

llvm-svn: 188967
2013-08-22 00:14:24 +00:00
Michael Gottesman
50d821cd72 Fixed typo.
llvm-svn: 188957
2013-08-21 22:53:54 +00:00
Michael Gottesman
704d037910 Removed trailing whitespace.
llvm-svn: 188956
2013-08-21 22:53:29 +00:00
Tom Stellard
721e3acccd SelectionDAG: Make sure stores are always added to the LegalizedNodes list
When truncated vector stores were being custom lowered in
VectorLegalizer::LegalizeOp(), the old (illegal) and new (legal) node pair
was not being added to LegalizedNodes list.  Instead of the legalized
result being passed to VectorLegalizer::TranslateLegalizeResult(),
the result was being passed back into VectorLegalizer::LegalizeOp(),
which ended up adding a (new, new) pair to the list instead.

This was causing an assertion failure when a custom lowered truncated
vector store was the last instruction a basic block and the VectorLegalizer
was unable to find it in the LegalizedNodes list when updating the
DAG root.

llvm-svn: 188953
2013-08-21 22:42:58 +00:00
Daniel Dunbar
c44a910206 [lit] Fix a couple lingering Py3 compat issues in ProgressBar.
llvm-svn: 188951
2013-08-21 22:26:47 +00:00
Daniel Dunbar
4f51896690 [tests] Update fma3 check to work with Py3.
llvm-svn: 188950
2013-08-21 22:26:44 +00:00
Daniel Dunbar
e926420419 [lit] Lift XFAIL handling to core infrastructure.
llvm-svn: 188949
2013-08-21 22:26:42 +00:00
Daniel Dunbar
e8d0977bdf [lit] Allow formats to return lit.Test.Result instances directly.
llvm-svn: 188948
2013-08-21 22:26:40 +00:00
Daniel Dunbar
0e1aaf95f0 [lit] Factor out a separate Test.Result() object.
llvm-svn: 188947
2013-08-21 22:26:37 +00:00
Daniel Dunbar
926a1dd8eb [lit] Simplify --time-tests code.
llvm-svn: 188946
2013-08-21 22:26:34 +00:00
Daniel Dunbar
91157ca2ce [lit] Extract TestFormat base class, for future use.
llvm-svn: 188945
2013-08-21 22:26:26 +00:00
Manman Ren
1b7973fc19 TBAA: remove !tbaa from testing cases when they are not needed.
This will make it easier to turn on struct-path aware TBAA since the metadata
format will change.

llvm-svn: 188944
2013-08-21 22:20:53 +00:00
Andrew Kaylor
0a1de947a9 Adding a document to describe the MCJIT execution engine implementation.
llvm-svn: 188943
2013-08-21 22:15:09 +00:00
Tom Stellard
3c01617c66 R600: Remove unnecessary casts
Spotted by Bill Wendling.

llvm-svn: 188942
2013-08-21 22:14:17 +00:00
Yunzhong Gao
9a8c1892ea No functionality change.
Replace "(255 & value)" with "(0xFF & value)" to improve clarity.

llvm-svn: 188941
2013-08-21 22:11:15 +00:00
Juergen Ributzka
d12ce0859f Teach BaseIndexOffset::match to identify base pointers in loops.
The small utility function that pattern matches Base + Index +
Offset patterns for loads and stores fails to recognize the base
pointer for loads/stores from/into an array at offset 0 inside a
loop. As a result DAGCombiner::MergeConsecutiveStores was not able
to merge all stores.

This commit fixes the issue by adding an additional pattern match
and also a test case.

Reviewer: Nadav
llvm-svn: 188936
2013-08-21 21:53:38 +00:00
David Majnemer
609fa89993 ADT/Triple: Helper to determine if we are targeting the Windows CRT
Summary:
This support will be utilized in things like clang to help check printf
format specifiers that are only valid when using the VSCRT.

Reviewers: rnk, asl, chandlerc

Reviewed By: chandlerc

CC: llvm-commits

Differential Revision: http://llvm-reviews.chandlerc.com/D1455

llvm-svn: 188935
2013-08-21 21:53:33 +00:00
David Blaikie
29dad430cd Basic unit tests for PointerUnion
llvm-svn: 188933
2013-08-21 21:30:23 +00:00
Bill Wendling
0b02009429 Reorder headers according to lint.
llvm-svn: 188932
2013-08-21 21:14:19 +00:00
Bill Wendling
2cc7998837 Remove use of forbidden 'iostream' header.
Also obsessively reorder the headers to be in something closer to alphabetical order.

llvm-svn: 188928
2013-08-21 20:36:42 +00:00
Matt Arsenault
95d00423a7 Teach InstCombine about address spaces
llvm-svn: 188926
2013-08-21 19:53:10 +00:00
Ahmed Bougacha
3e1fe16ca3 MC CFG: Remap enough for data too, analoguous to r188873.
llvm-svn: 188925
2013-08-21 19:40:28 +00:00
Ahmed Bougacha
13f01b07c3 Style cleanup following David's review for r188876.
llvm-svn: 188924
2013-08-21 19:40:25 +00:00
Ahmed Bougacha
49ff5d404a Add testcase for r188873: MCTextAtom boundaries.
Check that they are correctly computed if the last instruction is
larger than 1 byte.

llvm-svn: 188923
2013-08-21 19:40:22 +00:00
Argyrios Kyrtzidis
3149b23fc7 [CMake] Automatically pick up subdirectories in llvm/tools as 'external projects' if they contain a 'CMakeLists.txt' file.
Allow CMake to pick up external projects in llvm/tools without the need to modify the "llvm/tools/CMakeLists.txt" file.
This makes it easier to work with projects that live in other repositories, without needing to specify each one in "llvm/tools/CMakeLists.txt".

llvm-svn: 188921
2013-08-21 19:13:44 +00:00
Matt Arsenault
298ce78bbf Add test for bitcast array ptrs with address spaces
llvm-svn: 188919
2013-08-21 19:09:28 +00:00
Matt Arsenault
fe2de01e6d Add enforce known alignment test with address space
llvm-svn: 188917
2013-08-21 18:54:53 +00:00
Matt Arsenault
3e8997425a Use attribute helper function
llvm-svn: 188916
2013-08-21 18:54:50 +00:00
Matt Arsenault
68d9c05b51 Fix typo
llvm-svn: 188915
2013-08-21 18:54:47 +00:00
Hao Liu
7962606ca8 A minor change for an obvous problem caused by r188451:
def imm0_63 : Operand<i32>, ImmLeaf<i32, [{ return Imm >= 0 && Imm < 63;}]>{
As it seems Imm <63 should be Imm <= 63. ImmLeaf is used in pattern match, but there is already a function check the shift amount range, so just remove ImmLeaf. Also add a test to check 63.

llvm-svn: 188911
2013-08-21 17:47:53 +00:00
Joey Gouly
ec3b9aa53e Add -mcpu to two X86 tests.
These tests are failing on Haswell CPUs due to different instruction selection.

llvm-svn: 188908
2013-08-21 17:14:31 +00:00
Ahmed Bougacha
f1b8b6c212 Add basic YAML MC CFG testcase.
Drive-by llvm-objdump cleanup (don't hardcode ToolName).

llvm-svn: 188904
2013-08-21 16:13:25 +00:00
NAKAMURA Takumi
043fdd33ad Unix/Process.inc: Revert r72332, "Work around a page size issue on Cygwin."
Offset in mmap(3) should be aligned to gepagesize(), 64k, or mmap(3) would fail.

TODO: Invetigate places where 4096 would be required as pagesize, or 4096 would satisfy.
llvm-svn: 188903
2013-08-21 13:47:12 +00:00
Mihai Popa
721d6a74eb Make "mov" work for all Thumb2 MOV encodings
According to the ARM specification, "mov" is a valid mnemonic for all Thumb2 MOV encodings.
To achieve this, the patch adds one instruction alias with a special range condition to avoid collision with the Thumb1 MOV.

llvm-svn: 188901
2013-08-21 13:14:58 +00:00
Elena Demikhovsky
44bbb2b413 AVX-512: Added SHIFT instructions.
llvm-svn: 188899
2013-08-21 09:36:02 +00:00
Richard Sandiford
1dc05c13d2 [SystemZ] Define remainig *MUL_LOHI patterns
The initial port used MLG(R) for i64 UMUL_LOHI but left the other three
combinations as not-legal-or-custom.  Although 32x32->{32,32}
multiplications exist, they're not as quick as doing a normal 64-bit
multiplication, so it didn't seem like i32 SMUL_LOHI and UMUL_LOHI
would be useful.  There's also no direct instruction for i64 SMUL_LOHI,
so it needs to be implemented in terms of UMUL_LOHI.

However, not defining these patterns means that we don't convert
division by a constant into multiplication, so this patch fills
in the other cases.  The new i64 SMUL_LOHI sequence is simpler
than the one that we used previously for 64x64->128 multiplication,
so int-mul-08.ll now tests the full sequence.

llvm-svn: 188898
2013-08-21 09:34:56 +00:00
NAKAMURA Takumi
082d762846 MCFunction.h: Prune \returns to fix a warning in r188881. [-Wdocumentation]
llvm-svn: 188897
2013-08-21 09:34:22 +00:00
Daniel Sanders
786fd8336c [mips][msa] Matheus Almeida pointed out a silly mistake in r188893. Fixed it.
I accidentally changed the encoding of the MSA registers to zero instead of 0
to 31. This change restores the encoding the registers had prior to r188893.

This didn't show up in the existing tests because direct-object emission isn't
implemented yet for MSA.

llvm-svn: 188896
2013-08-21 09:09:52 +00:00
Richard Sandiford
e6e07910e3 [SystemZ] Use FI[EDX]BRA for codegen
llvm-svn: 188895
2013-08-21 09:04:20 +00:00
Richard Sandiford
e3cc30d00b [SystemZ] Add FI[EDX]BRA
These are extensions of the existing FI[EDX]BR instructions, but use a spare
bit to suppress inexact conditions.

llvm-svn: 188894
2013-08-21 08:58:08 +00:00
Daniel Sanders
71482074c6 [mips][msa] Define registers using foreach
No functional change

llvm-svn: 188893
2013-08-21 08:48:25 +00:00
Ahmed Bougacha
b390121488 MC CFG: Add YAML MCModule representation to enable MC CFG testing.
Like yaml ObjectFiles, this will be very useful for testing the MC CFG
implementation (mostly MCObjectDisassembler), by matching the output
with YAML, and for potential users of the MC CFG, by using it as an input.

There isn't much to the actual format, it is just a serialization of the
MCModule class. Of note:
  - Basic block references (pred/succ, ..) are represented by the BB's
    start address.
  - Just as in the MC CFG, instructions are MCInsts with a size.
  - Operands have a prefix representing the type (only register and
    immediate supported here).
  - Instruction opcodes are represented by their names; enum values aren't
    stable, enum names mostly are: usually, a change to a name would need
    lots of changes in the backend anyway.
    Same with registers.

All in all, an example is better than 1000 words, here goes:

A simple binary:

  Disassembly of section __TEXT,__text:
  _main:
  100000f9c:      48 8b 46 08             movq    8(%rsi), %rax
  100000fa0:      0f be 00                movsbl  (%rax), %eax
  100000fa3:      3b 04 25 48 00 00 00    cmpl    72, %eax
  100000faa:      0f 8c 07 00 00 00       jl      7 <.Lend>
  100000fb0:      2b 04 25 48 00 00 00    subl    72, %eax
  .Lend:
  100000fb7:      c3                      ret

And the (pretty verbose) generated YAML:

  ---
  Atoms:
    - StartAddress:    0x0000000100000F9C
      Size:            20
      Type:            Text
      Content:
        - Inst:            MOV64rm
          Size:            4
          Ops:             [ RRAX, RRSI, I1, R, I8, R ]
        - Inst:            MOVSX32rm8
          Size:            3
          Ops:             [ REAX, RRAX, I1, R, I0, R ]
        - Inst:            CMP32rm
          Size:            7
          Ops:             [ REAX, R, I1, R, I72, R ]
        - Inst:            JL_4
          Size:            6
          Ops:             [ I7 ]
    - StartAddress:    0x0000000100000FB0
      Size:            7
      Type:            Text
      Content:
        - Inst:            SUB32rm
          Size:            7
          Ops:             [ REAX, REAX, R, I1, R, I72, R ]
    - StartAddress:    0x0000000100000FB7
      Size:            1
      Type:            Text
      Content:
        - Inst:            RET
          Size:            1
          Ops:             [  ]
  Functions:
    - Name:            __text
      BasicBlocks:
        - Address:         0x0000000100000F9C
          Preds:           [  ]
          Succs:           [ 0x0000000100000FB7, 0x0000000100000FB0 ]
     <snip>
  ...

llvm-svn: 188890
2013-08-21 07:29:02 +00:00
Ahmed Bougacha
e7af77be43 MC CFG: Support disassembly at arbitrary addresses in MCObjectDisassembler.
llvm-svn: 188889
2013-08-21 07:28:55 +00:00
Ahmed Bougacha
dccc8a27d2 MC CFG: Use data structures more appropriate than std::set.
llvm-svn: 188888
2013-08-21 07:28:51 +00:00
Ahmed Bougacha
470c6e4ac6 MC CFG: Add an MCObjectSymbolizer in the MCObjectDisassembler.
Used to detect calls to function symbol stubs (future commit).

llvm-svn: 188887
2013-08-21 07:28:48 +00:00
Ahmed Bougacha
99e0dc4e46 MC CFG: Add MCObjectDisassembler Mach-O implementation.
Supports:
- entrypoint, using LC_MAIN.
- static ctors/dtors, using __mod_{init,exit}_func
- translation between effective and object load address, using
  dyld's VM address slide.

llvm-svn: 188886
2013-08-21 07:28:44 +00:00
Ahmed Bougacha
e46711a23c Add Mach-O entry_point_command declaration.
llvm-svn: 188885
2013-08-21 07:28:40 +00:00
Ahmed Bougacha
fc3086d9d1 MC CFG: Add "dynamic disassembly" support to MCObjectDisassembler.
It can now disassemble code in situations where the effective load
address is different than the load address declared in the object file.
This happens for PIC, hence "dynamic".

llvm-svn: 188884
2013-08-21 07:28:37 +00:00