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210 Commits

Author SHA1 Message Date
Evan Cheng
702a8b4399 Fix a bug in spill weight computation. If the alias is a super-register, and the super-register is in the register class we are trying to allocate. Then add the weight to all sub-registers of the super-register even if they are not aliases. 
e.g. allocating for GR32, bh is not used, updating bl spill weight.                                                                                                        
     bl should get the same spill weight otherwise it will be choosen                                                                                              
     as a spill candidate since spilling bh doesn't make ebx available.
This fix PR2866.

llvm-svn: 67574
 2009-03-23 22:57:19 +00:00
Evan Cheng
7e4a6972d6 Fix PR3391 and PR3864. Reg allocator infinite looping. 
llvm-svn: 67544
 2009-03-23 18:24:37 +00:00
Owen Anderson
dd7e4f8c43 Convert VirtRegMap to a MachineFunctionPass. 
llvm-svn: 66870
 2009-03-13 05:55:11 +00:00
Owen Anderson
fb5980b6ab Reorganization: Move the Spiller out of VirtRegMap.cpp into its own files. No (intended) functionality change. 
llvm-svn: 66720
 2009-03-11 22:31:21 +00:00
Evan Cheng
b3c82db63d Change TargetInstrInfo::isMoveInstr to return source and destination sub-register indices as well. 
llvm-svn: 62600
 2009-01-20 19:12:24 +00:00
Evan Cheng
5ee5ba12be Make linear scan's trivial coalescer slightly more aggressive. 
llvm-svn: 62547
 2009-01-20 00:16:18 +00:00
Dan Gohman
8271066844 Tidy up #includes, deleting a bunch of unnecessary #includes. 
llvm-svn: 61715
 2009-01-05 17:59:02 +00:00
Evan Cheng
6125b9e097 - More pre-split fixes: spill slot live interval computation bug; restore point bug. 
- If a def is spilt, remember its spill index to allow its reuse.

llvm-svn: 58375
 2008-10-29 08:39:34 +00:00
Evan Cheng
cd21d433bb - Rewrite code that update register live interval that's split. 
- Create and update spill slot live intervals.
- Lots of bug fixes.

llvm-svn: 58367
 2008-10-29 05:06:14 +00:00
Evan Cheng
c906d4938e Committing a good chunk of the pre-register allocation live interval splitting pass. It's handling simple cases and appear to do good things. Next: avoid splitting an interval multiple times; renumber registers when possible; record stack slot live intervals for coloring; rematerialize defs when possible. 
llvm-svn: 58044
 2008-10-23 20:43:13 +00:00
Dan Gohman
9543edc4ef Fix command-line option printing to print two spaces where needed, 
instead of requiring all "short description" strings to begin with
two spaces. This makes these strings less mysterious, and it fixes
some cases where short description strings mistakenly did not
begin with two spaces.

llvm-svn: 57521
 2008-10-14 20:25:08 +00:00
Owen Anderson
c9a628af26 Add an option to enable StrongPHIElimination, for ease of testing. 
llvm-svn: 57259
 2008-10-07 20:22:28 +00:00
Evan Cheng
1c8ff02eeb Re-apply 56835 along with header file changes. 
llvm-svn: 56848
 2008-09-30 15:44:16 +00:00
Duncan Sands
a2c8482495 Revert commit 56835 since it breaks the build. 
"If a re-materializable instruction has a register
operand, the spiller will change the register operand's
spill weight to HUGE_VAL to avoid it being spilled.
However, if the operand is already in the queue ready
to be spilled, avoid re-materializing it".

llvm-svn: 56837
 2008-09-30 10:00:30 +00:00
Evan Cheng
4eee17f4fb If a re-materializable instruction has a register operand, the spiller will change the register operand's spill weight to HUGE_VAL to avoid it being spilled. However, if the operand is already in the queue ready to be spilled, avoid re-materializing it. 
llvm-svn: 56835
 2008-09-30 06:36:58 +00:00
Dale Johannesen
bc29bec7f8 Next round of earlyclobber handling. Approach the 
RA problem by expanding the live interval of an
earlyclobber def back one slot.  Remove
overlap-earlyclobber throughout.  Remove 
earlyclobber bits and their handling from
live internals.

llvm-svn: 56539
 2008-09-24 01:07:17 +00:00
Dale Johannesen
4a0054dc9a Teach coalescer about earlyclobber bits. 
Check bits for preferred register.

llvm-svn: 56384
 2008-09-20 02:03:04 +00:00
Evan Cheng
270178bdda Fix PR2808. When regalloc runs out of register, it spill a physical register around the live interval being allocated. Do not continue to try to spill another register, just grab the physical register and move on. 
llvm-svn: 56381
 2008-09-20 01:28:05 +00:00
Dale Johannesen
312df3aa6d Make earlyclobber stuff work when virtual regs 
have previously been assigned conflicting physreg.

llvm-svn: 56364
 2008-09-19 18:52:31 +00:00
Dale Johannesen
214ddc92d0 Remove AsmThatEarlyClobber etc. from LiveIntervalAnalysis 
and redo as linked list walk.  Logic moved into RA.
Per review feedback.

llvm-svn: 56326
 2008-09-19 01:02:35 +00:00
Evan Cheng
bcd694a1b4 Somehow RegAllocLinearScan is keeping two pointers to MachineRegisterInfo. 
llvm-svn: 56314
 2008-09-18 22:38:47 +00:00
Dale Johannesen
99091ed94f Add a bit to mark operands of asm's that conflict 
with an earlyclobber operand elsewhere.  Propagate
this bit and the earlyclobber bit through SDISel.
Change linear-scan RA not to allocate regs in a way 
that conflicts with an earlyclobber.  See also comments.

llvm-svn: 56290
 2008-09-17 21:13:11 +00:00
Evan Cheng
304fba81c9 Fix PR2757. Ignore liveinterval register allocation preference if the preference register is not in the right register class. This can happen due to sub-register coalescing. 
llvm-svn: 56006
 2008-09-09 20:22:01 +00:00
Dan Gohman
e1f9be27bc Tidy up several unbeseeming casts from pointer to intptr_t. 
llvm-svn: 55779
 2008-09-04 17:05:41 +00:00
Owen Anderson
426c49472d Convert several std::vectors over to SmallVector, and use reserve() as appropriate for cases where std::vector is still used. 
llvm-svn: 54820
 2008-08-15 18:49:41 +00:00
Owen Anderson
34aee11210 Get rid of a use of std::map. 
llvm-svn: 54770
 2008-08-13 23:36:23 +00:00
Owen Anderson
28f2e658f1 Make the allocation of LiveIntervals explicit, rather than holding them in the r2iMap_ by value. This will prevent references to them from being invalidated 
if the map is changed.

llvm-svn: 54763
 2008-08-13 21:49:13 +00:00
Owen Anderson
58d9213c3a Fix a compile-time regression introduced by my heuristic-changing patch. I forgot 
to multiply the instruction count by a constant factor in a few places, which
caused the register allocator to require many more iterations.

llvm-svn: 53959
 2008-07-23 19:47:27 +00:00
Owen Anderson
7b8947cc31 Change the heuristics used in the coalescer, register allocator, and within 
live intervals itself to use an instruction count approximation that is 
not affected by inserting empty indices.

llvm-svn: 53937
 2008-07-22 22:46:49 +00:00
Dan Gohman
0e992740a0 A brief survey of priority_queue usage in the tree turned this up 
as a questionable case, but the code isn't actually needed.

llvm-svn: 52657
 2008-06-23 23:51:16 +00:00
Evan Cheng
c1f551b43e Enhanced heuristic to determine the *best* register to spill. Instead of picking the register with the lowest spill weight. Consider (up to) 2 additional registers with spill weights that are close to the lowest spill weight. The one with fewest defs and uses that conflicts with the current interval (weighted by loop depth) is the spill candidate. 
This is not always a win, but there are much more wins than loses and wins tend to be more noticeable.

llvm-svn: 52554
 2008-06-20 21:45:16 +00:00
Evan Cheng
fe06a1fd5b Refine stack slot interval weight computation. 
llvm-svn: 52040
 2008-06-06 07:54:39 +00:00
Evan Cheng
2fc7954878 Add a stack slot coloring pass. Not yet enabled. 
llvm-svn: 51934
 2008-06-04 09:18:41 +00:00
Evan Cheng
27262ddcf3 Do not add empty live intervals to handled_. They should never be undone for backtracking. 
llvm-svn: 49544
 2008-04-11 17:55:47 +00:00
Evan Cheng
ff9c1655de Special handling of zero-sized live intervals. 
llvm-svn: 49167
 2008-04-03 16:40:27 +00:00
Evan Cheng
475368bc97 Add an assertion to catch register of illegal class. 
llvm-svn: 48751
 2008-03-24 23:28:21 +00:00
Evan Cheng
b479bf0d0c Undo tweak. It had no obvious benefit. 
llvm-svn: 48341
 2008-03-13 17:42:48 +00:00
Evan Cheng
af1c76846d When the register allocator runs out of registers, spill a physical register around the def's and use's of the interval being allocated to make it possible for the interval to target a register and spill it right away and restore a register for uses. This likely generates terrible code but is before than aborting. 
llvm-svn: 48218
 2008-03-11 07:19:34 +00:00
Evan Cheng
77df19cb8c Temporarily revert 48175. 
llvm-svn: 48204
 2008-03-11 00:27:34 +00:00
Evan Cheng
863da1c28c If the register allocator ran out of registers, just abort for now. 
llvm-svn: 48175
 2008-03-10 21:27:20 +00:00
Chris Lattner
6318b4aee9 Use a smallvector for inactiveCounts and initialize it lazily 
instead of init'ing it maximally to zeros on entry.  getFreePhysReg
is pretty hot and only a few elements are typically used.  This speeds
up linscan by 5% on 176.gcc.

llvm-svn: 47631
 2008-02-26 22:08:41 +00:00
Bill Wendling
8fb166bf6c Rename PrintableName to Name. 
llvm-svn: 47629
 2008-02-26 21:47:57 +00:00
Bill Wendling
50f5c4be14 Change "Name" to "AsmName" in the target register info. Gee, a refactoring tool 
would have been a Godsend here!

llvm-svn: 47625
 2008-02-26 21:11:01 +00:00
Anton Korobeynikov
c41f5b6af4 Fix newly-introduced 4.3 warnings 
llvm-svn: 47375
 2008-02-20 12:07:57 +00:00
Dan Gohman
cabaec582f Rename MRegisterInfo to TargetRegisterInfo. 
llvm-svn: 46930
 2008-02-10 18:45:23 +00:00
Bill Wendling
93556af6c4 Don't recalculate the loop info and loop dominators analyses if they're 
preserved.

llvm-svn: 45596
 2008-01-04 20:54:55 +00:00
Chris Lattner
96167aa93c Rename SSARegMap -> MachineRegisterInfo in keeping with the idea 
that "machine" classes are used to represent the current state of
the code being compiled.  Given this expanded name, we can start 
moving other stuff into it.  For now, move the UsedPhysRegs and
LiveIn/LoveOuts vectors from MachineFunction into it.

Update all the clients to match.

This also reduces some needless #includes, such as MachineModuleInfo
from MachineFunction.

llvm-svn: 45467
 2007-12-31 04:13:23 +00:00
Chris Lattner
ad9a6ccb83 Remove attribution from file headers, per discussion on llvmdev. 
llvm-svn: 45418
 2007-12-29 20:36:04 +00:00
Evan Cheng
45c08c8337 Switch over to MachineLoopInfo. 
llvm-svn: 44838
 2007-12-11 02:09:15 +00:00
Evan Cheng
5c96771102 Live interval splitting: 
When a live interval is being spilled, rather than creating short, non-spillable
intervals for every def / use, split the interval at BB boundaries. That is, for
every BB where the live interval is defined or used, create a new interval that
covers all the defs and uses in the BB.

This is designed to eliminate one common problem: multiple reloads of the same
value in a single basic block. Note, it does *not* decrease the number of spills
since no copies are inserted so the split intervals are *connected* through
spill and reloads (or rematerialization). The newly created intervals can be
spilled again, in that case, since it does not span multiple basic blocks, it's
spilled in the usual manner. However, it can reuse the same stack slot as the
previously split interval.

This is currently controlled by -split-intervals-at-bb.

llvm-svn: 44198
 2007-11-17 00:40:40 +00:00