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12568 Commits

Author SHA1 Message Date
Jakob Stoklund Olesen
e82ce92826 Move kill flags when the same register occurs more than once in a sequence. 
llvm-svn: 92058
 2009-12-23 21:34:03 +00:00
Jakob Stoklund Olesen
17a89f1f8a Handle undef operands properly. 
llvm-svn: 92054
 2009-12-23 21:28:42 +00:00
Jakob Stoklund Olesen
f18e89a0bf Make insert position available to MergeOpsUpdate. 
Rearrange arguments.
No functional changes

llvm-svn: 92053
 2009-12-23 21:28:37 +00:00
Jakob Stoklund Olesen
55c03c7cef Perform kill flag calculations in new method. No functional changes. 
llvm-svn: 92052
 2009-12-23 21:28:31 +00:00
Jakob Stoklund Olesen
423f1e70e6 Move repeated code to a new method. No functional change. 
llvm-svn: 92051
 2009-12-23 21:28:23 +00:00
Sanjiv Gupta
7872817f59 Reapply 91904. 
llvm-svn: 91996
 2009-12-23 11:19:09 +00:00
Sanjiv Gupta
1d6f359867 Added missing patterns for subtract instruction. 
llvm-svn: 91995
 2009-12-23 10:56:02 +00:00
Sanjiv Gupta
70e1523215 Reverting back 91904. 
llvm-svn: 91993
 2009-12-23 09:46:01 +00:00
Chris Lattner
f77ca5f9f5 really remove the instruction, don't just comment it out 
llvm-svn: 91976
 2009-12-23 01:46:40 +00:00
Chris Lattner
d7e8bd73fe completely eliminate the MOV16r0 'instruction'. The only 
interesting part of this is the divrem changes, which are
already tested by CodeGen/X86/divrem.ll.

llvm-svn: 91975
 2009-12-23 01:45:04 +00:00
Sean Callanan
0c1d56a0c8 More fixes for Visual C++. Replaced several very small 
static inline functions with macros.

llvm-svn: 91973
 2009-12-23 01:32:29 +00:00
Chris Lattner
dbcf2725aa stop pattern matching 16-bit zero's of a register to MOV16r0, 
instead use the appropriate subreggy thing.  This generates identical
code on some large apps (thanks to Evan's cross class coalescing
stuff he did back in july).  This means that MOV16r0 can go away
completely in the future soon.

llvm-svn: 91972
 2009-12-23 01:30:26 +00:00
Jakob Stoklund Olesen
9d1c8ecf05 Add a SPR register class to the ARM target. 
Certain Thumb instructions require only SP (e.g. tSTRspi).

llvm-svn: 91944
 2009-12-22 23:54:44 +00:00
Sean Callanan
3ccfaafab6 Removed the "inline" keyword from the disassembler decoder, 
because the Visual C++ build does not build .c files as C99

llvm-svn: 91935
 2009-12-22 22:51:40 +00:00
Sean Callanan
983f906451 Fixes to the X86 disassembler: 
Made LEA memory operands emit only 4 MCInst operands.
Made the scale operand equal 1 for instructions that have no
SIB byte.

llvm-svn: 91919
 2009-12-22 21:12:55 +00:00
Jakob Stoklund Olesen
affe25dbaf Use proper move instructions. Make the verifier happy. 
llvm-svn: 91914
 2009-12-22 18:49:55 +00:00
Evan Cheng
7cd6bfe549 Remove target attribute break-sse-dep. Instead, do not fold load into sse partial update instructions unless optimizing for size. 
llvm-svn: 91910
 2009-12-22 17:47:23 +00:00
Douglas Gregor
0590ad1884 Include based on the current path, since we already -I the X86 target's path. Fixes CMake build 
llvm-svn: 91908
 2009-12-22 17:25:11 +00:00
Sanjiv Gupta
9581b4dc62 While converting one of the operands to a memory operand, we need to check if it is Legal and does not result into a cyclic dep. 
llvm-svn: 91904
 2009-12-22 14:25:37 +00:00
Bill Wendling
fc4c238bd5 Add more plumbing. This time in the LowerArguments and "get" functions which 
return partial registers. This affected the back-end lowering code some.

Also patch up some places I missed before in the "get" functions.

llvm-svn: 91880
 2009-12-22 02:10:19 +00:00
Sean Callanan
09b2d80d2c Changed REG_* to MODRM_REG_* to avoid conflicts 
with symbols in AuroraUX's global namespace.

llvm-svn: 91879
 2009-12-22 02:07:42 +00:00
Daniel Dunbar
abb0af5166 Fix some may-be-uninitialized var warnings. 
llvm-svn: 91878
 2009-12-22 01:41:37 +00:00
Sean Callanan
feddcdf843 Fixed library dependencies between the X86 disassembler and 
X86 codegen that were causing circular symbol dependencies.

llvm-svn: 91871
 2009-12-22 01:11:26 +00:00
Chris Lattner
0651fc828b print pcrel immediates as signed values instead of unsigned so that we 
get things like this out of the disassembler:

0x100000ecb: callq	-96

instead of:

0x100000ecb: callq	4294967200

rdar://7491123

llvm-svn: 91864
 2009-12-22 00:44:05 +00:00
Anton Korobeynikov
89d281c7c3 Mark FPW as allocable when frame address is taken. 
llvm-svn: 91841
 2009-12-21 20:18:49 +00:00
Evan Cheng
c46a0ba3fc Delete the instruction just before the function terminates for consistency sake. 
llvm-svn: 91836
 2009-12-21 19:53:39 +00:00
Eric Christopher
5c812e2396 Fix setting and default setting of code model for jit. Do this 
by allowing backends to override routines that will default
the JIT and Static code generation to an appropriate code model
for the architecture.

Should fix PR 5773.

llvm-svn: 91824
 2009-12-21 08:15:29 +00:00
Eli Friedman
50c8e9154f A couple minor README updates. 
llvm-svn: 91823
 2009-12-21 08:03:16 +00:00
Daniel Dunbar
d170badffe Remove unused variable (noticed by clang++). 
llvm-svn: 91780
 2009-12-19 18:58:49 +00:00
Daniel Dunbar
758730a9e9 #if 0 out X86 disassembler for now, it is breaking the build in multiple places. 
llvm-svn: 91778
 2009-12-19 17:11:53 +00:00
Sanjiv Gupta
14c9f2ed42 Emit direction operand in binary insns that stores in memory. 
llvm-svn: 91777
 2009-12-19 13:52:01 +00:00
Nuno Lopes
78f040fa26 rename dprintf to dbgpritnf, in order to fix build with glibc (which already defines dprintf in stdio.h 
llvm-svn: 91775
 2009-12-19 12:07:00 +00:00
Sanjiv Gupta
65927cebf8 1. In indirect load/store insns , the name of fsr should be emitted as INDF. 
2. include standard asmbly headers in generated asmbly.

llvm-svn: 91768
 2009-12-19 08:26:25 +00:00
Douglas Gregor
f39dd74a3f Fix a bunch of little errors that Clang complains about when its being pedantic 
llvm-svn: 91764
 2009-12-19 07:05:23 +00:00
Daniel Dunbar
057ae7e82e Use memset instead of bzero, its more portable. 
llvm-svn: 91754
 2009-12-19 03:31:50 +00:00
Sean Callanan
18fa59f381 Table-driven disassembler for the X86 architecture (16-, 32-, and 64-bit 
incarnations), integrated into the MC framework.  

The disassembler is table-driven, using a custom TableGen backend to 
generate hierarchical tables optimized for fast decode.  The disassembler 
consumes MemoryObjects and produces arrays of MCInsts, adhering to the 
abstract base class MCDisassembler (llvm/MC/MCDisassembler.h).

The disassembler is documented in detail in

- lib/Target/X86/Disassembler/X86Disassembler.cpp (disassembler runtime)
- utils/TableGen/DisassemblerEmitter.cpp (table emitter)

You can test the disassembler by running llvm-mc -disassemble for i386
or x86_64 targets.  Please let me know if you encounter any problems
with it.

llvm-svn: 91749
 2009-12-19 02:59:52 +00:00
Anton Korobeynikov
4e05e61a52 Bump alignment requirements for windows targets to achieve compartibility with vcpp. 
Based on patch by Michael Beck!

llvm-svn: 91745
 2009-12-19 02:04:23 +00:00
Bill Wendling
aed33d79ab Changes from review: 
- Move DisableScheduling flag into TargetOption.h
- Move SDNodeOrdering into its own header file. Give it a minimal interface that
  doesn't conflate construction with storage.
- Move assigning the ordering into the SelectionDAGBuilder.

This isn't used yet, so there should be no functional changes.

llvm-svn: 91727
 2009-12-18 23:32:53 +00:00
Rafael Espindola
4f903d4548 Fix libstdc++ build on ARM linux and part of PR5770. 
MI was not being used but it was also not being deleted, so it was kept in the garbage list. The memory itself was freed once the function code gen was done.

Once in a while the codegen of another function would create an instruction on the same address. Adding it to the garbage group would work once, but when another pointer was added it would cause an assert as "Cache" was about to be pushed to Ts.

For a patch that make us detect problems like this earlier, take a look at

http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20091214/092758.html

With that patch we assert as soon and the new instruction is added to the garbage set.

llvm-svn: 91691
 2009-12-18 16:59:39 +00:00
Tilmann Scheller
69e00966bb Fix wrong frame pointer save offset in the 64-bit PowerPC SVR4 ABI. 
Patch contributed by Ken Werner of IBM!

llvm-svn: 91681
 2009-12-18 13:00:34 +00:00
Tilmann Scheller
29361c46ac Add support for calls through function pointers in the 64-bit PowerPC SVR4 ABI. 
Patch contributed by Ken Werner of IBM!

llvm-svn: 91680
 2009-12-18 13:00:15 +00:00
Evan Cheng
d97d025eba On recent Intel u-arch's, folding loads into some unary SSE instructions can 
be non-optimal. To be precise, we should avoid folding loads if the instructions
only update part of the destination register, and the non-updated part is not
needed. e.g. cvtss2sd, sqrtss. Unfolding the load from these instructions breaks
the partial register dependency and it can improve performance. e.g.

movss (%rdi), %xmm0
cvtss2sd %xmm0, %xmm0

instead of
cvtss2sd (%rdi), %xmm0

An alternative method to break dependency is to clear the register first. e.g.
xorps %xmm0, %xmm0
cvtss2sd (%rdi), %xmm0

llvm-svn: 91672
 2009-12-18 07:40:29 +00:00
Eric Christopher
0253008d0c Fix typo. 
llvm-svn: 91657
 2009-12-18 02:12:53 +00:00
Evan Cheng
a647318eb3 Re-apply 91623 now that I actually know what I was trying to do. 
llvm-svn: 91655
 2009-12-18 01:59:21 +00:00
Bob Wilson
a9f20f9f6e Handle ARM inline asm "w" constraints with 64-bit ("d") registers. 
The change in SelectionDAGBuilder is needed to allow using bitcasts to convert
between f64 (the default type for ARM "d" registers) and 64-bit Neon vector
types.  Radar 7457110.

llvm-svn: 91649
 2009-12-18 01:03:29 +00:00
John McCall
923cb2d8d7 Pass the error string directly to llvm_unreachable instead of the residual 
(0 && "error").  Rough consensus seems to be that g++ *should* be diagnosing
this because the pointer makes it not an ICE in c++03.  Everyone agrees that
the current standard is silly and null-pointer-ness should not be based on
ICE-ness.  Excellent fight scene in Act II, denouement weak, two stars.

llvm-svn: 91644
 2009-12-18 00:27:18 +00:00
Sean Callanan
06b6feb2e1 Instruction fixes, added instructions, and AsmString changes in the 
X86 instruction tables.

Also (while I was at it) cleaned up the X86 tables, removing tabs and
80-line violations.

This patch was reviewed by Chris Lattner, but please let me know if
there are any problems.

* X86*.td
	Removed tabs and fixed 80-line violations

* X86Instr64bit.td
	(IRET, POPCNT, BT_, LSL, SWPGS, PUSH_S, POP_S, L_S, SMSW)
		Added
	(CALL, CMOV) Added qualifiers
	(JMP) Added PC-relative jump instruction
	(POPFQ/PUSHFQ) Added qualifiers; renamed PUSHFQ to indicate
		that it is 64-bit only (ambiguous since it has no
		REX prefix)
	(MOV) Added rr form going the other way, which is encoded
		differently
	(MOV) Changed immediates to offsets, which is more correct;
		also fixed MOV64o64a to have to a 64-bit offset
	(MOV) Fixed qualifiers
	(MOV) Added debug-register and condition-register moves
	(MOVZX) Added more forms
	(ADC, SUB, SBB, AND, OR, XOR) Added reverse forms, which
		(as with MOV) are encoded differently
	(ROL) Made REX.W required
	(BT) Uncommented mr form for disassembly only
	(CVT__2__) Added several missing non-intrinsic forms
	(LXADD, XCHG) Reordered operands to make more sense for
		MRMSrcMem
	(XCHG) Added register-to-register forms
	(XADD, CMPXCHG, XCHG) Added non-locked forms
* X86InstrSSE.td
	(CVTSS2SI, COMISS, CVTTPS2DQ, CVTPS2PD, CVTPD2PS, MOVQ)
		Added
* X86InstrFPStack.td
	(COM_FST0, COMP_FST0, COM_FI, COM_FIP, FFREE, FNCLEX, FNOP,
	 FXAM, FLDL2T, FLDL2E, FLDPI, FLDLG2, FLDLN2, F2XM1, FYL2X,
	 FPTAN, FPATAN, FXTRACT, FPREM1, FDECSTP, FINCSTP, FPREM,
	 FYL2XP1, FSINCOS, FRNDINT, FSCALE, FCOMPP, FXSAVE,
	 FXRSTOR)
		Added
	(FCOM, FCOMP) Added qualifiers
	(FSTENV, FSAVE, FSTSW) Fixed opcode names
	(FNSTSW) Added implicit register operand
* X86InstrInfo.td
	(opaque512mem) Added for FXSAVE/FXRSTOR
	(offset8, offset16, offset32, offset64) Added for MOV
	(NOOPW, IRET, POPCNT, IN, BTC, BTR, BTS, LSL, INVLPG, STR,
	 LTR, PUSHFS, PUSHGS, POPFS, POPGS, LDS, LSS, LES, LFS,
	 LGS, VERR, VERW, SGDT, SIDT, SLDT, LGDT, LIDT, LLDT,
	 LODSD, OUTSB, OUTSW, OUTSD, HLT, RSM, FNINIT, CLC, STC,
	 CLI, STI, CLD, STD, CMC, CLTS, XLAT, WRMSR, RDMSR, RDPMC,
	 SMSW, LMSW, CPUID, INVD, WBINVD, INVEPT, INVVPID, VMCALL,
	 VMCLEAR, VMLAUNCH, VMRESUME, VMPTRLD, VMPTRST, VMREAD,
	 VMWRITE, VMXOFF, VMXON) Added
	(NOOPL, POPF, POPFD, PUSHF, PUSHFD) Added qualifier
	(JO, JNO, JB, JAE, JE, JNE, JBE, JA, JS, JNS, JP, JNP, JL,
	 JGE, JLE, JG, JCXZ) Added 32-bit forms
	(MOV) Changed some immediate forms to offset forms
	(MOV) Added reversed reg-reg forms, which are encoded
		differently
	(MOV) Added debug-register and condition-register moves
	(CMOV) Added qualifiers
	(AND, OR, XOR, ADC, SUB, SBB) Added reverse forms, like MOV
	(BT) Uncommented memory-register forms for disassembler
	(MOVSX, MOVZX) Added forms
	(XCHG, LXADD) Made operand order make sense for MRMSrcMem
	(XCHG) Added register-register forms
	(XADD, CMPXCHG) Added unlocked forms
* X86InstrMMX.td
	(MMX_MOVD, MMV_MOVQ) Added forms
* X86InstrInfo.cpp: Changed PUSHFQ to PUSHFQ64 to reflect table
	change

* X86RegisterInfo.td: Added debug and condition register sets
* x86-64-pic-3.ll: Fixed testcase to reflect call qualifier
* peep-test-3.ll: Fixed testcase to reflect test qualifier
* cmov.ll: Fixed testcase to reflect cmov qualifier
* loop-blocks.ll: Fixed testcase to reflect call qualifier
* x86-64-pic-11.ll: Fixed testcase to reflect call qualifier
* 2009-11-04-SubregCoalescingBug.ll: Fixed testcase to reflect call
  qualifier
* x86-64-pic-2.ll: Fixed testcase to reflect call qualifier
* live-out-reg-info.ll: Fixed testcase to reflect test qualifier
* tail-opts.ll: Fixed testcase to reflect call qualifiers
* x86-64-pic-10.ll: Fixed testcase to reflect call qualifier
* bss-pagealigned.ll: Fixed testcase to reflect call qualifier
* x86-64-pic-1.ll: Fixed testcase to reflect call qualifier
* widen_load-1.ll: Fixed testcase to reflect call qualifier

llvm-svn: 91638
 2009-12-18 00:01:26 +00:00
Jeffrey Yasskin
f39a138a7c Revert r91623 to unbreak the buildbots. 
llvm-svn: 91632
 2009-12-17 22:44:34 +00:00
Evan Cheng
d765952b17 Remove an unused option. 
llvm-svn: 91623
 2009-12-17 21:23:58 +00:00
Chris Lattner
b944c6eca5 finish cleaning up StructLayoutMap. 
llvm-svn: 91612
 2009-12-17 20:00:21 +00:00