Commit Graph

123005 Commits

Author SHA1 Message Date
Sanjay Patel
7530f47511 [x86] replace integer logic ops with packed SSE FP logic ops
If we have an operand to a bitwise logic op that's already in
an XMM register and the result is going to be sent to an XMM
register, then use an SSE logic op to avoid moves between the
integer and vector register files.

Related commits:
http://reviews.llvm.org/rL248395
http://reviews.llvm.org/rL248399
http://reviews.llvm.org/rL248404
http://reviews.llvm.org/rL248409
http://reviews.llvm.org/rL248415

This should solve PR22428:
https://llvm.org/bugs/show_bug.cgi?id=22428

llvm-svn: 251378
2015-10-27 01:28:07 +00:00
Sanjoy Das
4f9be9cf2c [SCEV] Refactor out ScalarEvolution::getDataLayout; NFC
llvm-svn: 251375
2015-10-27 00:52:09 +00:00
Steve King
b9e2588ce5 Fix llc crash processing S/UREM for -Oz builds caused by rL250825.
When taking the remainder of a value divided by a constant, visitREM()
attempts to convert the REM to a longer but faster sequence of instructions.
This conversion calls combine() on a speculative DIV instruction. Commit
rL250825 may cause this combine() to return a DIVREM, corrupting nearby nodes.
Flow eventually hits unreachable().

This patch adds a test case and a check to prevent visitREM() from trying
to convert the REM instruction in cases where a DIVREM is possible.
See http://reviews.llvm.org/D14035

llvm-svn: 251373
2015-10-27 00:14:06 +00:00
Sanjay Patel
b09bc57cbb add FP logic test cases to show current codegen (PR22428)
llvm-svn: 251370
2015-10-26 23:52:42 +00:00
Daniel Sanders
c89b196164 [mips][ias] Fold needsExpansion() and expandInstruction() together. NFC.
Summary:
Previously we maintained two separate switch statements that had to be kept in
sync. This patch merges them into a single switch.

Reviewers: vkalintiris

Subscribers: llvm-commits, dsanders

Differential Revision: http://reviews.llvm.org/D14012

llvm-svn: 251369
2015-10-26 23:50:00 +00:00
Tim Northover
10b8b233cf Switch ownership of miscellaneous ARM target to myself.
llvm-svn: 251367
2015-10-26 23:33:13 +00:00
Chandler Carruth
55792d42ae [x86] Make the vselect-minmax test 2x to 3x faster by deleting all the
instructions that aren't relevant for instruction selection of vector
min and max.

llvm-svn: 251366
2015-10-26 22:54:53 +00:00
Oleksiy Vyalov
84c1c738ee Use Twin instead of std::to_string.
http://reviews.llvm.org/D14095

llvm-svn: 251365
2015-10-26 22:37:36 +00:00
Ivan Krasin
7169afcbee Fix indents. It's a follow up to r251353.
llvm-svn: 251364
2015-10-26 22:35:40 +00:00
Alexey Samsonov
d9af01562d [LLVMSymbolize] Don't use LLVMSymbolizer::Options in ModuleInfo. NFC.
LLVMSymbolizer::Options is mostly used in LLVMSymbolizer class anyway.
Let's keep their usage restricted to that class, especially given that
it's worth to move ModuleInfo to a different header, independent from
the symbolizer class.

llvm-svn: 251363
2015-10-26 22:34:56 +00:00
Sanjay Patel
158d058285 reorganize logic; NFCI (retry r251349)
This is a preliminary step before adding another optimization
to PerformBITCASTCombine().

..and I really hope it's NFC this time!

llvm-svn: 251357
2015-10-26 21:54:14 +00:00
Ivan Krasin
01683c7544 Move imported entities into DwarfCompilationUnit to speed up LTO linking.
Summary:
In particular, this CL speeds up the official Chrome linking with LTO by
1.8x.

See more details in https://crbug.com/542426

Reviewers: dblaikie

Subscribers: jevinskie

Differential Revision: http://reviews.llvm.org/D13918

llvm-svn: 251353
2015-10-26 21:36:35 +00:00
Tim Northover
e8b9c50ed7 ARM: make sure VFP loads and stores are properly aligned.
Both VLDRS and VLDRD fault if the memory is not 4 byte aligned, which wasn't
really being checked before, leading to faults at runtime.

llvm-svn: 251352
2015-10-26 21:32:53 +00:00
Sanjay Patel
96136a0845 revert r251349; it included code for a functional change
llvm-svn: 251350
2015-10-26 21:28:02 +00:00
Sanjay Patel
e1ed7047d1 reorganize logic; NFCI
This is a preliminary step before adding another optimization
to PerformBITCASTCombine().

llvm-svn: 251349
2015-10-26 21:24:09 +00:00
Keno Fischer
d7327e9ccc Initialize BasicAAWrapperPass in it's constructor
Summary: This idiom is used elsewhere in LLVM, but was overlooked here.

Reviewers: chandlerc

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D13628

llvm-svn: 251348
2015-10-26 21:22:58 +00:00
Alexey Samsonov
67d22476f1 Fix build failure on GCC 4.7 (old libstdc++ doesn't have std::map::emplace).
llvm-svn: 251347
2015-10-26 21:20:37 +00:00
David Blaikie
96b6590595 Remove use of std::map<>::emplace which is not supported on some older versions of libstdc++
llvm-svn: 251346
2015-10-26 21:10:36 +00:00
Diego Novillo
4d3e41c2db Remove unused local variable. NFC.
llvm-svn: 251344
2015-10-26 20:50:26 +00:00
Peter Collingbourne
eed49614ff Fix tests.
llvm-svn: 251343
2015-10-26 20:49:49 +00:00
Peter Collingbourne
9e870daa98 ARM/ELF: Restore original (pre-r251322) logic for deciding whether to use GOT.
Unbreaks linking with gold, which cannot resolve direct relocations referring
to global symbols.

llvm-svn: 251342
2015-10-26 20:46:44 +00:00
Alexey Samsonov
0b7b424253 [LLVMSymbolize] Use symbol table only if function linkage name was requested.
Now it's enough to just specify -functions=short without additionally
providing -use-symbol-table=false.

llvm-svn: 251339
2015-10-26 20:12:29 +00:00
Alexey Samsonov
3aa3f12be4 Fix build error by fully qualifying llvm::make_unique.
llvm-svn: 251338
2015-10-26 20:12:27 +00:00
Rui Ueyama
e3ea91c6f5 Optimize StringTableBuilder.
This is a patch to improve StringTableBuilder's performance. That class'
finalize function is very hot particularly in LLD because the function
does tail-merge strings in string tables or SHF_MERGE sections.

Generic std::sort-style sorter is not efficient for sorting strings.
The function implemented in this patch seems to be more efficient.

Here's a benchmark of LLD to link Clang with or without this patch.
The numbers are medians of 50 runs.

-O0
real 0m0.455s
real 0m0.430s (5.5% faster)

-O3
real 0m0.487s
real 0m0.452s (7.2% faster)

Since that is a benchmark of the whole linker, the speedup of
StringTableBuilder itself is much more than that.

http://reviews.llvm.org/D14053

llvm-svn: 251337
2015-10-26 19:58:29 +00:00
Alexey Samsonov
fd8a0e49e0 [LLVMSymbolize] Use std::unique_ptr more extensively to clarify ownership.
llvm-svn: 251336
2015-10-26 19:41:23 +00:00
Igor Laevsky
b3b79f34cd [RS4GC] Strip noalias attribute after statepoint rewrite
We should remove noalias along with dereference and dereference_or_null attributes 
because statepoint could potentially touch the entire heap including noalias objects.

Differential Revision: http://reviews.llvm.org/D14032

llvm-svn: 251333
2015-10-26 19:06:01 +00:00
Diego Novillo
73fa815dcb SamplePGO - Add optimization reports.
This adds a couple of optimization remarks to the SamplePGO
transformation. When it decides to inline a hot function (to mimic the
inline stack and repeat useful inline decisions in the original build).

It will also report branch destinations. For instance, given the code
fragment:

     6      if (i < 1000)
     7        sum -= i;
     8      else
     9        sum += -i * rand();

If the 'else' branch is taken most of the time, building this code with
-Rpass=sample-profile will produce:

a.cc:9:14: remark: most popular destination for conditional branches at small.cc:6:9 [-Rpass=sample-profile]
      sum += -i * rand();
             ^

llvm-svn: 251330
2015-10-26 18:52:53 +00:00
David Blaikie
a667b6ee3c Remove assert(false) in favor of asserting the if conditional it is contained within.
Also adjust the code to avoid 3 redundant map lookups.

llvm-svn: 251327
2015-10-26 18:41:13 +00:00
David Blaikie
b9c3f7822b Move the canonical header to the top of its matching cpp file as per coding convention
This ensures that the header will be verified to be standalone (and
avoid mistakes like the one fixed in r251178)

llvm-svn: 251326
2015-10-26 18:40:56 +00:00
Mehdi Amini
5bbc793788 Add an (optional) identification block in the bitcode
Processing bitcode from a different LLVM version can lead to
unexpected behavior. The LLVM project guarantees autoupdating
bitcode from a previous minor revision for the same major, but
can't make any promise when reading bitcode generated from a
either a non-released LLVM, a vendor toolchain, or a "future"
LLVM release. This patch aims at being more user-friendly and
allows a bitcode produce to emit an optional block at the
beginning of the bitcode that will contains an opaque string
intended to describe the bitcode producer information. The
bitcode reader will dump this information alongside any error it
reports.

The optional block also includes an "epoch" number, monotonically
increasing when incompatible changes are made to the bitcode. The
reader will reject bitcode whose epoch is different from the one
expected.

Differential Revision: http://reviews.llvm.org/D13666

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 251325
2015-10-26 18:37:00 +00:00
Evgeniy Stepanov
6d86bc6f79 [safestack] Fast access to the unsafe stack pointer on AArch64/Android.
Android libc provides a fixed TLS slot for the unsafe stack pointer,
and this change implements direct access to that slot on AArch64 via
__builtin_thread_pointer() + offset.

This change also moves more code into TargetLowering and its
target-specific subclasses to get rid of target-specific codegen
in SafeStackPass.

This change does not touch the ARM backend because ARM lowers
builting_thread_pointer as aeabi_read_tp, which is not available
on Android.

The previous iteration of this change was reverted in r250461. This
version leaves the generic, compiler-rt based implementation in
SafeStack.cpp instead of moving it to TargetLoweringBase in order to
allow testing without a TargetMachine.

llvm-svn: 251324
2015-10-26 18:28:25 +00:00
Peter Collingbourne
75cdce8654 BitstreamWriter: Fix integer overflow.
We were previously overflowing a 32-bit multiply operation when emitting large
(>512MB) bitcode files, resulting in corrupted bitcode. Fix by extending
one of the operands to 64 bits.

There are a few other 32-bit integer types in this code that seem like they
also ought to be extended to 64 bits; this will be done separately.

llvm-svn: 251323
2015-10-26 18:23:21 +00:00
Peter Collingbourne
b5914c76cc ARM/ELF: Better codegen for global variable addresses.
In PIC mode we were previously computing global variable addresses (or GOT
entry addresses) by adding the PC, the PC-relative GOT displacement and
the GOT-relative symbol/GOT entry displacement. Because the latter two
displacements are fixed, we ended up performing one more addition than
necessary.

This change causes us to compute addresses using a single PC-relative
displacement, resulting in a shorter code sequence. This reduces code size
by about 4% in a recent build of Chromium for Android.

As a result of this change we no longer need to compute the GOT base address
in the ARM backend, which allows us to remove the Global Base Reg pass and
SDAG lowering for the GOT.

We also now no longer use the GOT when addressing a symbol which is known
to be defined in the same linkage unit. Specifically, the symbol must have
either hidden visibility or a strong definition in the current module in
order to not use the the GOT.

This is a change from the previous behaviour where we would use the GOT to
address externally visible symbols defined in the same module. I think the
only cases where this could matter are cases involving symbol interposition,
but we don't really support that well anyway.

Differential Revision: http://reviews.llvm.org/D13650

llvm-svn: 251322
2015-10-26 18:23:16 +00:00
Diego Novillo
7c45627db9 Cleanup test case debug info. NFC.
llvm-svn: 251320
2015-10-26 18:14:44 +00:00
Alexey Samsonov
6ad184e6af Refactor: Simplify boolean conditional return statements in lib/Transforms/Instrumentation
Summary: Use clang-tidy to simplify boolean conditional return statements.

Differential Revision: http://reviews.llvm.org/D9996

Patch by Richard (legalize@xmission.com)!

llvm-svn: 251318
2015-10-26 18:06:40 +00:00
Cong Hou
e87ad778e1 Check the case that the numerator and denominator are both zeros when getting edge probabilities in BPI and return 100% in this case.
This issue is triggered in PGO mode when bootstrapping LLVM. It seems that it is not guaranteed that edge weights are always greater than zero which are read from profile data.

llvm-svn: 251317
2015-10-26 18:00:17 +00:00
Alexey Samsonov
e8d7a2ffd9 Move parts of llvm-symbolizer tool into LLVMSymbolize library.
Summary: See http://lists.llvm.org/pipermail/llvm-dev/2015-October/091624.html

Reviewers: echristo

Subscribers: llvm-commits, aizatsky

Differential Revision: http://reviews.llvm.org/D13998

llvm-svn: 251316
2015-10-26 17:56:12 +00:00
Jonas Paulsson
38d806f873 [SystemZ] LTGFR use regclass should be GR32, not GR64.
Discovered by testing int-cmp-44.ll with -verify-machineinstrs (added to
test run).

llvm-svn: 251299
2015-10-26 15:03:49 +00:00
Jonas Paulsson
5395a3ead2 [SystemZ] Also clear kill flag for index reg in splitMove().
Discovered by running fp-move-05.ll with -verify-machineinstrs (added
to test case run).

llvm-svn: 251298
2015-10-26 15:03:41 +00:00
Jonas Paulsson
16285ec728 [SystemZ] Don't forget the CC def op on LTEBRCompare pseudos
Discovered by running fp-cmp-02.ll with -verify-machineinstrs (now added
to test run).

llvm-svn: 251297
2015-10-26 15:03:32 +00:00
Jonas Paulsson
655a8ff4b6 [SystemZ] Tie operands in SystemZShorteInst if MI becomes 2-address.
Discovered by testing fp-add-02.ll with -verify-machineinstrs.

Test case updated to always run with -verify-machineinstrs.

llvm-svn: 251296
2015-10-26 15:03:07 +00:00
Vasileios Kalintiris
6fab073b1a [mips] Check for the correct error message in tests for interrupt attributes.
Instead of XFAIL-ing the tests with the wrong usage of the "interrupt"
attribute, we should check that we emit the correct error messages to
the user.

llvm-svn: 251295
2015-10-26 14:24:30 +00:00
James Molloy
8d9daddc1b [ValueTracking] Extend r251146 to catch a fairly common case
Even though we may not know the value of the shifter operand, it's possible we know the shifter operand is non-zero. This can allow us to infer more known bits - for example:

  %1 = load %p !range {1, 5}
  %2 = shl %q, %1

We don't know %1, but we do know that it is nonzero so %2[0] is known zero, and importantly %2 is known non-zero.

Calling isKnownNonZero is nontrivially expensive so use an Optional to run it lazily and cache its result.

llvm-svn: 251294
2015-10-26 14:10:46 +00:00
Silviu Baranga
6912e3b382 [SCEV] Fix issues found during the review of r251283. NFC.
Summary:
Replace (const SCEVAddRecExpr *) with cast<SCEVAddRecExpr>.

Rename SCEVApplyRewriter to SCEVLoopAddRecRewriter (which is a more
appropriate name) since the description is "takes a scalar evolution
expression and applies the Map (Loop -> SCEV) to all AddRecExprs."

Subscribers: llvm-commits, sanjoy

Differential Revision: http://reviews.llvm.org/D14065

llvm-svn: 251292
2015-10-26 13:50:06 +00:00
Elena Demikhovsky
5e7ce7f64e Loop Vectorizer - skipping "bitcast" before GEP
Vectorization of memory instruction (Load/Store) is possible when the pointer is coming from GEP. The GEP analysis allows to estimate the profit.
In some cases we have a "bitcast" between GEP and memory instruction.
I added code that skips the "bitcast".

http://reviews.llvm.org/D13886

llvm-svn: 251291
2015-10-26 13:42:41 +00:00
Tim Northover
2b47a04ccd Tests: be slightly more specific to avoid conflict with path.
llvm-svn: 251290
2015-10-26 13:40:03 +00:00
Igor Breger
0ec388e259 fix test errors (on windows) for commit r251287
llvm-svn: 251288
2015-10-26 13:31:41 +00:00
Igor Breger
0803d66832 AVX512: Enabled VPBROADCASTB lowering for v64i8 vectors.
Differential Revision: http://reviews.llvm.org/D13896

llvm-svn: 251287
2015-10-26 13:01:02 +00:00
Vasileios Kalintiris
4ad8f46d36 [mips] Interrupt attribute support for mips32r2+.
Summary:
This patch adds support for using the "interrupt" attribute on Mips
for interrupt handling functions. At this time only mips32r2+ with the
o32 ABI with the static relocation model is supported. Unsupported
configurations will be rejected

Patch by Simon Dardis (+ clang-format & some trivial changes to follow the
LLVM coding standards by me).

Reviewers: mpf, dsanders

Subscribers: dsanders, vkalintiris, llvm-commits

Differential Revision: http://reviews.llvm.org/D10768

llvm-svn: 251286
2015-10-26 12:38:43 +00:00
Igor Breger
1ab3a1be2f AVX-512: Use correct extract vector length.
Bug https://llvm.org/bugs/show_bug.cgi?id=25318

Differential Revision: http://reviews.llvm.org/D14062

llvm-svn: 251285
2015-10-26 12:26:34 +00:00