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59376 Commits

Author SHA1 Message Date
Kristof Beyls
d33917748d Make ARMAsmParser accept the correct alignment specifier syntax in instructions. 
The parser will now accept instructions with alignment specifiers written like
    vld1.8  {d16}, [r0:64]
, while also still accepting the incorrect syntax
    vld1.8  {d16}, [r0, :64]

llvm-svn: 175164
 2013-02-14 14:46:12 +00:00
Evgeniy Stepanov
34a8be73a2 Workaround an MSan false positive. 
llvm-svn: 175156
 2013-02-14 12:18:32 +00:00
Owen Anderson
ea205e4669 Add some legality checks for SETCC before introducing it in the DAG combiner post-operand legalization. 
llvm-svn: 175149
 2013-02-14 09:07:33 +00:00
Elena Demikhovsky
3a155506e7 Fixed a bug in X86TargetLowering::LowerVectorIntExtend() (assertion failure). 
Added a test.

llvm-svn: 175144
 2013-02-14 08:20:26 +00:00
Michel Danzer
746ff11dfb R600/SI: Check for empty stack in SIAnnotateControlFlow::isTopOfStack 
Fixes assertion failure in newly added lit test. Might just be a bandaid that
needs to be revisited.

llvm-svn: 175139
 2013-02-14 08:00:33 +00:00
Rafael Espindola
11ec830693 Revert r175120 and r175121. Clang is producing the expected asm names again. 
llvm-svn: 175133
 2013-02-14 03:33:34 +00:00
Cameron Zwarich
a375023c9c RegisterCoalescer::reMaterializeTrivialDef() can constrain the destination 
register class to match the defining instruction.

llvm-svn: 175130
 2013-02-14 03:25:24 +00:00
Nick Lewycky
b1b829cd65 Teach the DataLayout aware constant folder to be much more aggressive towards 
'and' instructions. This is a pattern that shows up a lot in ubsan binaries.

llvm-svn: 175128
 2013-02-14 03:23:37 +00:00
Reed Kotler
7545d4833e Remove the form field from Mips16 instruction formats and set things 
up so that we can apply the direct object emitter patch. This patch
should be a nop right now and it's test is to not break what is already
there.
 

llvm-svn: 175126
 2013-02-14 03:05:25 +00:00
Cameron Zwarich
fb3cac38b7 Fix RegisterCoalescer::rematerializeTrivialDef() so that it works on flipped 
CoalescerPairs. Also, make it take a CoalescerPair directly like other methods
of RegisterCoalescer.

llvm-svn: 175123
 2013-02-14 02:51:05 +00:00
Cameron Zwarich
eff4f38af2 Fix some issues with rematerialization in RegisterCoalescer when the destination 
of the copy is a subregister def. The current code assumes that it can do a full
def of the destination register, but it is not checking that the def operand is
read-undef. It also doesn't clear the subregister index of the destination in
the new instruction to reflect the full subregister def.

These issues were found running 'make check' with my next commit that enables
rematerialization in more cases.

llvm-svn: 175122
 2013-02-14 02:51:03 +00:00
Rafael Espindola
d214fef222 Don't assume the mangling of static functions. 
llvm-svn: 175121
 2013-02-14 02:49:18 +00:00
Rafael Espindola
cd4cd16ea7 Don't asume that a static function in an extern "C" block will not be mangled. 
Since functions with internal linkage don't have language linkage, it is valid
to overload them:

extern "C" {
       static int foo();
       static int foo(int);
}

So we mangle them.

llvm-svn: 175120
 2013-02-14 01:58:08 +00:00
Weiming Zhao
1159c1f3f0 temporarily revert the patch due to some conflicts 
llvm-svn: 175107
 2013-02-13 23:24:40 +00:00
Bill Wendling
29c7662732 Retain the name of the new internal global that's been shrunk. 
It's possible (e.g. after an LTO build) that an internal global may be used for
debugging purposes. If that's the case appending a '.b' to it makes it hard to
find that variable. Steal the name from the old GV before deleting it so that
they can find that variable again.

llvm-svn: 175104
 2013-02-13 23:00:51 +00:00
Anshuman Dasgupta
a6322b9e0a Hexagon: add support for predicate-GPR copies. 
llvm-svn: 175102
 2013-02-13 22:56:34 +00:00
Tom Stellard
9cf905c167 R600: Add support for 128-bit parameters 
NOTE: This is a candidate for the Mesa stable branch.
llvm-svn: 175096
 2013-02-13 22:05:20 +00:00
Nick Lewycky
9a61e050d5 Don't build tail calls to functions with three inreg arguments on x86-32 PIC. 
Fixes PR15250!

llvm-svn: 175092
 2013-02-13 21:59:15 +00:00
Weiming Zhao
e51d6cf7ae Bug fix 13622: Add paired register support for inline asm with 64-bit data on ARM 
llvm-svn: 175088
 2013-02-13 21:43:02 +00:00
Jyotsna Verma
a382dbb48f Hexagon: Use absolute addressing mode loads/stores for global+offset 
instead of redefining separate instructions for them.

llvm-svn: 175086
 2013-02-13 21:38:46 +00:00
Chad Rosier
ed40f84fdc [ms-inline-asm] Add support for memory references that have non-immediate 
displacements.
rdar://12974533

llvm-svn: 175083
 2013-02-13 21:33:44 +00:00
Chad Rosier
0c12b80a10 [ms-inline asm] Add a comment about the determinism of the rewrite sort. 
llvm-svn: 175082
 2013-02-13 21:27:17 +00:00
Benjamin Kramer
7e28d6495d LoopVectorize: Simplify code for clarity. 
No functionality change.

llvm-svn: 175076
 2013-02-13 21:12:29 +00:00
Reed Kotler
c0c9bb9263 For Mips 16, add the optimization where the 16 bit form of addiu sp can be used 
if the offset fits in 11 bits. This makes use of the fact that the abi
requires sp to be 8 byte aligned so the actual offset can fit in 8
bits. It will be shifted left and sign extended before being actually used.
The assembler or direct object emitter will shift right the 11 bit
signed field by 3 bits. We don't need to deal with that here.

llvm-svn: 175073
 2013-02-13 20:28:27 +00:00
Manman Ren
b5e3203959 Clean up LDV, no functionality change. 
Remove dead functions: renameRegister
Move private member variables from LDV to Impl
Remove ssp/uwtable from testing case

llvm-svn: 175072
 2013-02-13 20:23:48 +00:00
Andrew Trick
4cce0af4e9 MIsched: HazardRecognizers are created for each DAG. Free them. 
llvm-svn: 175067
 2013-02-13 19:22:27 +00:00
Chad Rosier
5ead8d3901 [ms-inline-asm] Use an array_pod_sort, rather than a std:sort. 
llvm-svn: 175063
 2013-02-13 18:38:58 +00:00
Pekka Jaaskelainen
7e2908d0f3 Metadata for annotating loops as parallel. The first consumer for this 
metadata is the loop vectorizer.

See the documentation update for more info.

llvm-svn: 175060
 2013-02-13 18:08:57 +00:00
Krzysztof Parzyszek
b6d2a1c1ee Add registration for PPC-specific passes to allow the IR to be dumped 
via -print-after-all.

llvm-svn: 175058
 2013-02-13 17:40:07 +00:00
Benjamin Kramer
34ab81b7fa X86: Disable generation of rep;movsl when %esi is used as a base pointer. 
This happens when there is both stack realignment and a dynamic alloca in the
function. If we overwrite %esi (rep;movsl uses fixed registers) we'll lose the
base pointer and the next register spill will write into oblivion.

Fixes PR15249 and unbreaks firefox on i386/freebsd. Mozilla uses dynamic allocas
and freebsd a 4 byte stack alignment.

llvm-svn: 175057
 2013-02-13 13:40:35 +00:00
Bill Wendling
8d3d898234 Use array_pod_sort. 
llvm-svn: 175048
 2013-02-13 09:26:26 +00:00
Bill Wendling
45be8c5d89 Add some accessor and query methods for retrieving Attribute objects and such. 
llvm-svn: 175046
 2013-02-13 08:42:21 +00:00
Reed Kotler
49229780c8 Make jumptables work for -static 
llvm-svn: 175044
 2013-02-13 08:32:14 +00:00
Elena Demikhovsky
a4a4bded4d Prevent insertion of "vzeroupper" before call that preserves YMM registers, since a caller uses preserved registers across the call. 
llvm-svn: 175043
 2013-02-13 08:02:04 +00:00
Eric Christopher
a2c85e433f Check i1 as well as i8 variables for 8 bit registers for x86 inline 
assembly.

llvm-svn: 175036
 2013-02-13 06:01:05 +00:00
Kostya Serebryany
2d4f4b284c [tsan] disable load widening in ThreadSanitizer mode 
llvm-svn: 175034
 2013-02-13 05:59:45 +00:00
Kostya Serebryany
c6f889301b [asan] fix confusing indentation 
llvm-svn: 175033
 2013-02-13 05:14:12 +00:00
Eric Christopher
49b50f690c Fix comment. 
llvm-svn: 175024
 2013-02-13 02:29:18 +00:00
Manman Ren
7c3626e9c0 Debug Info: LiveDebugVarible can remove DBG_VALUEs, make sure we emit them back. 
RegisterCoalescer used to depend on LiveDebugVariable. LDV removes DBG_VALUEs
without emitting them at the end.

We fix this by removing LDV from RegisterCoalescer. Also add an assertion to
make sure we call emitDebugValues if DBG_VALUEs are removed at
runOnMachineFunction.

rdar://problem/13183203
Reviewed by Andy & Jakob

llvm-svn: 175023
 2013-02-13 01:14:49 +00:00
Chad Rosier
271b9e136a [ms-inline-asm] Make sure the AsmRewrite list is sorted in lexical order. 
rdar://13202662

llvm-svn: 175021
 2013-02-13 01:03:13 +00:00
David Peixotto
84c964ec93 Test commit. Fixed typo. 
llvm-svn: 175020
 2013-02-13 00:36:35 +00:00
Arnaud A. de Grandmaison
2c730cd330 Fix comment 
visitSExt is an adapted copy of the related visitZExt method, so adapt the comment accordingly.

llvm-svn: 175019
 2013-02-13 00:19:19 +00:00
Michael Gottesman
da8220bd2f Changed isStoredObjCPointer => IsStoredObjCPointer. No functionality change. 
llvm-svn: 175017
 2013-02-12 23:35:08 +00:00
Dan Gohman
1ea13bd49f Actually delete this code, since it's really not clear what it's 
trying to do.

llvm-svn: 175014
 2013-02-12 22:26:41 +00:00
Chad Rosier
fccc6d00f0 [ms-inline-asm] Implement align directive (which is roughly equivalent to .align). 
Also, allow _EMIT and __EMIT for the emit directive.  We already do the same
for TYPE, SIZE, and LENGTH.
rdar://13200215

llvm-svn: 175008
 2013-02-12 21:33:51 +00:00
Jack Carter
78a165943b This patch just fixes up various llvm formatting 
violations such as tabs, blanks at eol and long 
lines.


 

llvm-svn: 175007
 2013-02-12 21:29:39 +00:00
Guy Benyei
92dac48079 Add static cast to unsigned char whenever a character classification function is called with a signed char argument, in order to avoid assertions in Windows Debug configuration. 
llvm-svn: 175006
 2013-02-12 21:21:59 +00:00
Dan Gohman
a04e614c0f Record PRE predecessors with a SmallVector instead of a DenseMap, and 
avoid a second pred_iterator traversal.

llvm-svn: 175001
 2013-02-12 19:49:10 +00:00
Chad Rosier
3eb029b4c7 [ms-inline asm] Pass the length of the IDVal, so we can do a proper AsmRewrite. 
llvm-svn: 174999
 2013-02-12 19:42:32 +00:00
Chad Rosier
24b5149dc9 [ms-inline asm] Accept the emit directive as either _emit or __emit. 
llvm-svn: 174998
 2013-02-12 19:31:23 +00:00