Commit Graph

62184 Commits

Author SHA1 Message Date
Jakob Stoklund Olesen
821d058fd2 X86InstrInfo::copyRegToReg is dead. Long live copyPhysReg!
llvm-svn: 108076
2010-07-11 05:44:30 +00:00
Jakob Stoklund Olesen
36d7757d3f Remove copyRegToReg from TargetInstrInfo so it is not longer accesible.
Use a COPY instruction instead for register copies, or TII::copyPhysReg() after
COPY instructions are lowered.

Targets should implement copyPhysReg instead of copyRegToReg.

llvm-svn: 108075
2010-07-11 05:17:06 +00:00
Jakob Stoklund Olesen
08fc7eaaa2 Use COPY in X86FastISel::X86SelectRet.
Don't try a cross-class copy. That is very unlikely anywy since return value
registers are usually register class friendly. (%EAX, %XMM0, etc).

llvm-svn: 108074
2010-07-11 05:17:02 +00:00
Jakob Stoklund Olesen
e2f74d400c Use COPY for fast-isel bitconvert, but don't create cross-class copies.
This doesn't change the behavior of SelectBitcast for X86.

llvm-svn: 108073
2010-07-11 05:16:54 +00:00
Rafael Espindola
84716579d4 Fix va_arg for doubles. With this patch VAARG nodes always contain the
correct alignment information, which simplifies ExpandRes_VAARG a bit.

The patch introduces a new alignment information to TargetLoweringInfo. This is
needed since the two natural candidates cannot be used:

* The 's' in target data: If this is set to the minimal alignment of any
  argument, getCallFrameTypeAlignment would return 4 for doubles on ARM for
  example.
* The getTransientStackAlignment method. It is possible for an architecture to
  have argument less aligned than what we maintain the stack pointer.

llvm-svn: 108072
2010-07-11 04:01:49 +00:00
Jakob Stoklund Olesen
e7d336ee21 Replace copyRegToReg with COPY in FastISelEmitter.
llvm-svn: 108071
2010-07-11 03:53:50 +00:00
Jakob Stoklund Olesen
4b39aa26df Use COPY for extracting ImplicitDef'ed values from fast-isel instructions.
This assumes that the registers can be copied which is probably a safe
assumption.

llvm-svn: 108070
2010-07-11 03:31:05 +00:00
Jakob Stoklund Olesen
57bbaf37c0 Use COPY in FastISel everywhere it is safe and trivial.
The remaining copyRegToReg calls actually check the return value (shock!), so we
cannot trivially replace them with COPY instructions.

llvm-svn: 108069
2010-07-11 03:31:00 +00:00
Jakob Stoklund Olesen
c1aca7464d Replace copyRegToReg with copyPhysReg for Mips.
llvm-svn: 108066
2010-07-11 01:08:31 +00:00
Jakob Stoklund Olesen
0fc69a96b7 Replace copyRegToReg with copyPhysReg for Alpha.
llvm-svn: 108065
2010-07-11 01:08:23 +00:00
Dan Gohman
226e208014 sdiv overflow is outright undefined behavior, with or without the
'exact' keyword. Thanks to nlewycky for pointing this out!

llvm-svn: 108064
2010-07-11 00:08:34 +00:00
Jakob Stoklund Olesen
b1c6191d3b Use COPY in targets
llvm-svn: 108063
2010-07-10 22:43:03 +00:00
Jakob Stoklund Olesen
f0d1bf23eb Replace copyRegToReg with COPY everywhere in lib/CodeGen except for FastISel.
llvm-svn: 108062
2010-07-10 22:42:59 +00:00
Jakob Stoklund Olesen
9b0f71f68f Only collect subreg extracting copies for later coalescing.
This also avoids fatal copies from physregs.

llvm-svn: 108061
2010-07-10 22:42:53 +00:00
Dan Gohman
d96f5d09bb Fix a bug in the code which re-inserts DBG_VALUE nodes after scheduling;
if a block is split (by a custom inserter), the insert point may be in a
different block than it was originally. This fixes 32-bit llvm-gcc
bootstrap builds, and I haven't been able to reproduce it otherwise.

llvm-svn: 108060
2010-07-10 22:42:31 +00:00
Dan Gohman
7734fa156d Fix this test.
llvm-svn: 108059
2010-07-10 22:42:12 +00:00
Duncan Sands
954c75c560 The accumulator tail recursion transform claims to work for any associative
operation, but the way it's implemented requires the operation to also be
commutative.  So add a check for commutativity (and tweak the corresponding
comments).  This makes no difference in practice since every associative
LLVM instruction is also commutative!  Here's an example to show the need
for commutativity: the accum_recursion.ll testcase calculates the factorial
function.  Before the transformation the result of a call is
  ((((1*1)*2)*3)...)*x
while afterwards it is
  (((1*x)*(x-1))...*2)*1
which clearly requires both associativity and commutativity of * to be equal
to the original.

llvm-svn: 108056
2010-07-10 20:31:42 +00:00
Jakob Stoklund Olesen
609d345349 Emit COPY instructions instead of using copyRegToReg in InstrEmitter,
ScheduleDAGEmit, TwoAddressLowering, and PHIElimination.

This switches the bulk of register copies to using COPY, but many less used
copyRegToReg calls remain.

llvm-svn: 108050
2010-07-10 19:08:25 +00:00
Bill Wendling
48c8ee1c11 Use non-bool values for .count.
llvm-svn: 108048
2010-07-10 18:56:35 +00:00
Jakob Stoklund Olesen
b1e88a2725 Don't emit st(0)/st(1) copies as FpMOV instructions. Use FpSET_ST? instead.
Based on a patch by Rafael Espíndola.

Attempt to make the FpSET_ST1 hack more robust, but we are still relying on
FpSET_ST0 preceeding it. This is only for supporting really weird x87 inline
asm.

We support:

  FpSET_ST0
  INLINEASM

  FpSET_ST0
  FpSET_ST1
  INLINEASM

with and without kills on the arguments. We don't support:

  FpSET_ST1
  FpSET_ST0
  INLINEASM

nor

  FpSET_ST1
  INLINEASM

Just Don't Do It!

llvm-svn: 108047
2010-07-10 17:42:34 +00:00
Jakob Stoklund Olesen
36e769aa7b FileCheckize inline asm FP stack tests
llvm-svn: 108046
2010-07-10 16:30:25 +00:00
Dan Gohman
1ff6a10e31 Insert IMPLICIT_DEF instructions at the current insert position, not
at the end of the block.

llvm-svn: 108045
2010-07-10 13:55:45 +00:00
Chandler Carruth
1efbf423c5 Add parentheses yet again to satisfy GCC's warnings.
llvm-svn: 108043
2010-07-10 12:06:22 +00:00
Dan Gohman
a05b7a2c34 Add an explicit triple to make this test behave consistently.
llvm-svn: 108041
2010-07-10 09:01:35 +00:00
Dan Gohman
bd6a232794 Fix this XTARGET so that this does doesn't XPASS on non-darwin hosts.
llvm-svn: 108040
2010-07-10 09:01:03 +00:00
Dan Gohman
fef30fcd5e Reapply bottom-up fast-isel, with several fixes for x86-32:
- Check getBytesToPopOnReturn().
 - Eschew ST0 and ST1 for return values.
 - Fix the PIC base register initialization so that it doesn't ever
   fail to end up the top of the entry block.

llvm-svn: 108039
2010-07-10 09:00:22 +00:00
Jakob Stoklund Olesen
bf7dddd5b7 An x86 function returns a floating point value in st(0), and we must make sure
it is popped, even if it is ununsed. A CopyFromReg node is too weak to represent
the required sideeffect, so insert an FpGET_ST0 instruction directly instead.

This will matter when CopyFromReg gets lowered to a generic COPY instruction.

llvm-svn: 108037
2010-07-10 04:04:25 +00:00
Devang Patel
118d642573 Update DBG_VALUE to refer appropriate stack slot in case of a spill.
llvm-svn: 108023
2010-07-09 21:48:31 +00:00
Bruno Cardoso Lopes
3b9d36bde7 Declare YMM subregisters in the right way! Thanks Jakob
llvm-svn: 108022
2010-07-09 21:46:19 +00:00
Bruno Cardoso Lopes
f4180a9a7b Add AVX 256-bit packed MOVNT variants
llvm-svn: 108021
2010-07-09 21:42:42 +00:00
Jakob Stoklund Olesen
ef941722c5 Remember the *_TC opcodes for load/store
llvm-svn: 108020
2010-07-09 21:27:55 +00:00
Bruno Cardoso Lopes
6ca8dc935c Add AVX 256-bit unpack and interleave
llvm-svn: 108017
2010-07-09 21:20:35 +00:00
Jakob Stoklund Olesen
c90bfdd01f Fix small bug in isMoveInstr -> COPY translation
llvm-svn: 108013
2010-07-09 20:55:49 +00:00
Jakob Stoklund Olesen
d7c882a505 Automatically fold COPY instructions into stack load/store.
llvm-svn: 108012
2010-07-09 20:43:13 +00:00
Jakob Stoklund Olesen
53d777f3bd Fix a few tests
llvm-svn: 108011
2010-07-09 20:43:09 +00:00
Jakob Stoklund Olesen
c99c720728 Remat uncoalescable COPY instrs
llvm-svn: 108010
2010-07-09 20:43:05 +00:00
Jim Grosbach
b591b3b48d In the presence of variable sized objects, allocate an emergency spill slot.
rdar://8131327

llvm-svn: 108008
2010-07-09 20:27:06 +00:00
Bill Wendling
07a0700418 Clarify what mysterious check means.
llvm-svn: 108005
2010-07-09 19:44:12 +00:00
Dan Gohman
e7a09d478d Add a target triple.
llvm-svn: 108003
2010-07-09 19:17:36 +00:00
Dan Gohman
0c7d7ee288 Fix MachineLICM to actually visit inner loops.
llvm-svn: 108001
2010-07-09 18:49:45 +00:00
Bruno Cardoso Lopes
3676e24b67 Start the support for AVX instructions with 256-bit %ymm registers. A couple of
notes:
- The instructions are being added with dummy placeholder patterns using some 256
  specifiers, this is not meant to work now, but since there are some multiclasses
  generic enough to accept them,  when we go for codegen, the stuff will be already
  there.
- Add VEX encoding bits to support YMM
- Add MOVUPS and MOVAPS in the first round
- Use "Y" as suffix for those Instructions: MOVUPSYrr, ...
- All AVX instructions in X86InstrSSE.td will move soon to a new X86InstrAVX
  file.

llvm-svn: 107996
2010-07-09 18:27:43 +00:00
Jakob Stoklund Olesen
ccd252ca08 Change TII::foldMemoryOperand API to require the machine instruction to be
inserted in a MBB, and return an already inserted MI.

This target API change is necessary to allow foldMemoryOperand to call
storeToStackSlot and loadFromStackSlot when folding a COPY to a stack slot
reference in a target independent way.

The foldMemoryOperandImpl hook is going to change in the same way, but I'll wait
until COPY folding is actually implemented. Most targets only fold copies and
won't need to specialize this hook at all.

llvm-svn: 107991
2010-07-09 17:29:08 +00:00
Gabor Greif
e0e7111f4e cache result of operator*
llvm-svn: 107990
2010-07-09 16:51:20 +00:00
Gabor Greif
0a544667f8 remove useless cast and fix typos in comment
llvm-svn: 107989
2010-07-09 16:42:04 +00:00
Gabor Greif
a2c75f904d cache result of operator*
llvm-svn: 107988
2010-07-09 16:39:02 +00:00
Bob Wilson
9e8c9204ef --- Reverse-merging r107947 into '.':
U    utils/TableGen/FastISelEmitter.cpp
--- Reverse-merging r107943 into '.':
U    test/CodeGen/X86/fast-isel.ll
U    test/CodeGen/X86/fast-isel-loads.ll
U    include/llvm/Target/TargetLowering.h
U    include/llvm/Support/PassNameParser.h
U    include/llvm/CodeGen/FunctionLoweringInfo.h
U    include/llvm/CodeGen/CallingConvLower.h
U    include/llvm/CodeGen/FastISel.h
U    include/llvm/CodeGen/SelectionDAGISel.h
U    lib/CodeGen/LLVMTargetMachine.cpp
U    lib/CodeGen/CallingConvLower.cpp
U    lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
U    lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
U    lib/CodeGen/SelectionDAG/FastISel.cpp
U    lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
U    lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
U    lib/CodeGen/SelectionDAG/InstrEmitter.cpp
U    lib/CodeGen/SelectionDAG/TargetLowering.cpp
U    lib/Target/XCore/XCoreISelLowering.cpp
U    lib/Target/XCore/XCoreISelLowering.h
U    lib/Target/X86/X86ISelLowering.cpp
U    lib/Target/X86/X86FastISel.cpp
U    lib/Target/X86/X86ISelLowering.h

llvm-svn: 107987
2010-07-09 16:37:18 +00:00
Gabor Greif
4d1241bddb cache result of operator*
llvm-svn: 107984
2010-07-09 16:31:08 +00:00
Gabor Greif
fc355ccebb cache result of operator*
llvm-svn: 107983
2010-07-09 16:26:41 +00:00
Gabor Greif
e249fc8808 cache result of operator*
llvm-svn: 107982
2010-07-09 16:22:36 +00:00
Gabor Greif
9259059af3 cache result of operator*
llvm-svn: 107981
2010-07-09 16:17:52 +00:00