David Goodwin
|
6b56e77397
|
Add ARMv6 itineraries.
llvm-svn: 89218
|
2009-11-18 18:39:57 +00:00 |
|
Anton Korobeynikov
|
3ba3789153
|
Use NEON reg-reg moves, where profitable. This reduces "domain-cross" stalls, when we used to mix vfp and neon code (the former were used for reg-reg moves)
llvm-svn: 85764
|
2009-11-02 00:10:38 +00:00 |
|
David Goodwin
|
a4b73e486e
|
Remove neonfp attribute and instead set default based on CPU string. Add -arm-use-neon-fp to override the default.
llvm-svn: 83218
|
2009-10-01 22:19:57 +00:00 |
|
David Goodwin
|
d0edce4c0d
|
Restore the -post-RA-scheduler flag as an override for the target specification. Remove -mattr for setting PostRAScheduler enable and instead use CPU string.
llvm-svn: 83215
|
2009-10-01 21:46:35 +00:00 |
|
David Goodwin
|
a282690f82
|
Remove -post-RA-schedule flag and add a TargetSubtarget method to enable post-register-allocation scheduling. By default it is off. For ARM, enable/disable with -mattr=+/-postrasched. Enable by default for cortex-a8.
llvm-svn: 83122
|
2009-09-30 00:10:16 +00:00 |
|
David Goodwin
|
1d72b88015
|
Checkpoint NEON scheduling itineraries.
llvm-svn: 82657
|
2009-09-23 21:38:08 +00:00 |
|
David Goodwin
|
2686178489
|
Allow a zero cycle stage to reserve/require a FU without advancing the cycle counter.
llvm-svn: 78736
|
2009-08-11 22:38:43 +00:00 |
|
David Goodwin
|
c0fe95d8ce
|
Make NEON single-precision FP support the default for cortex-a8 (again).
llvm-svn: 78430
|
2009-08-07 23:32:33 +00:00 |
|
David Goodwin
|
9013115518
|
Disable NEON single-precision FP support for Cortex-A8, for now...
llvm-svn: 78209
|
2009-08-05 16:40:57 +00:00 |
|
David Goodwin
|
47064aa1c6
|
By default, for cortex-a8 use NEON for single-precision FP.
llvm-svn: 78200
|
2009-08-05 16:01:19 +00:00 |
|
David Goodwin
|
99adffe5f2
|
Initial support for single-precision FP using NEON. Added "neonfp" attribute to enable. Added patterns for some binary FP operations.
llvm-svn: 78081
|
2009-08-04 17:53:06 +00:00 |
|
Evan Cheng
|
66f1d7a0e1
|
Add fake v7 itineraries for now.
llvm-svn: 76612
|
2009-07-21 18:54:14 +00:00 |
|
Evan Cheng
|
18d70ca551
|
Add a Thumb2 instruction flag to that indicates whether the instruction can be transformed to 16-bit variant.
llvm-svn: 74988
|
2009-07-08 01:46:35 +00:00 |
|
Evan Cheng
|
f671ce4eba
|
Latency information for ARM v6. It's rough and not yet hooked up. Right now we are only using branch latency to determine if-conversion limits.
llvm-svn: 73747
|
2009-06-19 01:51:50 +00:00 |
|
Anton Korobeynikov
|
52b2898854
|
Separate V6 from V6T2 since the latter has some extra nice instructions
llvm-svn: 73085
|
2009-06-08 21:20:36 +00:00 |
|
Anton Korobeynikov
|
4f5b1ef545
|
Add placeholder for thumb2 stuff
llvm-svn: 72593
|
2009-05-29 23:41:08 +00:00 |
|
Anton Korobeynikov
|
1fe3d6d47b
|
Add ARMv7 architecture, Cortex processors and different FPU modes handling.
llvm-svn: 72337
|
2009-05-23 19:51:43 +00:00 |
|
Bob Wilson
|
b8756b00cd
|
Use CallConvLower.h and TableGen descriptions of the calling conventions
for ARM. Patch by Sandeep Patel.
llvm-svn: 69371
|
2009-04-17 19:07:39 +00:00 |
|
Evan Cheng
|
a19ef59d6c
|
Move target independent td files from lib/Target/ to include/llvm/Target so they can be distributed along with the header files.
llvm-svn: 59953
|
2008-11-24 07:34:46 +00:00 |
|
Evan Cheng
|
aa24d19533
|
Remove opcode from instruction TS flags; add MOVCC support; fix addrmode3 encoding bug.
llvm-svn: 58800
|
2008-11-06 08:47:38 +00:00 |
|
Evan Cheng
|
9970c31dcf
|
Restructure ARM code emitter to use instruction formats instead of addressing modes to determine how to encode instructions.
llvm-svn: 58764
|
2008-11-05 18:35:52 +00:00 |
|
Chris Lattner
|
ad9a6ccb83
|
Remove attribution from file headers, per discussion on llvmdev.
llvm-svn: 45418
|
2007-12-29 20:36:04 +00:00 |
|
Evan Cheng
|
8c896cc115
|
Initial JIT support for ARM by Raul Fernandes Herbster.
llvm-svn: 40887
|
2007-08-07 01:37:15 +00:00 |
|
Lauro Ramos Venancio
|
4e4a4e36dd
|
Add a processor.
llvm-svn: 36765
|
2007-05-04 22:16:30 +00:00 |
|
Evan Cheng
|
c6e1d453d3
|
ARM backend contribution from Apple.
llvm-svn: 33353
|
2007-01-19 07:51:42 +00:00 |
|
Evan Cheng
|
667b133ab9
|
getCalleeSaveRegs and getCalleeSaveRegClasses are no long TableGen'd.
llvm-svn: 28378
|
2006-05-18 00:12:58 +00:00 |
|
Evan Cheng
|
ea24815aa3
|
Remove PointerType from class Target
llvm-svn: 28368
|
2006-05-17 21:20:27 +00:00 |
|
Rafael Espindola
|
dd49dfc0df
|
added a skeleton of the ARM backend
llvm-svn: 28301
|
2006-05-14 22:18:28 +00:00 |
|