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9531 Commits

Author SHA1 Message Date
Dale Johannesen
39738b1ff8 Make LowerCallTo and LowerArguments take a DebugLoc 
argument.  Adjust all callers and overloaded versions.

llvm-svn: 63444
 2009-01-30 23:10:59 +00:00
Bill Wendling
67737da99b Get rid of the non-DebugLoc-ified getNOT() method. 
llvm-svn: 63442
 2009-01-30 23:03:19 +00:00
Sanjiv Gupta
11d082d56e Fixed the comment. No functionality change. 
llvm-svn: 63387
 2009-01-30 09:01:44 +00:00
Sanjiv Gupta
b4cf873468 Use sublw for comparison with literals instead of subwf. 
llvm-svn: 63382
 2009-01-30 07:55:25 +00:00
Mon P Wang
5db99442e4 When PerformBuildVectorCombine, avoid creating a X86ISD::VZEXT_LOAD of 
an illegal type.

llvm-svn: 63380
 2009-01-30 07:07:40 +00:00
Sanjiv Gupta
e442452ade Enable emitting of constant values in non-default address space as well. The APIs emitting constants now take an additional parameter signifying the address space in which to emit. The APIs like getData8BitsDirective() etc are made virtual enabling targets to be able to define appropirate directivers for various sizes and address spaces. 
llvm-svn: 63377
 2009-01-30 04:25:10 +00:00
Dan Gohman
9d120d6d8f Make x86's BT instruction matching more thorough, and add some 
dagcombines that help it match in several more cases. Add
several more cases to test/CodeGen/X86/bt.ll. This doesn't
yet include matching for BT with an immediate operand, it
just covers more register+register cases.

llvm-svn: 63266
 2009-01-29 01:59:02 +00:00
Mon P Wang
8abb07a527 Fixed lowering of v816 shuffles. 
llvm-svn: 63252
 2009-01-28 23:11:14 +00:00
Duncan Sands
aee16d4916 Rename getAnalysisToUpdate to getAnalysisIfAvailable. 
llvm-svn: 63198
 2009-01-28 13:14:17 +00:00
Evan Cheng
2a965124b7 The memory alignment requirement on some of the mov{h|l}p{d|s} patterns are 16-byte. That is overly strict. These instructions read / write f64 memory locations without alignment requirement. 
llvm-svn: 63195
 2009-01-28 08:35:02 +00:00
Mon P Wang
e1c886f775 Add shuffle splat pattern for x86 sse shifts. 
llvm-svn: 63193
 2009-01-28 08:12:05 +00:00
Evan Cheng
31f8d3639f Suppress a compile time warning. 
llvm-svn: 63161
 2009-01-28 00:53:34 +00:00
Anton Korobeynikov
7e63f1aae6 Treat [1 x i8] zeroinitializer as a C string, placing such stuff into 
mergeable string section. I don't see any bad impact of such decision
(rather then placing it into mergeable const section, as it was before),
but at least Darwin linker won't complain anymore.

The problem in LLVM is that we don't have special type for string constants
(like gcc does). Even more, we have two separate types: ConstatArray for non-null
strings and ConstantAggregateZero for null stuff.... It's a bit weird :)

llvm-svn: 63142
 2009-01-27 22:29:24 +00:00
Dan Gohman
c017343459 Reformat the allocation-order arrays to a more conventional style. 
llvm-svn: 63121
 2009-01-27 19:25:38 +00:00
Dan Gohman
f7e8bf0511 Respect the DisableRedZone flag on PowerPC. 
llvm-svn: 63119
 2009-01-27 19:19:28 +00:00
Dan Gohman
7d80f8688e Simplify findNonImmUse; return the result using the return value 
instead of via a by-reference argument. No functionality change.

llvm-svn: 63118
 2009-01-27 19:04:30 +00:00
Evan Cheng
a05436f739 Implement multiple with overflow by 2 with an add instruction. 
llvm-svn: 63090
 2009-01-27 03:30:42 +00:00
Dan Gohman
2e0343e321 Eliminate unnecessary operands-list traversals. 
llvm-svn: 63088
 2009-01-27 02:37:43 +00:00
Dan Gohman
f3c2ac3497 Enable the red zone on x86-64 by default. 
llvm-svn: 63078
 2009-01-27 00:58:47 +00:00
Dan Gohman
4ad174b236 Fix the Red Zone calculation for functions with frame pointers. 
Don't use the Red Zone when dynamic stack realignment is needed.
This could be implemented, but most x86-64 ABIs don't require
dynamic stack realignment so it isn't urgent.

llvm-svn: 63074
 2009-01-27 00:40:06 +00:00
Scott Michel
e00d746487 CellSPU: 
- Update DWARF debugging support.

llvm-svn: 63059
 2009-01-26 22:33:37 +00:00
Scott Michel
56fa9ba0b6 Make the Dwarf macro information section optional; CellSPU's assembler 
doesn't support it. The default is set to 'true', so this should not
impact any other target backends.

llvm-svn: 63058
 2009-01-26 22:32:51 +00:00
Dan Gohman
3a51d8e847 Implement Red Zone utilization on x86-64. This is currently 
disabled by default; I'll enable it when I hook it up with
the llvm-gcc flag which controls it.

llvm-svn: 63056
 2009-01-26 22:22:31 +00:00
Evan Cheng
ec03e0cd3b Enhance logic in X86DAGToDAGISel::PreprocessForRMW which move load inside callseq_start to allow it to be folded into a call. It was not considering the cases where a token factor is between the load and the callseq_start. 
llvm-svn: 63022
 2009-01-26 18:43:34 +00:00
Dan Gohman
4abaebae0c Take the next steps in making SDUse more consistent with LLVM Use, and 
tidy up SDUse and related code.
 - Replace the operator= member functions with a set method, like
   LLVM Use has, and variants setInitial and setNode, which take
   care up updating use lists, like LLVM Use's does. This simplifies
   code that calls these functions.
 - getSDValue() is renamed to get(), as in LLVM Use, though most
   places can either use the implicit conversion to SDValue or the
   convenience functions instead.
 - Fix some more node vs. value terminology issues.

Also, eliminate the one remaining use of SDOperandPtr, and
SDOperandPtr itself.

llvm-svn: 62995
 2009-01-26 04:35:06 +00:00
Scott Michel
af51520775 Untabify code. 
llvm-svn: 62991
 2009-01-26 03:37:41 +00:00
Scott Michel
da9360e77e CellSPU: 
- Rename fcmp.ll test to fcmp32.ll, start adding new double tests to fcmp64.ll
- Fix select_bits.ll test
- Capitulate to the DAGCombiner and move i64 constant loads to instruction
  selection (SPUISelDAGtoDAG.cpp).

  <rant>DAGCombiner will insert all kinds of 64-bit optimizations after
  operation legalization occurs and now we have to do most of the work that
  instruction selection should be doing twice (once to determine if v2i64
  build_vector can be handled by SelectCode(), which then runs all of the
  predicates a second time to select the necessary instructions.) But,
  CellSPU is a good citizen.</rant>

llvm-svn: 62990
 2009-01-26 03:31:40 +00:00
Nate Begeman
48639fe6dc Fix a typo 
llvm-svn: 62989
 2009-01-26 03:15:54 +00:00
Nate Begeman
d2f708eca5 De-identifying per sabre review 
llvm-svn: 62988
 2009-01-26 03:15:31 +00:00
Nate Begeman
92efc4f0ce Map address space 256 to gs; similar mappings could be supported for the 
other x86 segments.  address space 0 is stack/default, 1-255 are reserved for
client use.

llvm-svn: 62980
 2009-01-26 01:24:32 +00:00
Nate Begeman
81d70f3f54 Support pattern matching various x86 sse shifts. 
llvm-svn: 62979
 2009-01-26 00:52:55 +00:00
Chris Lattner
e7bf6037e2 silence a warning when assertions are disabled. 
llvm-svn: 62976
 2009-01-25 23:08:00 +00:00
Torok Edwin
6f715ebe85 should have removed the + when manually applying a patch! 
llvm-svn: 62973
 2009-01-25 20:29:34 +00:00
Torok Edwin
3f54410405 revert this patch for now, because Codegen does still want to generate SSE code, 
for example in the case of va-args. XFAIL associated tests.

llvm-svn: 62972
 2009-01-25 20:21:24 +00:00
Torok Edwin
49b1d3e3cc If user explicitly asks not to use SSE, don't force it. This fixes LLVM part of PR3402. 
llvm-svn: 62967
 2009-01-25 17:58:56 +00:00
Evan Cheng
71ca3e2bdb Private linkage support for PPC / Darwin. 
llvm-svn: 62955
 2009-01-25 06:32:01 +00:00
Nate Begeman
48f3fe9199 Fix an indent and a typo. 
llvm-svn: 62940
 2009-01-24 22:12:48 +00:00
Torok Edwin
6dd79be128 add note about possible GEP improvement with fields of size 0. 
llvm-svn: 62925
 2009-01-24 19:30:25 +00:00
Chris Lattner
97b6f6a674 hopefully address PR3379 by making the P modifier work in x86 inline asm. 
llvm-svn: 62887
 2009-01-23 22:33:40 +00:00
Bob Wilson
186046e657 Add SelectionDAG::getNOT method to construct bitwise NOT operations, 
corresponding to the "not" and "vnot" PatFrags.  Use the new method
in some places where it seems appropriate.

llvm-svn: 62768
 2009-01-22 17:39:32 +00:00
Evan Cheng
c971801ae1 Eliminate a couple of fields from TargetRegisterClass: SubRegClasses and SuperRegClasses. These are not necessary. Also eliminate getSubRegisterRegClass and getSuperRegisterRegClass. These are slow and their results can change if register file names change. Just use TargetLowering::getRegClassFor() to get the right TargetRegisterClass instead. 
llvm-svn: 62762
 2009-01-22 09:10:11 +00:00
Chris Lattner
fcf56e7fbe add a note 
llvm-svn: 62760
 2009-01-22 07:16:03 +00:00
Dan Gohman
29b575c6cd Recognize inline asm for bswap on x86-64 GLIBC. This allows it 
to be supported in the JIT.

llvm-svn: 62730
 2009-01-21 23:40:54 +00:00
Evan Cheng
43d680b0d8 Also favors NOT64r. 
llvm-svn: 62710
 2009-01-21 19:45:31 +00:00
Chris Lattner
2b6b947b4f fix warning in release-asserts mode and spelling of assert. 
llvm-svn: 62699
 2009-01-21 18:38:18 +00:00
Dan Gohman
704f0d5879 Fix a recent regression. ClrOpcode is not set for i8; for i8, if 
we want to clear %ah to zero before a division, just use a
zero-extending mov to %al. This fixes PR3366.

llvm-svn: 62691
 2009-01-21 14:50:16 +00:00
Sanjiv Gupta
ebef67f13c Fixed build warnings. Restoring changes done in 62600, they were lost in 62655. 
llvm-svn: 62681
 2009-01-21 09:02:46 +00:00
Duncan Sands
392dc77fc6 Cleanup whitespace and comments, and tweak some 
prototypes, in operand type legalization.  No
functionality change.

llvm-svn: 62680
 2009-01-21 09:00:29 +00:00
Sanjiv Gupta
37fdb5ca11 Implement LowerOperationWrapper for legalizer. 
Also a few signed comparison fixes.

llvm-svn: 62665
 2009-01-21 05:44:05 +00:00
Scott Michel
c80e71ac35 CellSPU: 
- Ensure that (operation) legalization emits proper FDIV libcall when needed.
- Fix various bugs encountered during llvm-spu-gcc build, along with various
  cleanups.
- Start supporting double precision comparisons for remaining libgcc2 build.
  Discovered interesting DAGCombiner feature, which is currently solved via
  custom lowering (64-bit constants are not legal on CellSPU, but DAGCombiner
  insists on inserting one anyway.)
- Update README.

llvm-svn: 62664
 2009-01-21 04:58:48 +00:00