Nate Begeman
9705f413b7
Remove dead code
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llvm-svn: 15750
2004-08-15 00:31:02 +00:00
Chris Lattner
e19e10e800
Print mflr using the asmwriter generator
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llvm-svn: 15749
2004-08-14 23:27:29 +00:00
Nate Begeman
224deaa061
Replace PowerPCPEI.cpp with target independant PrologEpilogInserter
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llvm-svn: 15746
2004-08-14 22:16:36 +00:00
Nate Begeman
826fbd0de1
Add support for frame pointers, and large offsets from stack and frame pointers. Adopt elimination of MachineFunction& arg from eliminateFrameIndex.
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llvm-svn: 15745
2004-08-14 22:13:58 +00:00
Nate Begeman
557f61c4d6
Add indexed forms of load doubleword and load word algebraic for 64 bit targets
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llvm-svn: 15743
2004-08-14 22:12:20 +00:00
Nate Begeman
03781a00e8
Fix handling of FP constants with single precision, and loading of internal linkage function addresses
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llvm-svn: 15742
2004-08-14 22:11:38 +00:00
Nate Begeman
52fb57411b
Add initial support for using the generated asm writer. Also, fix FP constant printing to always print 8 byte intializers. Move printing of LinkOnce stubs.
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llvm-svn: 15741
2004-08-14 22:09:10 +00:00
Nate Begeman
56b50cb7e8
Add generation of asm writer from tablegen files to Makefile
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llvm-svn: 15740
2004-08-14 22:06:38 +00:00
Nate Begeman
7024c8a1a4
Remove an unneeded header and forward declaration
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llvm-svn: 15722
2004-08-13 09:33:17 +00:00
Nate Begeman
101112a2f4
Fix siod by switching BoolTy to byte rather than int until CFE changes for
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Darwin. Also, change asm printer to output proper stubs for external
functions whose address is passed as an argument to aid in bugpointing.
llvm-svn: 15721
2004-08-13 09:32:01 +00:00
Nate Begeman
6cf8366e11
Fix 177.mesa compilation, don't use floating point regs for base addresses!
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llvm-svn: 15720
2004-08-13 04:45:14 +00:00
Nate Begeman
9f8ad2f245
Fix llc crasher compiling siod by giving BuildMI the correct number of arguments
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llvm-svn: 15719
2004-08-13 03:56:49 +00:00
Nate Begeman
6a9f2fd2c1
Longs are in one register on PowerPC 64; use appropriate instructions to operate on them.
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llvm-svn: 15711
2004-08-13 02:20:47 +00:00
Nate Begeman
48359fbcd0
Add some more 64 bit instructions we need for the PowerPC-64 ISel to the tablegen files
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llvm-svn: 15710
2004-08-13 02:19:26 +00:00
Misha Brukman
f2c87f4794
Disable PPC64 backend by default because LLC cannot choose automatically between
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SparcV9 and PowerPC64 without target triples, since they are both 64-bit
big-endian targets.
llvm-svn: 15688
2004-08-12 17:16:43 +00:00
Misha Brukman
bf93b04c17
* Correct 64-bit version: blr 1 (not 0)
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* BuildMI() can build 0-param instructions (e.g., NOP)
llvm-svn: 15681
2004-08-12 03:30:03 +00:00
Misha Brukman
e281f3a2ac
* Print out full names for non-GPR or -FPR registers
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* BuildMI() really *does* handle 0 params!
llvm-svn: 15680
2004-08-12 03:28:47 +00:00
Misha Brukman
2851d39ec4
* Pointers are 8 bytes, hence cLong type on 64-bit PPC
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* Fix loading of GlobalValues
llvm-svn: 15678
2004-08-12 02:53:01 +00:00
Misha Brukman
8bcb04dd35
Eliminate special-casing 14-bit immediate load/store opcodes
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llvm-svn: 15677
2004-08-12 02:51:38 +00:00
Misha Brukman
1149a822a2
Correctly print out ASCII literal strings on AIX
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llvm-svn: 15674
2004-08-12 01:01:13 +00:00
Misha Brukman
d9b3a360fc
Mark R2 as available for allocation on Darwin/PPC32, but not AIX/PPC64
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llvm-svn: 15673
2004-08-12 00:10:01 +00:00
Misha Brukman
14bf47d0d9
* Move AIX into the llvm namespace to be accessed from RegisterInfo
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* Mark InstrInfo with 32 vs. 64 bit flag
* Enable the 64-bit isel and asm printer
llvm-svn: 15672
2004-08-11 23:47:08 +00:00
Misha Brukman
c24851b980
Set the is64bit flag and propagate it to PowerPCRegisterInfo
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llvm-svn: 15671
2004-08-11 23:45:43 +00:00
Misha Brukman
42e53e4d94
* Set the is64bit boolean flag in PowerPCRegisterInfo
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* Doubles are 8 bytes in 64-bit PowerPC, and use the general register class
* Use double-word loads and stores for restoring from/saving to stack
* Do not allocate R2 if compiling for AIX
llvm-svn: 15670
2004-08-11 23:44:55 +00:00
Misha Brukman
fc82624aab
64-bit instruction selector and AIX-specific 64-bit asm printer
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llvm-svn: 15669
2004-08-11 23:42:15 +00:00
Misha Brukman
0b67e02e9c
Fix names of 64-bit CMP*D* opcodes, add LWA and STD* opcodes
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llvm-svn: 15668
2004-08-11 23:33:34 +00:00
Misha Brukman
08b8a09113
Add support for 64-bit CMPDI, CMPLDI, and CMPLD opcodes
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llvm-svn: 15667
2004-08-11 20:56:14 +00:00
Misha Brukman
7325a6c790
Add doubleword load/store (64-bit only).
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llvm-svn: 15665
2004-08-11 15:54:36 +00:00
Misha Brukman
1f4fb14301
Hyphenate ##-bit and remove first-person from comments.
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llvm-svn: 15663
2004-08-11 13:35:44 +00:00
Nate Begeman
6120e8f04f
Clean up 32/64bit and Darwin/AIX split. Next steps: 64 bit ISel, AIX asm printer.
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llvm-svn: 15662
2004-08-11 07:40:04 +00:00
Chris Lattner
2903154b98
Fix a case where constantexprs could leak into the PPC isel.
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llvm-svn: 15661
2004-08-11 07:34:50 +00:00
Nate Begeman
c07b78eaa2
Fix 255.vortex by using getClassB instead of getClass
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llvm-svn: 15648
2004-08-11 03:30:55 +00:00
Misha Brukman
694c9ff1a6
Breaking up the PowerPC target into 32- and 64-bit subparts, Part III: the rest.
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llvm-svn: 15636
2004-08-11 00:11:25 +00:00
Misha Brukman
47c87a8808
Breaking up the PowerPC target into 32- and 64-bit subparts: Part II: 64-bit.
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llvm-svn: 15635
2004-08-11 00:10:41 +00:00
Misha Brukman
6713996576
Breaking up the PowerPC target into 32- and 64-bit subparts, Part I: 32-bit.
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llvm-svn: 15634
2004-08-11 00:09:42 +00:00
Misha Brukman
3f79fbe93f
Renamed PPC32 (namespace for regs, opcodes) to PPC to include 64-bit targets
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llvm-svn: 15631
2004-08-10 22:47:03 +00:00
Misha Brukman
aa0e45b8d8
* Fix file header to use tablegen emacs mode instead of c++
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* Wrap long line to 80 cols
llvm-svn: 15630
2004-08-10 21:24:44 +00:00
Nate Begeman
b74ee41754
Fix casts of float to unsigned long
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Replace STDX (store 64 bit int indexed) with STFDX (store double indexed)
Fix latent bug in indexed load generation
Generate indexed loads and stores in many more cases
llvm-svn: 15626
2004-08-10 20:42:36 +00:00
Misha Brukman
861d6cdcb1
DForm 5/6 extended mneumonics take 3 arguments.
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llvm-svn: 15620
2004-08-10 19:03:31 +00:00
Misha Brukman
fe7a08a933
Fix DForm_4: format is `op r, r, i'
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llvm-svn: 15613
2004-08-10 18:07:55 +00:00
Misha Brukman
d345cd9090
Stub definition of the PowerPC CodeEmitter class; this isn't functional (yet).
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llvm-svn: 15600
2004-08-09 23:03:59 +00:00
Misha Brukman
3da9167cc4
CodePrinter -> AsmPrinter
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llvm-svn: 15599
2004-08-09 22:27:45 +00:00
Misha Brukman
65afbbca70
Remove ClassPrefix variable as it's no longer used.
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llvm-svn: 15586
2004-08-09 19:13:29 +00:00
Misha Brukman
1547d8e8d0
Define a ClassPrefix for PowerPC.
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llvm-svn: 15580
2004-08-09 17:46:26 +00:00
Misha Brukman
eb8758cc0c
Generate a code emitter for PowerPC as well, this will be used in the JIT.
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llvm-svn: 15578
2004-08-09 17:24:32 +00:00
Misha Brukman
ba013330a8
Use instruction formats as defined in the PowerPC ISA manual
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llvm-svn: 15577
2004-08-09 17:24:04 +00:00
Reid Spencer
8bf21cd984
Fix stack size processing now that the return address isn't an implied
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push onto the top of the stack like x86, which uses the local area
offset. This will allow the removal of PowerPCPEI.cpp soon.
llvm-svn: 15573
2004-08-09 01:24:32 +00:00
Chris Lattner
bbf11b1e1d
Changes commited for Nate Begeman:
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Use a PowerPC specific prolog epilog inserter to control where spilled
callee save regs are placed on the stack.
Get rid of implicit return address stack slot, save return address reg
(LR) in appropriate slot
Improve code generated for functions that don't have calls or access
globals
Note from Chris: PowerPCPEI will eventually be eliminated, once the
functionality is merged into CodeGen/PrologEpilogInserter.cpp
llvm-svn: 15536
2004-08-06 06:58:50 +00:00
John Criswell
451362550e
Added Louis Gerbarg. Louis is given credit in the CREDITS.TXT file, so I
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assume Louis also holds copyright.
llvm-svn: 15534
2004-08-05 23:46:27 +00:00
John Criswell
45cf7f6a0f
Add additional copyright notice for the PowerPC backend.
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Thanks Nate!
llvm-svn: 15531
2004-08-05 20:36:00 +00:00