llvm-mirror/lib/Target/PowerPC
Nate Begeman 9705f413b7 Remove dead code
llvm-svn: 15750
2004-08-15 00:31:02 +00:00
..
LICENSE.TXT Added Louis Gerbarg. Louis is given credit in the CREDITS.TXT file, so I 2004-08-05 23:46:27 +00:00
Makefile Add generation of asm writer from tablegen files to Makefile 2004-08-14 22:06:38 +00:00
PowerPC.h Replace PowerPCPEI.cpp with target independant PrologEpilogInserter 2004-08-14 22:16:36 +00:00
PowerPC.td * Fix file header to use tablegen emacs mode instead of c++ 2004-08-10 21:24:44 +00:00
PowerPCBranchSelector.cpp Renamed PPC32 (namespace for regs, opcodes) to PPC to include 64-bit targets 2004-08-10 22:47:03 +00:00
PowerPCFrameInfo.h Replace PowerPCPEI.cpp with target independant PrologEpilogInserter 2004-08-14 22:16:36 +00:00
PowerPCInstrBuilder.h * Wrap long lines (comments and code) 2004-07-07 20:01:36 +00:00
PowerPCInstrFormats.td Add some more 64 bit instructions we need for the PowerPC-64 ISel to the tablegen files 2004-08-13 02:19:26 +00:00
PowerPCInstrInfo.cpp Set the is64bit flag and propagate it to PowerPCRegisterInfo 2004-08-11 23:45:43 +00:00
PowerPCInstrInfo.h Set the is64bit flag and propagate it to PowerPCRegisterInfo 2004-08-11 23:45:43 +00:00
PowerPCInstrInfo.td Print mflr using the asmwriter generator 2004-08-14 23:27:29 +00:00
PowerPCJITInfo.h Breaking up the PowerPC target into 32- and 64-bit subparts, Part III: the rest. 2004-08-11 00:11:25 +00:00
PowerPCRegisterInfo.cpp Add support for frame pointers, and large offsets from stack and frame pointers. Adopt elimination of MachineFunction& arg from eliminateFrameIndex. 2004-08-14 22:13:58 +00:00
PowerPCRegisterInfo.h Add support for frame pointers, and large offsets from stack and frame pointers. Adopt elimination of MachineFunction& arg from eliminateFrameIndex. 2004-08-14 22:13:58 +00:00
PowerPCRegisterInfo.td Mark R2 as available for allocation on Darwin/PPC32, but not AIX/PPC64 2004-08-12 00:10:01 +00:00
PowerPCTargetMachine.cpp Replace PowerPCPEI.cpp with target independant PrologEpilogInserter 2004-08-14 22:16:36 +00:00
PowerPCTargetMachine.h Replace PowerPCPEI.cpp with target independant PrologEpilogInserter 2004-08-14 22:16:36 +00:00
PPC32AsmPrinter.cpp Remove dead code 2004-08-15 00:31:02 +00:00
PPC32CodeEmitter.cpp Breaking up the PowerPC target into 32- and 64-bit subparts, Part I: 32-bit. 2004-08-11 00:09:42 +00:00
PPC32ISelSimple.cpp Fix handling of FP constants with single precision, and loading of internal linkage function addresses 2004-08-14 22:11:38 +00:00
PPC32JITInfo.h Clean up 32/64bit and Darwin/AIX split. Next steps: 64 bit ISel, AIX asm printer. 2004-08-11 07:40:04 +00:00
PPC32TargetMachine.h Remove an unneeded header and forward declaration 2004-08-13 09:33:17 +00:00
PPC64AsmPrinter.cpp * Print out full names for non-GPR or -FPR registers 2004-08-12 03:28:47 +00:00
PPC64CodeEmitter.cpp Breaking up the PowerPC target into 32- and 64-bit subparts: Part II: 64-bit. 2004-08-11 00:10:41 +00:00
PPC64ISelSimple.cpp Longs are in one register on PowerPC 64; use appropriate instructions to operate on them. 2004-08-13 02:20:47 +00:00
PPC64JITInfo.h Clean up 32/64bit and Darwin/AIX split. Next steps: 64 bit ISel, AIX asm printer. 2004-08-11 07:40:04 +00:00
PPC64TargetMachine.h Clean up 32/64bit and Darwin/AIX split. Next steps: 64 bit ISel, AIX asm printer. 2004-08-11 07:40:04 +00:00
README.txt Replace PowerPCPEI.cpp with target independant PrologEpilogInserter 2004-08-14 22:16:36 +00:00

TODO:
* implement cast fp to bool
* implement algebraic shift right long by reg
* implement scheduling info
* implement powerpc-64 for darwin
* implement powerpc-64 for aix
* fix rlwimi generation to be use-and-def
* fix ulong to double:
  floatdidf assumes signed longs.  so if the high but of a ulong
  just happens to be set, you get the wrong sign.  The fix for this
  is to call cmpdi2 to compare against zero, if so shift right by one,
  convert to fp, and multiply by (add to itself).  the sequence would
  look like:
  {r3:r4} holds ulong a;
  li r5, 0
  li r6, 0 (set r5:r6 to ulong 0)
  call cmpdi2 ==> sets r3 <, =, > 0
  if r3 > 0
  call floatdidf as usual
  else
  shift right ulong a, 1 (we could use emitShift)
  call floatdidf
  fadd f1, f1, f1 (fp left shift by 1)
* setCondInst needs to know branchless versions of seteq/setne/etc
* cast elimination pass (uint -> sbyte -> short, kill the byte -> short)
* should hint to the branch select pass that it doesn't need to print the
  second unconditional branch, so we don't end up with things like:
	b .LBBl42__2E_expand_function_8_674	; loopentry.24
	b .LBBl42__2E_expand_function_8_42	; NewDefault
	b .LBBl42__2E_expand_function_8_42	; NewDefault

Currently failing tests:
* SingleSource
  `- Regression
  |  `- casts (ulong to fp failure)
  `- Benchmarks
  |  `- Shootout-C++ : most programs fail, miscompilations
  `- UnitTests
  |  `- C++Catch
  |  `- SimpleC++Test
  |  `- ConditionalExpr (also C++)
* MultiSource
  |- Applications
  |  `- burg: miscompilation
  |  `- hbd: miscompilation
  |  `- d (make_dparser): miscompilation
  `- Benchmarks
     `- MallocBench/gs: miscompilation