98927 Commits

Author SHA1 Message Date
Iain Sandoe
99b3d76928 [patch] Adjust behavior of FDE cross-section relocs for targets that don't support abs-differences.
Modern versions of OSX/Darwin's ld (ld64 > 97.17) have an optimisation present that allows the back end to omit relocations (and replace them with an absolute difference) for FDE some text section refs.

This patch allows a backend to opt-in to this behaviour by setting "DwarfFDESymbolsUseAbsDiff".  At present, this is only enabled for modern x86 OSX ports.

test changes by David Fang.

llvm-svn: 198744
2014-01-08 10:22:54 +00:00
Kevin Qin
fd4df4bd7a [AArch64 NEON] Fix generating incorrect value type of NEON_VDUPLANE
when lower build_vector if result value type mismatch with operand
value type.

llvm-svn: 198743
2014-01-08 08:06:14 +00:00
Venkatraman Govindaraju
0e7023f897 [SparcV9] Rename operands in some sparc64 instructions so that TableGen can encode them correctly.
llvm-svn: 198740
2014-01-08 07:47:57 +00:00
Venkatraman Govindaraju
31a117588f [Sparc] Correct the mask for fixup_sparc_br19.
llvm-svn: 198739
2014-01-08 06:46:51 +00:00
Venkatraman Govindaraju
d26e61b5c9 [Sparc] Add support for parsing branch instructions and conditional moves.
llvm-svn: 198738
2014-01-08 06:14:52 +00:00
Lang Hames
24d99bb391 Re-apply r196639: Add support for archives and object file caching under MCJIT.
I believe the bot failures on linux systems were due to overestimating the
alignment of object-files within archives, which are only guaranteed to be
two-byte aligned. I have reduced the alignment in
RuntimeDyldELF::createObjectImageFromFile accordingly.

llvm-svn: 198737
2014-01-08 04:09:09 +00:00
Saleem Abdulrasool
260d9a0786 tests: disable ARM unwinding tests if ARM is unavailable
Appease the buildbots for targets which do not build the ARM support by moving
the ARM specific test into a subdirectory and use the lit configuration to
disable them appropriately.

Thanks to chapuni and thakis for explaining how to do this!

llvm-svn: 198736
2014-01-08 03:44:01 +00:00
Saleem Abdulrasool
3374bbd05c ARM IAS: properly handle expression operands
Operands which involved label arithemetic would previously fail to parse.  This
corrects that by adding the additional case for the shift operand validation.

llvm-svn: 198735
2014-01-08 03:28:14 +00:00
Saleem Abdulrasool
869aa34c78 llvm-readobj: add support for ARM EHABI unwind info
This adds some preliminary support for decoding ARM EHABI unwinding information.
The major functionality that remains from complete support is bytecode
translation.

Each Unwind Index Table is printed out as a separate entity along with its
section index, name, offset, and entries.

Each entry lists the function address, and if possible, the name, of the
function to which it corresponds.  The encoding model, personality routine or
index, and byte code is also listed.

llvm-svn: 198734
2014-01-08 03:28:09 +00:00
Hao Liu
8c08e05c81 Fix a bug about generating undef operand when optimising shuffle vector and insert element in instruction combine.
llvm-svn: 198730
2014-01-08 03:06:15 +00:00
David Woodhouse
5bd74bdaf8 [x86] Kill gratuitous X86_{32,64}TargetMachine subclasses, use X86TargetMachine
llvm-svn: 198720
2014-01-08 00:08:50 +00:00
Rafael Espindola
4dc5af8bc2 Move the llvm mangler to lib/IR.
This makes it available to tools that don't link with target (like llvm-ar).

llvm-svn: 198708
2014-01-07 21:19:40 +00:00
Roman Divacky
5894163dfa In the ELFWriter when writing aliased (.set) symbols dont blindly
take type from the new symbol but merge them so that the type
is never "downgraded".

This is probably quite rare, except for IFUNC symbols which
we used to misassemble, losing the IFUNC type.

Fixes #18372.

llvm-svn: 198706
2014-01-07 20:17:03 +00:00
Cameron McInally
92630ae213 Fix uninitialized variable warning in DataLayout.
llvm-svn: 198702
2014-01-07 19:51:38 +00:00
Rafael Espindola
492c4c1202 Don't assert with private type info variables.
With the gnu objc runtime private strings are used. Since we only need to
produce a unique label, the fix is to just drop the asserts.

llvm-svn: 198701
2014-01-07 19:38:47 +00:00
Benjamin Kramer
07dd66b494 Emit arange padding with a single directive.
llvm-svn: 198700
2014-01-07 19:28:14 +00:00
David Peixotto
6a38357783 Add ARM fconsts/fconstd aliases for vmov.f32/vmov.f64
This commit adds the pre-UAL aliases of fconsts and fconstd for
vmov.f32 and vmov.f64. They use an InstAlias rather than a
MnemonicAlias to properly support the predicate operand.

We need to support encoded 8-bit constants in order to implement the
pre-UAL fconsts/fconstd aliases for vmov.f32/vmov.f64, so this
commit also fixes parsing of encoded floating point constants used
in vmov.f32/vmov.f64 instructions. Now we can support assembly code
like this:

  fconsts s0, #0x70

which is equivalent to vmov.f32 s0, #1.0.

Most of the code was already in place to support this feature.
Previously the code was trying to accept encoded 8-bit float
constants for the vmov.f32/vmov.f64 instructions.  It looks like the
support for parsing encoded floats was lost in a refactoring in
commit r148556 and we did not have any tests in place to catch it.

The change in this commit is to keep the parsed value as a 32-bit
float instead of a 64-bit double because that is what the isFPImm()
function expects to find. There is no loss of precision by using a
32-bit float here because we are still limited to an 8-bit encoded
value in the end.

Additionally, we explicitly reject encoded 8-bit floats for
vmovf.32/64. This is the same as the current behavior, but we now do
it explicitly rather than accidently.

llvm-svn: 198697
2014-01-07 18:19:23 +00:00
Logan Chien
4508cd2773 [arm] Fix an incorrect comment in ARMUnwindOpAsm.h.
llvm-svn: 198696
2014-01-07 17:47:25 +00:00
Chandler Carruth
c991958746 Try to fix the windows build. The comments in other files don't seem to
be quite accurate. =]

llvm-svn: 198690
2014-01-07 12:37:13 +00:00
Chandler Carruth
7aa902a488 Move the LLVM IR asm writer header files into the IR directory, as they
are part of the core IR library in order to support dumping and other
basic functionality.

Rename the 'Assembly' include directory to 'AsmParser' to match the
library name and the only functionality left their -- printing has been
in the core IR library for quite some time.

Update all of the #includes to match.

All of this started because I wanted to have the layering in good shape
before I started adding support for printing LLVM IR using the new pass
infrastructure, and commandline support for the new pass infrastructure.

llvm-svn: 198688
2014-01-07 12:34:26 +00:00
Chandler Carruth
87f14b4eec Re-sort all of the includes with ./utils/sort_includes.py so that
subsequent changes are easier to review. About to fix some layering
issues, and wanted to separate out the necessary churn.

Also comment and sink the include of "Windows.h" in three .inc files to
match the usage in Memory.inc.

llvm-svn: 198685
2014-01-07 11:48:04 +00:00
Hao Liu
2324cab69b [AArch64]Add support to spill/fill D tuples such as DPair/DTriple/DQuad. There is no test cases for D tuple as the original test cases are too large. As the spill/fill of the D tuple is similar to the Q tuple, the correctness can be guaranteed.
llvm-svn: 198684
2014-01-07 10:50:43 +00:00
NAKAMURA Takumi
ed96e58eb4 [CMake] Introduce llvm_update_compile_flags(target_name) to update compile flags in target properties.
FIXME: Just add_unittest() is using it.
FIXME: Cooperate with source properties.
llvm-svn: 198683
2014-01-07 10:24:14 +00:00
Hao Liu
bbb265cfee [AArch64]Add support to copy D tuples such as DPair/DTriple/DQuad and Q tuples such as QPair/QTriple/QQuad. There is no test case for D tuple as the original test cases are too large. As the copy of the D tuple is similar to the Q tuple, the correctness can be guaranteed.
llvm-svn: 198682
2014-01-07 10:00:03 +00:00
Venkatraman Govindaraju
69760d5a12 [Sparc] Add support for parsing sparc asm modifiers such as %hi, %lo etc.,
Also, correct the offsets for FixupsKindInfo.

llvm-svn: 198681
2014-01-07 08:00:49 +00:00
Andrew Trick
d008071ce2 Fix for PR18396: Assertion: MO->isDead "Cannot fold physreg def".
InlineSpiller::foldMemoryOperand needs to handle undef call operands.

llvm-svn: 198679
2014-01-07 07:31:10 +00:00
Andrew Trick
bb6ce38639 Reapply r198654 "indvars: sink truncates outside the loop."
This doesn't seem to have actually broken anything. It was paranoia
on my part. Trying again now that bots are more stable.

This is a follow up of the r198338 commit that added truncates for
lcssa phi nodes. Sinking the truncates below the phis cleans up the
loop and simplifies subsequent analysis within the indvars pass.

llvm-svn: 198678
2014-01-07 06:59:12 +00:00
Kevin Qin
cb6af368ab [AArch64 NEON] Fixed incorrect immediate used in BIC instruction.
llvm-svn: 198675
2014-01-07 05:10:47 +00:00
Saleem Abdulrasool
90329d7060 ARM IAS: allow more depth in contextual diagnostics
Switch the context to be SmallVectors.  This allows for saving additional
context when providing previous emission sites.

llvm-svn: 198665
2014-01-07 02:29:00 +00:00
Saleem Abdulrasool
58df683088 ARM IAS: refactor unwind context
Move the unwinding context for the ARM IAS into a helper class.  This is purely
a structural refactoring.  A follow up change allows for recording additional
depth to improve diagnostics.

llvm-svn: 198664
2014-01-07 02:28:55 +00:00
Saleem Abdulrasool
ce9f4e943f ARM Streamer: print out tag names
If using verbose asm, print out the friendly name of the tag if possible.

llvm-svn: 198663
2014-01-07 02:28:50 +00:00
Saleem Abdulrasool
9005119e13 ARM IAS: improve .eabi_attribute handling
Parse tag names as well as expressions.  The former is part of the
specification, the latter is for improved compatibility with the GNU assembler.
Fix attribute value handling to be comformant to the specification.

llvm-svn: 198662
2014-01-07 02:28:42 +00:00
Saleem Abdulrasool
3d4218e538 MCParser: introduce Note and use it for ARM AsmParser
Introduce a new virtual method Note into the AsmParser.  This completements the
existing Warning and Error methods.  Use the new method to clean up the output
of the unwind routines in the ARM AsmParser.

llvm-svn: 198661
2014-01-07 02:28:31 +00:00
Mingjie Xing
df983a7565 Fix comment of findGCD.
llvm-svn: 198660
2014-01-07 01:54:16 +00:00
Andrew Trick
6d854ef50f Revert "indvars: sink truncates outside the loop."
This reverts commit r198654.

One of the bots reported a SciMark failure.

llvm-svn: 198659
2014-01-07 01:50:58 +00:00
Venkatraman Govindaraju
a9c093fcc8 [Sparc] Add support for parsing memory operands in sparc AsmParser.
llvm-svn: 198658
2014-01-07 01:49:11 +00:00
Andrew Trick
7621f7c6a3 indvars: sink truncates outside the loop.
This is a follow up of the r198338 commit that added truncates for
lcssa phi nodes. Sinking the truncates below the phis cleans up the
loop and simplifies subsequent analysis within the indvars pass.

llvm-svn: 198654
2014-01-07 01:02:55 +00:00
Andrew Trick
7236fefab6 80 col. comment.
llvm-svn: 198653
2014-01-07 01:02:52 +00:00
Jack Carter
4a5987eef3 [Mips] TargetStreamer Support for .abicalls and .set pic0.
This patch adds .abicalls and .set pic0 support which
affects the ELF ABI and its flags. In addition the patch uses
a common interface for both the MipsTargetSteamer and
MipsObjectStreamer that both the integrated and standalone
assemblers will use for the output for these directives.

llvm-svn: 198646
2014-01-06 23:27:31 +00:00
Kevin Enderby
f3e817fa09 For the 'C' disassembler API, add a new ReferenceType for the
SymbolLookUp() call back to return a demangled C++ name to
be used as a comment.

For example darwin's otool(1) program the uses the llvm
disassembler now can produce disassembly like:

callq   __ZNK4llvm6Target20createMCDisassemblerERKNS_15MCSubtargetInfoE ## llvm::Target::createMCDisassembler(llvm::MCSubtargetInfo const&) const

Also fix a bug in LLVMDisasmInstruction() that was not flushing
the raw_svector_ostream for the disassembled instruction string
before copying it to the output buffer that was causing truncation
of the output.

rdar://10173828

llvm-svn: 198637
2014-01-06 22:08:08 +00:00
Rafael Espindola
858e3503c4 Improve documentation of the 'a' specifier and the '<abi>:<pref>' align pair.
llvm-svn: 198636
2014-01-06 21:40:24 +00:00
Matt Arsenault
5f69fecf82 Fix c++ mode comments
llvm-svn: 198632
2014-01-06 19:52:42 +00:00
Andrew Trick
12dfc32452 Reapply r198478 "Fix PR18361: Invalidate LoopDispositions after LoopSimplify hoists things."
Now with a fix for PR18384: ValueHandleBase::ValueIsDeleted.

We need to invalidate SCEV's loop info when we delete a block, even if no values are hoisted.

llvm-svn: 198631
2014-01-06 19:43:14 +00:00
Jean-Daniel Dupas
7d2d78de8b Introduce a cmake LLVM_ENABLE_LIBCXX build parameter to compile using libc++ instead of the system default
Summary:
This parameter is required to build C++11 projects (like lld or lldb) on OS X as the default STL does not provide c++ classes.


CC: llvm-commits, triton

Differential Revision: http://llvm-reviews.chandlerc.com/D2381

llvm-svn: 198625
2014-01-06 18:27:27 +00:00
Rafael Espindola
a32cd9b466 Remove dead code.
llvm-svn: 198624
2014-01-06 18:14:34 +00:00
Tim Northover
e0e3fee19b ARM MachO: sort out isTargetDarwin/isTargetIOS/... checks.
The ARM backend has been using most of the MachO related subtarget
checks almost interchangeably, and since the only target it's had to
run on has been IOS (which is all three of MachO, Darwin and IOS) it's
worked out OK so far.

But we'd like to support embedded targets under the "*-*-none-macho"
triple, which means everything starts falling apart and inconsistent
behaviours emerge.

This patch should pick a reasonably sensible set of behaviours for the
new triple (and any others that come along, with luck). Some choices
were debatable (notably FP == r7 or r11), but we can revisit those
later when deficiencies become apparent.

llvm-svn: 198617
2014-01-06 14:28:05 +00:00
Robert Lytton
3d4bb0d4e4 XCore Target: correct callee save register spilling when callsUnwindInit is true.
llvm-svn: 198616
2014-01-06 14:21:12 +00:00
Robert Lytton
69e4de31bf XCore target: Lower EH_RETURN
llvm-svn: 198615
2014-01-06 14:21:07 +00:00
Robert Lytton
2c10e542b0 XCore target: Lower FRAME_TO_ARGS_OFFSET
This requires a knowledge of the stack size which is not known until
the frame is complete, hence the need for the XCoreFTAOElim pass
which lowers the XCoreISD::FRAME_TO_ARGS_OFFSET instrution into its
final form.

llvm-svn: 198614
2014-01-06 14:21:00 +00:00
Robert Lytton
9059c1d570 XCore target: Lower RETURNADDR
Only handles a depth of zero (the same as FRAMEADDR)

llvm-svn: 198613
2014-01-06 14:20:53 +00:00