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17918 Commits

Author SHA1 Message Date
Devang Patel
2dabb16eac Support 'I' inline asm constraint. 
llvm-svn: 35129
 2007-03-17 00:13:28 +00:00
Lauro Ramos Venancio
f756184c5e Only ARMv6 has BSWAP. 
Fix MultiSource/Applications/aha test.

llvm-svn: 35128
 2007-03-16 22:54:16 +00:00
Evan Cheng
77099bef05 Turn on GEP index sinking by default. 
llvm-svn: 35127
 2007-03-16 18:32:30 +00:00
Evan Cheng
449900b988 Stupid bug. 
llvm-svn: 35126
 2007-03-16 17:50:20 +00:00
Bill Wendling
8ced23ee5a And now support for MMX logical operations. 
llvm-svn: 35125
 2007-03-16 09:44:46 +00:00
Evan Cheng
c3e7d4b884 Sink a binary expression into its use blocks if it is a loop invariant 
computation used as GEP indexes and if the expression can be folded into
target addressing mode of GEP load / store use types.

llvm-svn: 35123
 2007-03-16 08:46:27 +00:00
Evan Cheng
4858c6f781 Added isLegalAddressExpression(). Only allows X +/- C for now. 
llvm-svn: 35122
 2007-03-16 08:43:56 +00:00
Evan Cheng
ce8b779c6c Added isLegalAddressExpression hook to test if the given expression can be 
folded into target addressing mode for the given type.

llvm-svn: 35121
 2007-03-16 08:42:32 +00:00
Nick Lewycky
de44438e24 Add more comments and update to new asm syntax. 
Add new micro-optimizations.

Add icmp predicate snuggling. Given %x ULT 4, "icmp ugt %x, 2" becomes
"icmp eq %x, 3". This doesn't apply in any non-trivial cases yet due to missing
support for NE values in ValueRanges.

llvm-svn: 35119
 2007-03-16 02:37:39 +00:00
Bill Wendling
feaff80149 Multiplication support for MMX. 
llvm-svn: 35118
 2007-03-15 21:24:36 +00:00
Evan Cheng
ab9145d617 Debugging output stuff. 
llvm-svn: 35117
 2007-03-15 21:19:28 +00:00
Evan Cheng
dc6ba035bc Estimate a cost using the possible number of scratch registers required and use 
it as a late BURR scheduling tie-breaker.
Intuitively, it's good to push down instructions whose results are liveout so
their long live ranges won't conflict with other values which are needed inside
the BB. Further prioritize liveout instructions by the number of operands which
are calculated within the BB.

llvm-svn: 35109
 2007-03-14 22:43:40 +00:00
Evan Cheng
00edaa08b5 Under X86-64 large code model, do not emit 32-bit pc relative calls. 
llvm-svn: 35108
 2007-03-14 22:11:11 +00:00
Evan Cheng
fc80b5b712 Notes about codegen issues. 
llvm-svn: 35107
 2007-03-14 21:03:53 +00:00
Evan Cheng
50a0af3b57 Clean up. 
llvm-svn: 35105
 2007-03-14 20:20:19 +00:00
Evan Cheng
2617c8dd3a Oops. 
llvm-svn: 35104
 2007-03-14 19:44:58 +00:00
Evan Cheng
371b8e8fa9 X86-64 JIT is in large code model. Need stubs for direct calls. 
llvm-svn: 35097
 2007-03-14 10:51:55 +00:00
Evan Cheng
1092e481ce x86-64 JIT stub codegen. 
llvm-svn: 35096
 2007-03-14 10:48:08 +00:00
Evan Cheng
15de6714a4 Preliminary support for X86-64 JIT stub codegen. 
llvm-svn: 35095
 2007-03-14 10:44:30 +00:00
Zhou Sheng
5c6399dab7 ShiftAmt might equal to zero. Handle this situation. 
llvm-svn: 35094
 2007-03-14 09:07:33 +00:00
Zhou Sheng
4415c2647e Enable KnownZero/One.clear(). 
llvm-svn: 35093
 2007-03-14 03:21:24 +00:00
Evan Cheng
399f56eac2 Try schedule def + use closer whne Sethi-Ullman numbers are the same. 
e.g.
t1 = op t2, c1
t3 = op t4, c2
and the following instructions are both ready.
t2 = op c3
t4 = op c4

Then schedule t2 = op first.
i.e.
t4 = op c4
t2 = op c3
t1 = op t2, c1
t3 = op t4, c2

This creates more short live intervals which work better with the register
allocator.

llvm-svn: 35089
 2007-03-13 23:25:11 +00:00
Evan Cheng
7cbde8351a AM2 can match 2^n +/- 1. e.g. ldr r3, [r2, r2, lsl #2] 
llvm-svn: 35088
 2007-03-13 21:05:54 +00:00
Evan Cheng
7b24b3e474 Zero is always a legal AM immediate. 
llvm-svn: 35087
 2007-03-13 20:37:59 +00:00
Evan Cheng
bd964bd8eb Correct type info for isLegalAddressImmediate() check. 
llvm-svn: 35086
 2007-03-13 20:34:37 +00:00
Nicolas Geoffray
9c77df75ea Stack and register alignment of call arguments in the ELF ABI 
llvm-svn: 35083
 2007-03-13 15:02:46 +00:00
Chris Lattner
efc2339bd7 ifdef out some dead code. 
Fix PR1244 and Transforms/InstCombine/2007-03-13-CompareMerge.ll

llvm-svn: 35082
 2007-03-13 14:27:42 +00:00
Zhou Sheng
7cf2811ab3 For expression like 
"APInt::getAllOnesValue(ShiftAmt).zextOrCopy(BitWidth)",
to handle ShiftAmt == BitWidth situation, use zextOrCopy() instead of
zext().

llvm-svn: 35080
 2007-03-13 06:40:59 +00:00
Zhou Sheng
14cef9ec74 In APInt version ComputeMaskedBits(): 
1. Ensure VTy, KnownOne and KnownZero have same bitwidth.
  2. Make code more efficient.

llvm-svn: 35078
 2007-03-13 02:23:10 +00:00
Evan Cheng
92712d4884 Implement getTargetLowering() or else LSR won't be using ARM specific hooks. 
llvm-svn: 35077
 2007-03-13 01:20:42 +00:00
Evan Cheng
b2a5499d86 More flexible TargetLowering LSR hooks for testing whether an immediate is a legal target address immediate or scale. 
llvm-svn: 35076
 2007-03-12 23:37:10 +00:00
Evan Cheng
7767159f08 Updated TargetLowering LSR addressing mode hooks for ARM and Thumb. 
llvm-svn: 35075
 2007-03-12 23:30:29 +00:00
Evan Cheng
06d83c8fce More flexible TargetLowering LSR hooks for testing whether an immediate is a legal target address immediate or scale. 
llvm-svn: 35074
 2007-03-12 23:29:01 +00:00
Evan Cheng
0eeb8b59eb More flexible TargetLowering LSR hooks for testing whether an immediate is 
a legal target address immediate or scale.

llvm-svn: 35073
 2007-03-12 23:28:50 +00:00
Evan Cheng
1fcdd7e1e5 Use new TargetLowering addressing modes hooks. 
llvm-svn: 35072
 2007-03-12 23:27:37 +00:00
Evan Cheng
4224fa3617 Stupid bug: SSE2 supports v2i64 add / sub. 
llvm-svn: 35070
 2007-03-12 22:58:52 +00:00
Reid Spencer
7be576b4b0 Revert the last patch as it violates the conditions of sext/zext. 
llvm-svn: 35068
 2007-03-12 18:37:25 +00:00
Jeff Cohen
4e667fd766 Unbreak C++ build. 
llvm-svn: 35067
 2007-03-12 17:57:00 +00:00
Jeff Cohen
91930bc4d4 Unbreak VC++ build. Do not use identifiers starting with _ as they are reserved and 
can collide with system defined names.  Windows defines _BB, for example.

llvm-svn: 35066
 2007-03-12 17:56:27 +00:00
Zhou Sheng
0145067d85 For APInt::z/sext(width), if width == BitWidth, just return *this. 
llvm-svn: 35065
 2007-03-12 17:47:45 +00:00
Reid Spencer
d59425085f Add an APInt version of SimplifyDemandedBits. 
Patch by Zhou Sheng.

llvm-svn: 35064
 2007-03-12 17:25:59 +00:00
Reid Spencer
b18f916bbe Add an APInt version of ShrinkDemandedConstant. 
Patch by Zhou Sheng.

llvm-svn: 35063
 2007-03-12 17:15:10 +00:00
Zhou Sheng
c8583ff888 Avoid to assert on "(KnownZero & KnownOne) == 0". 
llvm-svn: 35062
 2007-03-12 16:54:56 +00:00
Zhou Sheng
c9c53385b8 In function ComputeMaskedBits(): 
1. Replace getSignedMinValue() with getSignBit() for better code readability.
  2. Replace APIntOps::shl() with operator<<= for convenience.
  3. Make APInt construction more effective.

llvm-svn: 35060
 2007-03-12 05:44:52 +00:00
Nick Lewycky
8a08bcfbe7 Add value ranges. Currently inefficient in both execution time and 
optimization power.

llvm-svn: 35058
 2007-03-10 18:12:48 +00:00
Anton Korobeynikov
0c2d312725 Use range tests in LowerSwitch, where possible 
llvm-svn: 35057
 2007-03-10 16:46:28 +00:00
Nick Lewycky
2af4a3ab17 Add getter methods for the extremes of a ConstantRange. 
llvm-svn: 35056
 2007-03-10 15:54:12 +00:00
Bill Wendling
236cfc4344 Adding more arithmetic operators to MMX. This is an almost exact copy of 
the addition. Please let me know if you have suggestions.

llvm-svn: 35055
 2007-03-10 09:57:05 +00:00
Devang Patel
20b8163ad3 Remove dead comments. 
llvm-svn: 35053
 2007-03-09 23:41:03 +00:00
Devang Patel
8a26f4caa0 Avoid recursion. Use iterative algorithm for RenamePass(). 
llvm-svn: 35052
 2007-03-09 23:39:14 +00:00
Devang Patel
ca60446cb4 Increment iterator now because IVUseShouldUsePostIncValue may remove 
User from the list of I users.

llvm-svn: 35051
 2007-03-09 21:19:53 +00:00
Reid Spencer
75ffe11ca9 Regenerate. 
llvm-svn: 35050
 2007-03-09 21:19:09 +00:00
Evan Cheng
a4e410aa9c Minor stuff. 
llvm-svn: 35049
 2007-03-09 19:46:06 +00:00
Evan Cheng
d7201d12af Add comments about LSR / ARM. 
llvm-svn: 35048
 2007-03-09 19:35:33 +00:00
Evan Cheng
2e6f19d8c8 Unfinished work and ideas related to register scavenger. 
llvm-svn: 35047
 2007-03-09 19:34:51 +00:00
Reid Spencer
f860fd3370 For PR1245: 
Account for the sign bit when computing the number of bits required for
a negative integer literal constant.

llvm-svn: 35046
 2007-03-09 19:26:52 +00:00
Dale Johannesen
10a05b538d apply comments from review of last patch 
llvm-svn: 35045
 2007-03-09 19:18:59 +00:00
Dale Johannesen
23c2498e23 Add some observations from CoreGraphics benchmark. Remove register 
scavenging todo item, since it is now implemented.

llvm-svn: 35044
 2007-03-09 17:58:17 +00:00
Anton Korobeynikov
f8f0ce564c Unbreak mingw32 build 
llvm-svn: 35042
 2007-03-09 11:53:34 +00:00
Evan Cheng
dc9f790abd If a virtual register is already marked alive in this block, that means it is 
alive in one of the successor block. Do not add it to the kill list.

llvm-svn: 35041
 2007-03-09 09:48:56 +00:00
Evan Cheng
e7ba7ee5d8 Print preds / succs BB numbers. 
llvm-svn: 35040
 2007-03-09 08:29:08 +00:00
Evan Cheng
0049744cd8 Avoid variable shadowing. 
llvm-svn: 35039
 2007-03-09 06:02:17 +00:00
Bill Wendling
4e2fff5898 Don't use std::hex. 
llvm-svn: 35038
 2007-03-08 23:37:24 +00:00
Bill Wendling
80cc8c4502 Don't use a cast. It causes an error on some platforms. 
llvm-svn: 35037
 2007-03-08 23:26:50 +00:00
Evan Cheng
7ef8db2fb5 Implement inline asm modifier c. 
llvm-svn: 35035
 2007-03-08 22:42:46 +00:00
Chris Lattner
dfe5b3bd1d implement support for floating point constants used as inline asm memory operands. 
llvm-svn: 35033
 2007-03-08 22:29:47 +00:00
Bill Wendling
5fef3fd7e7 Added "padd*" support for MMX. Added MMX move stuff to X86InstrInfo so that 
moves, loads, etc. are recognized.

llvm-svn: 35031
 2007-03-08 22:09:11 +00:00
Evan Cheng
6445ce2423 Fix a typo. 
llvm-svn: 35030
 2007-03-08 21:59:30 +00:00
Devang Patel
94228897e7 Speed Up Pass Manager. 
- Check Immutableness before searching PreservedSet.
- Avoid unnecessary traversal while setting Last User.

llvm-svn: 35028
 2007-03-08 19:05:01 +00:00
Zhou Sheng
acc59870f7 Fix a bug in function ComputeMaskedBits(). 
llvm-svn: 35027
 2007-03-08 15:15:18 +00:00
Evan Cheng
7d528d089c Putting more constants which do not contain relocations into .literal{4|8|16} 
llvm-svn: 35026
 2007-03-08 08:31:54 +00:00
Chris Lattner
7e516796f6 make this fail even in non-assert builds. 
llvm-svn: 35025
 2007-03-08 07:07:03 +00:00
Chris Lattner
66843dbef9 This appears correct, enable it so we can see perf changes on testers 
llvm-svn: 35024
 2007-03-08 07:03:55 +00:00
Chris Lattner
049f21257d Second half of PR1226. This is currently still disabled, until I have a chance to 
do the correctness/performance analysis testing.

llvm-svn: 35023
 2007-03-08 06:36:54 +00:00
Zhou Sheng
37cb2e2d53 Fix a bug in APIntified ComputeMaskedBits(). 
llvm-svn: 35022
 2007-03-08 05:42:00 +00:00
Evan Cheng
393fd04eb4 Change register allocation order to Dale's suggestion. 
llvm-svn: 35021
 2007-03-08 02:56:40 +00:00
Evan Cheng
2c3e4ab3a6 Bug fix. Not advancing the register scavenger iterator correctly. 
llvm-svn: 35020
 2007-03-08 02:55:08 +00:00
Reid Spencer
c3f0724204 For PR1205: 
Provide an APIntified version of MaskedValueIsZero. This will (temporarily)
cause a "defined but not used" message from the compiler. It will be used
in the next patch in this series.

Patch by Sheng Zhou.

llvm-svn: 35019
 2007-03-08 01:52:58 +00:00
Reid Spencer
6a924d1a1d For PR1205: 
Add a new ComputeMaskedBits function that is APIntified. We'll slowly
convert things over to use this version. When its all done, we'll remove
the existing version.

llvm-svn: 35018
 2007-03-08 01:46:38 +00:00
Evan Cheng
c79408b032 For Darwin, put constant data into .const, .const_data, .literal{4|8|16} 
sections.

llvm-svn: 35017
 2007-03-08 01:25:25 +00:00
Evan Cheng
14b63d89c1 Put constant data to .const, .const_data, .literal{4|8|16} sections. 
llvm-svn: 35016
 2007-03-08 01:07:07 +00:00
Evan Cheng
6bf2f3665e Add ReadOnlySection directive. 
llvm-svn: 35015
 2007-03-08 01:00:38 +00:00
Evan Cheng
7513c95267 Added ContainsRelocations() to check if a constant might only be resolvable at load time. 
llvm-svn: 35014
 2007-03-08 00:59:12 +00:00
Evan Cheng
51c3e53eb7 Only safe to use a call-clobbered or spilled callee-saved register as scratch register. 
llvm-svn: 35010
 2007-03-07 20:30:36 +00:00
Bill Wendling
8f49ba1000 Remove useless pattern fragments. 
llvm-svn: 35009
 2007-03-07 18:23:09 +00:00
Anton Korobeynikov
85d6c1ebad Refactoring of formal parameter flags. Enable properly use of 
zext/sext/aext stuff.

llvm-svn: 35008
 2007-03-07 16:25:09 +00:00
Anton Korobeynikov
a24b167902 Cleanup: make SetCounter an instance variable 
llvm-svn: 35007
 2007-03-07 08:25:02 +00:00
Evan Cheng
2f55532e84 Avoid combining indexed load further. 
llvm-svn: 35005
 2007-03-07 08:07:03 +00:00
Devang Patel
6a56e3c1a0 Now IndVarSimplify is a LoopPass. 
llvm-svn: 35003
 2007-03-07 06:39:01 +00:00
Bill Wendling
3c201ddd02 Properly support v8i8 and v4i16 types. It now converts them to v2i32 for 
load and stores.

llvm-svn: 35002
 2007-03-07 05:43:18 +00:00
Devang Patel
16107bb71b Now LICM is a LoopPass. 
llvm-svn: 35001
 2007-03-07 04:41:30 +00:00
Anton Korobeynikov
090c2d50ea Fix DWARF debugging information on x86/Linux and (hopefully) 
Mingw32/Cygwin targets. This fixes PR978

llvm-svn: 35000
 2007-03-07 02:47:57 +00:00
Evan Cheng
493960579f ARM always use register scavenger. No longer reserves R12. 
llvm-svn: 34999
 2007-03-07 02:46:23 +00:00
Evan Cheng
4e01b11512 Fix some brittle code. Watch out for cases where register scavenger is pointing to deleted instructions. 
llvm-svn: 34998
 2007-03-07 02:38:05 +00:00
Devang Patel
3a24891f80 Now LoopUnroll is a LoopPass. 
llvm-svn: 34996
 2007-03-07 01:38:05 +00:00
Devang Patel
c35610b9f9 Now LoopUnswitch is a LoopPass. 
llvm-svn: 34992
 2007-03-07 00:26:10 +00:00
Evan Cheng
9839628fd1 Fix one more Thumb eliminateFrameIndex bug. 
llvm-svn: 34990
 2007-03-07 00:12:18 +00:00
Reid Spencer
012677ae92 Fix all of last night's JIT failures in Prolangs-C++ by finishing the 
implementation of getConstantValue().

llvm-svn: 34988
 2007-03-06 22:23:15 +00:00
Evan Cheng
63ffd3e17f Register scavenging is now on by default for ARM. 
llvm-svn: 34987
 2007-03-06 22:02:53 +00:00
Evan Cheng
6453ad00d2 Make load / store optimizer use register scavenger. 
llvm-svn: 34986
 2007-03-06 21:59:20 +00:00
Evan Cheng
49e8bd5e17 Minor bug fix. 
llvm-svn: 34985
 2007-03-06 21:58:15 +00:00
Devang Patel
0b82378a28 Now LoopStrengthReduce is a LoopPass. 
llvm-svn: 34984
 2007-03-06 21:14:09 +00:00
Chris Lattner
cf70993bba big endian 32-bit systems (e.g. ppc32) want to return the high reg first, not 
the lo-reg first.  This is fallout from my ppc calling conv change yesterday,
it fixes test/ExecutionEngine/2003-05-06-LivenessClobber.llx

llvm-svn: 34983
 2007-03-06 20:01:06 +00:00
Devang Patel
bee9c51214 Insert loop into LQ before visiting children. 
llvm-svn: 34982
 2007-03-06 19:50:49 +00:00
Anton Korobeynikov
42d0886ca0 Small eye-candy: use asciz directive everywhere, where possible. 
llvm-svn: 34981
 2007-03-06 19:25:02 +00:00
Devang Patel
57322d0462 Use schedulePass() instead of assignPassManager() to add new LPPassManager. 
This ensures that require analysis info is available.

llvm-svn: 34980
 2007-03-06 19:11:25 +00:00
Devang Patel
b44e86318e Add LPPassManager::insertLoop(). 
llvm-svn: 34979
 2007-03-06 19:00:02 +00:00
Bill Wendling
a02d43fbbd Add LOAD/STORE support for MMX. 
llvm-svn: 34978
 2007-03-06 18:53:42 +00:00
Devang Patel
8490ffbcdc LPPassManager::deleteLoopFromQueue() add meat. Cut-n-paste code from 
LoopUnswitch pass.

llvm-svn: 34977
 2007-03-06 18:38:33 +00:00
Evan Cheng
228403bfcb Code clean up. Prepare to use register scavenger. 
llvm-svn: 34976
 2007-03-06 18:02:41 +00:00
Devang Patel
d3cf506865 LPPassManager. Implement preparePassManager() hook. 
llvm-svn: 34975
 2007-03-06 17:59:37 +00:00
Devang Patel
b9e705f09e Keep track of higher level analysis. 
llvm-svn: 34974
 2007-03-06 17:52:53 +00:00
Devang Patel
e3abf559e5 LPPassManager : Add initialization and finalizatino hooks. 
llvm-svn: 34968
 2007-03-06 16:59:03 +00:00
Evan Cheng
b0c0d22f30 Minor interface change. 
llvm-svn: 34967
 2007-03-06 10:05:14 +00:00
Evan Cheng
7c90fb2d67 Scavenge a register using the register scavenger when needed. 
llvm-svn: 34966
 2007-03-06 10:03:56 +00:00
Evan Cheng
73678177cd If target decides to create an emergency spill slot, make sure it's closest to SP or frame pointer. 
llvm-svn: 34965
 2007-03-06 10:02:38 +00:00
Evan Cheng
077516f441 Register scavenger is now capable of scavenging. It spills a register whose use of furthest away to make it available. 
llvm-svn: 34964
 2007-03-06 10:01:25 +00:00
Anton Korobeynikov
6da6c8c48b Use new SDIselParamAttr enumeration. This removes "magick" constants 
from formal attributes' flags processing.

llvm-svn: 34963
 2007-03-06 08:12:33 +00:00
Anton Korobeynikov
4558f01db9 Enumerate SDISel formal parameter attributes. Make use of new 
enumeration.

llvm-svn: 34960
 2007-03-06 06:10:33 +00:00
Anton Korobeynikov
d0375d0852 Implement PR1240 
llvm-svn: 34959
 2007-03-06 05:32:48 +00:00
Reid Spencer
cab64ae896 1. Make StoreValueToMemory a little more efficient by not requiring caller 
to make a copy of the GenericValue.
2. Fix a copy & paste bug in StoreValueToMemory where 64-bit values were
   truncated to 32

llvm-svn: 34958
 2007-03-06 05:03:16 +00:00
Reid Spencer
5816281df1 Fix some thinko's in the last patch. PtrSize has to be in bits and we 
might need to zext not just trunc the value.

llvm-svn: 34955
 2007-03-06 03:46:41 +00:00
Reid Spencer
854b342a38 Fix a bug in IntToPtr. Truncating to 64-bits only works if the integer 
is larger. Adjust so that it truncates to pointer width, only if necessary.

llvm-svn: 34954
 2007-03-06 03:41:50 +00:00
Reid Spencer
3b08509917 Simplify code as a result of the change in GenericValue to have a single 
integer field of type APInt instead of different sized integer fields.

llvm-svn: 34952
 2007-03-06 03:11:31 +00:00
Reid Spencer
d333ccc051 Radically simplify execution. This patch gets rid of all the special 
handling for integer of various sizes. GenericValue now has just a single
integer field of type APInt. We use its facilities directly in the
execution of all instructions.

llvm-svn: 34951
 2007-03-06 03:09:31 +00:00
Reid Spencer
ccb2a63443 Adjust and simplify external function processing now that GenericValue has 
a single integer field of type APInt.

llvm-svn: 34950
 2007-03-06 03:08:12 +00:00
Reid Spencer
7985dd51a2 APInt's are no longer allocated on the heap because they are direct 
members of GenericValue. Consequently the code to clean them up isn't
needed.

llvm-svn: 34948
 2007-03-06 03:06:48 +00:00
Reid Spencer
0e27441b52 Remove the insufficient code in Interpreter::create that computed the 
Target DataLayout incorrectly. For now, we'll trust that the module has
got the correct DataLayout. In the future, this needs to be changed to
tell the TargetData to be "current host".

llvm-svn: 34947
 2007-03-06 03:05:57 +00:00
Reid Spencer
6243e2253d Simplify things significantly because GenericValue now has a single integer 
field, of type APInt, instead of multiple integer fields. Also, get rid of
the special endianness code in StoreValueToMemory and LoadValueToMemory.
ExecutionEngine is always used to execute on the host platform so this is
now unnecessary.

llvm-svn: 34946
 2007-03-06 03:04:04 +00:00
Devang Patel
e4da6fa801 Use std::deque to manage loop queue inside LPPassManager. 
llvm-svn: 34943
 2007-03-06 02:30:46 +00:00
Devang Patel
45343b04b3 Keep track of inherited analysis. For example, if a loop pass does not 
preserve dominator info then it should update parent FPPassManager's
available analysis info to reflect this.

llvm-svn: 34942
 2007-03-06 01:55:46 +00:00
Devang Patel
edbde240be Add preparePassManager() hook. This allows each pass to check whether 
current active pass manager is appropriate or not.

A loop pass may consider current LPPassManager in appropraite if loop
pass is not preserving analysis information that is used by other
passes managed by current LPPassManager. In such situation, loop pass
can pop current LPPassManager from the PMStack using this  hook
and use new LPPassManager for itself.

llvm-svn: 34941
 2007-03-06 01:06:16 +00:00
Chris Lattner
26a5492049 Switch PPC return lower to use an autogenerated CC description. 
llvm-svn: 34940
 2007-03-06 00:59:59 +00:00
Reid Spencer
db1c09aef1 Remove an unnecessary if statement and adjust indentation. 
llvm-svn: 34939
 2007-03-05 23:36:13 +00:00
Bill Wendling
c52174dee3 Add the emms intrinsic for MMX support. 
llvm-svn: 34938
 2007-03-05 23:09:45 +00:00
Devang Patel
79495d839e Current pass manager, not the parent pass manager, assumes the role of 
last user when one of the managed pass uses info provided by parent pass
manager.

This was exposed by LPPassManager work.

llvm-svn: 34936
 2007-03-05 22:57:49 +00:00
Devang Patel
6668a341ae Avoid constructing std::strings unless pass debugging is ON. 
llvm-svn: 34933
 2007-03-05 20:01:30 +00:00
Devang Patel
ca90313b39 Account for time consumed by releaseMemory() properly. 
llvm-svn: 34932
 2007-03-05 18:20:51 +00:00
Lauro Ramos Venancio
3f855f6a54 Use init_array/fini_array sections for static contructors/destructors when the ABI is AAPCS. 
Fix SingleSource/Regression/C/ConstructorDestructorAttributes test on arm-linux-gnueabi.

llvm-svn: 34931
 2007-03-05 17:59:58 +00:00
Chris Lattner
b0de2b2a9c This is the first major step of implementing PR1226. We now successfully 
scalarrepl things down to elements, but mem2reg can't promote elements that
are memset/memcpy'd.  Until then, the code is disabled "0 &&".

llvm-svn: 34924
 2007-03-05 07:52:57 +00:00
Jeff Cohen
01cb8d6857 Ensure 64-bit correctness. 
llvm-svn: 34923
 2007-03-05 05:45:08 +00:00
Jeff Cohen
5506bc49f9 Implement memoryLimit on Windows. 
llvm-svn: 34922
 2007-03-05 05:22:08 +00:00
Chris Lattner
4dfdbab24b fix a subtle bug that caused an MSVC warning. Thanks to Jeffc for pointing this out. 
llvm-svn: 34920
 2007-03-05 00:11:19 +00:00
Chris Lattner
4fadd9defa Add some simplifications for demanded bits, this allows instcombine to turn: 
define i64 @test(i64 %A, i32 %B) {
        %tmp12 = zext i32 %B to i64             ; <i64> [#uses=1]
        %tmp3 = shl i64 %tmp12, 32              ; <i64> [#uses=1]
        %tmp5 = add i64 %tmp3, %A               ; <i64> [#uses=1]
        %tmp6 = and i64 %tmp5, 123              ; <i64> [#uses=1]
        ret i64 %tmp6
}

into:

define i64 @test(i64 %A, i32 %B) {
        %tmp6 = and i64 %A, 123         ; <i64> [#uses=1]
        ret i64 %tmp6
}

This implements Transforms/InstCombine/add2.ll:test1

llvm-svn: 34919
 2007-03-05 00:02:29 +00:00
Jeff Cohen
98c99a3a02 Unbreak VC++ build. 
llvm-svn: 34917
 2007-03-05 00:00:42 +00:00
Chris Lattner
0036009167 simplify some code 
llvm-svn: 34914
 2007-03-04 23:16:36 +00:00
Chris Lattner
8c7d418eaf fold away addc nodes when we know there cannot be a carry-out. 
llvm-svn: 34913
 2007-03-04 20:40:38 +00:00
Chris Lattner
7021449d8b generalize 
llvm-svn: 34910
 2007-03-04 20:08:45 +00:00
Chris Lattner
06e4ea2b21 canonicalize constants to the RHS of addc/adde. If nothing uses the carry out of 
addc, turn it into add.

This allows us to compile:

long long test(long long A, unsigned B) {
  return (A + ((long long)B << 32)) & 123;
}

into:

_test:
        movl $123, %eax
        andl 4(%esp), %eax
        xorl %edx, %edx
        ret

instead of:
_test:
        xorl %edx, %edx
        movl %edx, %eax
        addl 4(%esp), %eax   ;; add of zero
        andl $123, %eax
        ret

llvm-svn: 34909
 2007-03-04 20:03:15 +00:00
Chris Lattner
bac1a46d92 eliminate some ops if they have an undef RHS 
llvm-svn: 34908
 2007-03-04 20:01:46 +00:00