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80 Commits

Author SHA1 Message Date
Chris Lattner
a2b590fff8 support > 4G stack objects 
llvm-svn: 36422
 2007-04-25 04:20:54 +00:00
Chris Lattner
958d804293 Fix a bug introduced with my previous patch, where it didn't correctly handle 
instructions which replace themselves when FI's are rewritten (common on ppc).
This fixes CodeGen/PowerPC/2006-10-17-ppc64-alloca.ll

llvm-svn: 35789
 2007-04-09 01:19:33 +00:00
Chris Lattner
1a746d3b8e Fix CodeGen/Generic/2007-04-08-MultipleFrameIndices.ll and PR1308: 
some instructions can have multiple frame indices in them.  If this happens,
rewrite all of them.

llvm-svn: 35785
 2007-04-09 00:46:10 +00:00
Evan Cheng
73678177cd If target decides to create an emergency spill slot, make sure it's closest to SP or frame pointer. 
llvm-svn: 34965
 2007-03-06 10:02:38 +00:00
Evan Cheng
7d470c14cf Delete register scavenger when done with it. 
llvm-svn: 34786
 2007-03-01 10:23:33 +00:00
Evan Cheng
ce7f2618a9 Interface clean up. 
llvm-svn: 34772
 2007-03-01 02:25:51 +00:00
Chris Lattner
5a20764bbb add a newline at end of file 
llvm-svn: 34735
 2007-02-28 06:42:11 +00:00
Evan Cheng
db591ecaa8 Make requiresRegisterScavenging determination on a per MachineFunction basis. 
llvm-svn: 34711
 2007-02-28 00:59:19 +00:00
Evan Cheng
ee2e5de4fb MRegisterInfo disowns RegScavenger. It's immutable. 
llvm-svn: 34706
 2007-02-28 00:17:36 +00:00
Evan Cheng
4c4e56df47 Let MRegisterInfo now owns RegScavenger. 
llvm-svn: 34691
 2007-02-27 21:10:33 +00:00
Evan Cheng
341fc2bf88 forward() should not increment internal iterator. Its client may insert instruction between now and next forward() call. 
llvm-svn: 34649
 2007-02-27 01:58:48 +00:00
Evan Cheng
92429f4cca First potential client of register scavenger. 
llvm-svn: 34516
 2007-02-23 01:11:26 +00:00
Jim Laskey
64f4242072 Change the MachineDebugInfo to MachineModuleInfo to better reflect usage 
for debugging and exception handling.

llvm-svn: 33550
 2007-01-26 21:22:28 +00:00
Evan Cheng
b64363a085 Added a MRegisterInfo hook that tells PEI the target is responsible for 
rounding the stack frame to a multiple of stack alignment.

llvm-svn: 33504
 2007-01-25 22:12:41 +00:00
Evan Cheng
b6a4a7f72a PEI is now responsible for adding MaxCallFrameSize to frame size and align the stack. Each target can further adjust the frame size if necessary. 
llvm-svn: 33460
 2007-01-23 09:38:11 +00:00
Evan Cheng
4e647ad333 Remove an unused variable. 
llvm-svn: 33396
 2007-01-20 09:21:54 +00:00
Evan Cheng
7e02b3a690 We not align the final stack slot but instead let the target do so in emitPrologue(). Each target can make adjustments to the stack frame and re-align the stack as it deem appropriate. Do not align it twice which can end up wasting stack space. 
llvm-svn: 33387
 2007-01-20 02:07:13 +00:00
Evan Cheng
09bcc91be2 - Fixing naming inconsistency: calleesave -> calleesaved. 
- Make use of spillCalleeSavedRegisters() and restoreCalleeSavedRegisters().

llvm-svn: 32822
 2007-01-02 21:31:15 +00:00
Evan Cheng
b5a57532b0 Initialize {Min|Max}CSFrameIndex properly. 
llvm-svn: 32299
 2006-12-07 02:25:34 +00:00
Evan Cheng
5a3f89027f TargetRegisterClass specifies the desired spill alignment. However, it cannot be honored if stack alignment is smaller. 
llvm-svn: 30648
 2006-09-28 18:52:32 +00:00
Evan Cheng
5e8af45ddb PEI now place callee save spills closest to the address pointed to by the 
incoming stack. This allows X86 backend to use push / pop in epilogue /
prologue.

llvm-svn: 30636
 2006-09-28 00:10:27 +00:00
Evan Cheng
310d2abd29 Rename function. It's determining which callee-save registers to save. 
llvm-svn: 30616
 2006-09-26 22:29:31 +00:00
Chris Lattner
33bd5dcfb7 s|llvm/Support/Visibility.h|llvm/Support/Compiler.h| 
llvm-svn: 29911
 2006-08-27 12:54:02 +00:00
Jim Laskey
e9b0e1014e Tidy up. 
llvm-svn: 29888
 2006-08-25 22:56:30 +00:00
Jim Laskey
3af6953257 Consolidate callee saved register information so that it can me used by debug 
information and exception handling.

llvm-svn: 29881
 2006-08-25 19:45:51 +00:00
Chris Lattner
de706b3e3e Shave another 27K off libllvmgcc.dylib with visibility hidden 
llvm-svn: 28973
 2006-06-28 22:17:39 +00:00
Chris Lattner
11064741d3 Remove dead variable 
llvm-svn: 28253
 2006-05-12 18:02:04 +00:00
Jim Laskey
b93bc75add Foundation for call frame information. 
llvm-svn: 27491
 2006-04-07 16:34:46 +00:00
Chris Lattner
4601b86ad0 The stack alignment is now computed dynamically, just verify it is correct. 
llvm-svn: 27380
 2006-04-03 21:39:57 +00:00
Chris Lattner
fc76f9f0c1 Always compute max align. 
llvm-svn: 24227
 2005-11-06 17:43:20 +00:00
Nate Begeman
aecebc076b Add the necessary support to the ISel to allow targets to codegen the new 
alignment information appropriately.  Includes code for PowerPC to support
fixed-size allocas with alignment larger than the stack.  Support for
arbitrarily aligned dynamic allocas coming soon.

llvm-svn: 24224
 2005-11-06 09:00:38 +00:00
Chris Lattner
3fcb5aa250 now that we have a reg class to spill with, get this info from the regclass 
llvm-svn: 23559
 2005-09-30 17:19:22 +00:00
Chris Lattner
738631f389 Now that we have getCalleeSaveRegClasses() info, use it to pass the register 
class into the spill/reload methods.  Targets can now rely on that argument.

llvm-svn: 23556
 2005-09-30 16:59:07 +00:00
Chris Lattner
a9cd99bbc1 Change this code ot pass register classes into the stack slot spiller/reloader 
code.  PrologEpilogInserter hasn't been updated yet though, so targets cannot
use this info.

llvm-svn: 23536
 2005-09-30 01:29:00 +00:00
Chris Lattner
21400573a7 Fix a bug in my previous patch that was using the wrong iterator. This fixes 
Olden/bisort among others.

llvm-svn: 23124
 2005-08-29 00:10:46 +00:00
Chris Lattner
5f55dd72af Make this code safe for when loadRegFromStackSlot inserts multiple instructions. 
llvm-svn: 23108
 2005-08-26 22:18:32 +00:00
Chris Lattner
54bf1cc313 When inserting callee-save register reloads, make sure to skip over any 
terminator instructions before the 'ret' in case the target has a
multi-instruction return sequence.

llvm-svn: 22041
 2005-05-15 03:09:58 +00:00
Chris Lattner
a3e57bd844 Tolerate instrs with extra args 
llvm-svn: 21982
 2005-05-13 21:07:15 +00:00
Misha Brukman
774e55c446 Remove trailing whitespace 
llvm-svn: 21420
 2005-04-21 22:36:52 +00:00
Chris Lattner
65fc8007cd Simplify/speedup the PEI by not having to scan for uses of the callee saved 
registers.  This information is computed directly by the register allocator
now.

llvm-svn: 19795
 2005-01-23 23:13:12 +00:00
Chris Lattner
c187b917f2 Speed this up a bit by making ModifiedRegs a vector<char> not vector<bool> 
llvm-svn: 19787
 2005-01-23 21:45:01 +00:00
Chris Lattner
29d6389d78 Implicitly defined registers can clobber callee saved registers too! 
This fixes the return-address-not-being-saved problem in the Alpha backend.

llvm-svn: 19741
 2005-01-22 00:49:16 +00:00
Chris Lattner
0e7435bc5b Add an assertion that would have made more sense to duraid 
llvm-svn: 19704
 2005-01-19 21:32:07 +00:00
Nate Begeman
efbdaad4b7 Put this change back in after testing from Reid proved its innocence. getSpillSize now returns value in bits 
llvm-svn: 16102
 2004-08-29 22:00:24 +00:00
Nate Begeman
ad24578e7d Back out change to divide getSpillSize by 8 until I figure out why it breaks x86, which has register sizes in bits. 
llvm-svn: 16073
 2004-08-27 16:48:24 +00:00
Nate Begeman
c0e42be976 Register sizes are in bits, not bytes 
llvm-svn: 16070
 2004-08-27 04:28:10 +00:00
Chris Lattner
0df8bcf2fa Register info alignment is in bits, frame object alignment is (currently) in 
bytes.

llvm-svn: 15970
 2004-08-21 20:04:59 +00:00
Chris Lattner
7ead36e4a4 Now that we have per-register spill size/alignment info, remove more uses 
of getRegClass

llvm-svn: 15967
 2004-08-21 19:45:10 +00:00
Chris Lattner
463d46f17a Stop using CreateStackObject(RegClass*) 
llvm-svn: 15775
 2004-08-15 22:02:22 +00:00
Chris Lattner
e58190f5f6 These methods no longer take a TargetRegisterClass* operand. 
llvm-svn: 15774
 2004-08-15 21:56:44 +00:00