84208 Commits

Author SHA1 Message Date
Richard Smith
aa91b43d1c Fix undefined behavior (binding a reference to a dereferenced null pointer) if
SSAUpdater was created and destroyed without being initialized.

llvm-svn: 162137
2012-08-17 21:42:44 +00:00
Akira Hatanaka
ab6dca06f4 Add MipsELFWriterInfo.{h,cpp}.
llvm-svn: 162136
2012-08-17 21:38:47 +00:00
Akira Hatanaka
a50e7bd0a6 Correct MCJIT functionality for MIPS32 architecture.
No new tests are added.
All tests in ExecutionEngine/MCJIT that have been failing pass after this patch
is applied (when "make check" is done on a mips board). 

Patch by Petar Jovanovic.

llvm-svn: 162135
2012-08-17 21:28:04 +00:00
Bill Wendling
5ae9ccaa74 Implement stack protectors for structures with character arrays in them.
<rdar://problem/10545247>

llvm-svn: 162131
2012-08-17 20:59:56 +00:00
Jakob Stoklund Olesen
40eb30013e Avoid folding ADD instructions with FI operands.
PEI can't handle the pseudo-instructions. This can be removed when the
pseudo-instructions are replaced by normal predicated instructions.

Fixes PR13628.

llvm-svn: 162130
2012-08-17 20:55:34 +00:00
Akira Hatanaka
4e1b032521 Add stub methods for mips assembly matcher.
Patch by Vladimir Medic.

llvm-svn: 162124
2012-08-17 20:16:42 +00:00
Benjamin Kramer
4e9e4d1818 MemoryBuiltins: Properly guard ObjectSizeOffsetVisitor against cycles in the IR.
The previous fix only checked for simple cycles, use a set to catch longer
cycles too.

Drop the broken check from the ObjectSizeOffsetEvaluator. The BoundsChecking
pass doesn't have to deal with invalid IR like InstCombine does.

llvm-svn: 162120
2012-08-17 19:26:41 +00:00
Bill Wendling
0569e9a6f3 Change the linker_private_weak_def_auto' linkage to linkonce_odr_auto_hide' to
make it more consistent with its intended semantics.

The `linker_private_weak_def_auto' linkage type was meant to automatically hide
globals which never had their addresses taken. It has nothing to do with the
`linker_private' linkage type, which outputs the symbols with a `l' (ell) prefix
among other things.

The intended semantic is more like the `linkonce_odr' linkage type.

Change the name of the linkage type to `linkonce_odr_auto_hide'. And therefore
changing the semantics so that it produces the correct output for the linker.

Note: The old linkage name `linker_private_weak_def_auto' will still parse but
is not a synonym for `linkonce_odr_auto_hide'. This should be removed in 4.0.
<rdar://problem/11754934>

llvm-svn: 162114
2012-08-17 18:33:14 +00:00
Rafael Espindola
fccad41366 Assert that dominates is not given a multiple edge. Finding out if we have
multiple edges between two blocks is linear. If the caller is iterating all
edges leaving a BB that would be a square time algorithm. It is more efficient
to have the callers handle that case.

Currently the only callers are:
* GVN: already avoids the multiple edge case.
* Verifier: could only hit this assert when looking at an invalid invoke. Since
it already rejects the invoke, just avoid computing the dominance for it.

llvm-svn: 162113
2012-08-17 18:21:28 +00:00
Jakob Stoklund Olesen
36d81e300e Add comment, clean up code. No functional change.
llvm-svn: 162107
2012-08-17 16:59:09 +00:00
Benjamin Kramer
ba78a8432b TargetLowering: Use the large shift amount during legalize types. The legalizer may call us with an overly large type.
llvm-svn: 162101
2012-08-17 15:54:21 +00:00
Jakob Stoklund Olesen
476a5d42a7 Use standard pattern for iterate+erase.
Increment the MBB iterator at the top of the loop to properly handle the
current (and previous) instructions getting erased.

This fixes PR13625.

llvm-svn: 162099
2012-08-17 14:38:59 +00:00
Benjamin Kramer
d431f3a1f2 Guard MemoryBuiltins against self-looping GEPs, which can occur in unreachable code due to constant propagation.
Fixes PR13621.

llvm-svn: 162098
2012-08-17 14:16:37 +00:00
Benjamin Kramer
b42939c43b Fix broken check lines.
I really need to find a way to automate this, but I can't come up with a regex
that has no false positives while handling tricky cases like custom check
prefixes.

llvm-svn: 162097
2012-08-17 12:28:26 +00:00
Tim Northover
1de091468c Implement NEON domain switching for scalar <-> S-register vmovs on ARM
llvm-svn: 162094
2012-08-17 11:32:52 +00:00
Jin-Gu Kang
7892202c05 Insertion of NoFolder functions to avoid ambiguous overload warnings or errors about whether to convert Idx to ArrayRef<Constant *> or ArrayRef<Value *> like ConstantFolder and TargetFolder.
llvm-svn: 162090
2012-08-17 08:54:57 +00:00
Craig Topper
efc1bf9ee1 Use nested switch to select arguments to reduce calls to EmitPCMP.
llvm-svn: 162089
2012-08-17 07:15:56 +00:00
Craig Topper
8fa010b216 Make ReplaceATOMIC_BINARY_64 a static function. Use a nested switch to reduce to only a single call to it thus allowing it to be inlined by the compiler.
llvm-svn: 162088
2012-08-17 06:55:11 +00:00
Pranav Bhandarkar
5b5070348b Test commit.
include/llvm/IntrinsicsHexagon.td: Hexagon_Intrinsic is the base class
for all Hexagon intrinsics and not altivec intrinsics.

llvm-svn: 162087
2012-08-17 06:36:26 +00:00
Craig Topper
117916e06d Remove unnecessary include of ARMGenInstrInfo.inc.
llvm-svn: 162086
2012-08-17 06:21:09 +00:00
Craig Topper
bebbf04c18 Declare some for loop indices inside the for loop statement.
llvm-svn: 162085
2012-08-17 05:42:16 +00:00
Craig Topper
3fb03e8722 Fix up indentation of outputted decode function for readability.
llvm-svn: 162082
2012-08-17 05:16:15 +00:00
NAKAMURA Takumi
f77fb107af lit: Show actually created count of threads. The incorrect threads count is printed if the number of tests are less than the number of default threads.
Thanks to Vinson Lee, reported in PR13620.

llvm-svn: 162078
2012-08-17 04:15:41 +00:00
Chandler Carruth
c90bc7f318 Flatten the aligned-char-array utility template to be a directly
templated union at the request of Richard Smith. This makes it
substantially easier to type. =]

llvm-svn: 162072
2012-08-17 01:47:25 +00:00
Jakob Stoklund Olesen
88217b055d Add ADD and SUB to the predicable ARM instructions.
It is not my plan to duplicate the entire ARM instruction set with
predicated versions. We need a way of representing predicated
instructions in SSA form without requiring a separate opcode.

Then the pseudo-instructions can go away.

llvm-svn: 162061
2012-08-16 23:21:55 +00:00
Jakob Stoklund Olesen
aca66722c2 Handle ARM MOVCC optimization in PeepholeOptimizer.
Use the target independent select analysis hooks.

llvm-svn: 162060
2012-08-16 23:14:20 +00:00
Jakob Stoklund Olesen
babff4afdb Add an MCID::Select flag and TII hooks for optimizing selects.
Select instructions pick one of two virtual registers based on a
condition, like x86 cmov. On targets like ARM that support predication,
selects can sometimes be eliminated by predicating the instruction
defining one of the operands.

Teach PeepholeOptimizer to recognize select instructions, and ask the
target to optimize them.

llvm-svn: 162059
2012-08-16 23:11:47 +00:00
Roman Divacky
b95259c849 Revert r162034, r162035 and r162037.
llvm-svn: 162039
2012-08-16 19:07:59 +00:00
Roman Divacky
831ddb548a Define and handle additional fixup kinds. By Adhemerval Zanella.
llvm-svn: 162037
2012-08-16 18:37:52 +00:00
Roman Divacky
0d2b6fefbe Add PPC64 relocations definitions, by Adhemerval Zanella.
llvm-svn: 162035
2012-08-16 18:31:29 +00:00
Roman Divacky
07d107280c Handle PowerPC.
llvm-svn: 162034
2012-08-16 18:30:03 +00:00
Roman Divacky
3a41549e6a Fix typo and grammar. By Adhemerval Zanella.
llvm-svn: 162032
2012-08-16 18:19:29 +00:00
Rafael Espindola
d7ec990084 Teach GVN to reason about edges dominating uses. This allows it to handle cases
where some fact lake a=b dominates a use in a phi, but doesn't dominate the
basic block itself.

This feature could also be implemented by splitting critical edges, but at least
with the current algorithm reasoning about the dominance directly is faster.

The time for running "opt -O2" in the testcase in pr10584 is 1.003 times slower
and on gcc as a single file it is 1.0007 times faster.

llvm-svn: 162023
2012-08-16 15:09:43 +00:00
Nadav Rotem
18ebdab46c Add dump/dumpr methods to SDValue.
llvm-svn: 162014
2012-08-16 07:39:52 +00:00
Jush Lu
767c82d4e0 [arm-fast-isel] Add support for fastcc.
Without fastcc support, the caller just falls through to CallingConv::C
for fastcc, but callee still uses fastcc, this inconsistency of calling
convention is a problem, and fastcc support can fix it.

llvm-svn: 162013
2012-08-16 05:15:53 +00:00
Anitha Boyapati
161fc750a1 Patch to enable FMA on bdver2 target. Make XOP feature enable FMA4 as well.
llvm-svn: 162012
2012-08-16 04:04:02 +00:00
Anitha Boyapati
5443ee0d76 (no commit message)
llvm-svn: 162010
2012-08-16 03:50:04 +00:00
Akira Hatanaka
cbf9f98a06 Test case for r162008.
llvm-svn: 162009
2012-08-16 03:48:41 +00:00
Akira Hatanaka
623a561154 Add Android ABI to Mips backend to handle functions returning vectors of four
floats.

llvm-svn: 162008
2012-08-16 03:48:05 +00:00
Victor Oliveira
6d4bd3c36c bug in experimental targets
llvm-svn: 161995
2012-08-15 22:35:36 +00:00
Jakob Stoklund Olesen
55aee8b58a Fold predicable instructions into MOVCC / t2MOVCC.
The ARM select instructions are just predicated moves. If the select is
the only use of an operand, the instruction defining the operand can be
predicated instead, saving one instruction and decreasing register
pressure.

This implementation can turn AND/ORR/EOR instructions into their
corresponding ANDCC/ORRCC/EORCC variants. Ideally, we should be able to
predicate any instruction, but we don't yet support predicated
instructions in SSA form.

llvm-svn: 161994
2012-08-15 22:16:39 +00:00
Bill Wendling
1124a2da20 Remove dead flag.
llvm-svn: 161990
2012-08-15 21:18:10 +00:00
Bill Wendling
8c8ad77086 Rework test so that it reproduces the error without the horrible flag.
llvm-svn: 161989
2012-08-15 21:10:18 +00:00
Bill Wendling
a7d745827b Remove invalid test. This test requires that dead basic blocks be kept
around. That's not how we do things. Besides, the commit message tells us that
it is covered by the GCC test suite.

------------------------------------------------------------------------
r127497 | zwarich | 2011-03-11 13:51:56 -0800 (Fri, 11 Mar 2011) | 3 lines

Fix the GCC test suite issue exposed by r127477, which was caused by stack
protector insertion not working correctly with unreachable code. Since that
revision was rolled out, this test doesn't actual fail before this fix.
------------------------------------------------------------------------

llvm-svn: 161985
2012-08-15 20:54:09 +00:00
Sean Callanan
de18bba4c8 Fixed a problem in the JIT memory allocator where
allocations of executable memory would not be padded
to account for the size of the allocation header.
This resulted in undersized allocations, meaning that
when the allocation was written to later the next
allocation's header would be corrupted.

llvm-svn: 161984
2012-08-15 20:53:52 +00:00
Jakob Stoklund Olesen
7513042c0c Add a CoveringSubRegIndices field to SubRegIndex records.
This can be used to tell TableGen to use a specific SubRegIndex instead
of synthesizing one when discovering all sub-registers.

llvm-svn: 161982
2012-08-15 20:15:48 +00:00
Michael J. Spencer
793631c9bf Properly test the LLVM_USE_RVALUE_REFERENCES macro.
llvm-svn: 161979
2012-08-15 19:21:42 +00:00
Michael J. Spencer
b1010e4913 Properly test the LLVM_USE_RVALUE_REFERENCES macro.
llvm-svn: 161978
2012-08-15 19:16:27 +00:00
Michael J. Spencer
c500bff4cd [PathV2] Add mapped_file_region. Implementation for Windows and POSIX.
llvm-svn: 161976
2012-08-15 19:05:47 +00:00
Michael J. Spencer
60050d27bb Add LLVM_DELETED_FUNCTION compatibility macro.
This should replace uses of:

class A {
  A(const &A); // DO NOT IMPLEMENT
public:
  ...
};

llvm-svn: 161975
2012-08-15 18:54:36 +00:00