Commit Graph

163244 Commits

Author SHA1 Message Date
David Blaikie
ba3ab1b76a Fix some layering in AggressiveInstCombine (avoiding inclusion of Scalar.h)
llvm-svn: 330726
2018-04-24 15:40:07 +00:00
Benjamin Kramer
2e6db8967f [LoadStoreVectorize] Ignore interleaved invariant loads.
The memory location an invariant load is using can never be clobbered by
any store, so it's safe to move the load ahead of the store.

Differential Revision: https://reviews.llvm.org/D46011

llvm-svn: 330725
2018-04-24 15:28:47 +00:00
Andrea Di Biagio
15cc258b1e [llvm-mca] Refactor the Scheduler interface in preparation for PR36663.
Zero latency instructions are now scheduled the same way as other instructions.
Before this patch, there was a specialzed code path for those instructions.

All scheduler events are now generated from method `scheduleInstruction()` and
from method `cycleEvent()`. This will make easier to implement a "execution
stage", and let that stage publish all the scheduler events.

No functional change intended.

llvm-svn: 330723
2018-04-24 14:53:16 +00:00
Simon Pilgrim
47c1eb2a9c [X86] Remove unnecessary FMA reg-mem InstRW scheduler overrides.
llvm-svn: 330720
2018-04-24 14:47:11 +00:00
Ulrich Weigand
7b39b149d1 [SystemZ] Use preferred 16-byte function alignment
While not necessary for correctness, it is preferable for
performance reasons on all architectures we currently support
to align functions to 16-byte boundaries by default.

llvm-svn: 330718
2018-04-24 14:03:21 +00:00
Simon Pilgrim
cf35a2cfd3 Fix Wdocumentation warnings. NFCI.
llvm-svn: 330716
2018-04-24 13:38:26 +00:00
Simon Pilgrim
afbe38e566 [X86] Fix missing cfi from sitofp checks
llvm-svn: 330715
2018-04-24 13:24:56 +00:00
Simon Pilgrim
3603cba798 [X86] Add vector element insertion/extraction scheduler classes
Split off pinsr/pextr and extractps instructions.

(Mostly) fixes PR36887.

Note: It might be worth adding a WriteFInsertLd class as well in the future.

Differential Revision: https://reviews.llvm.org/D45929

llvm-svn: 330714
2018-04-24 13:21:41 +00:00
Simon Pilgrim
c8e4fc2a95 [MC] Remove orphan MCSchedModel::computeReciprocalThroughput declaration. NFCI.
llvm-svn: 330713
2018-04-24 13:01:03 +00:00
Alexander Ivchenko
0ae11a3f7b [X86] Replace action Promote with Expand for operation ISD::SINT_TO_FP
Summary:
If attribute "use-soft-float"="true" is set then X86ISelLowering.cpp sets
'Promote' action for ISD::SINT_TO_FP operation on type i32.

But 'Promote' action is not proper in this case since lib function
__floatsidf is available for casting from signed int to float type.
Thus Expand action is more suitable here.

The Expand action should be set for ISD::UINT_TO_FP for soft float as well.

If function attribute "use-soft-float"="true" is set then infinite looping
can happen in DAG combining, function visitSINT_TO_FP() replaces SINT_TO_FP
node with UINT_TO_FP node and function combineUIntToFP() replace vice versa in cycle.
The fix prevents it.

Patch by vrybalov

Differential Revision: https://reviews.llvm.org/D45572

llvm-svn: 330711
2018-04-24 12:57:51 +00:00
Francis Visoiu Mistrih
ad67eebfbf [CodeGen] Print user-friendly debug locations as MI comments
If available, print the file, line and column of the DebugLoc attached
to the MachineInstr:

MOV16mr $rbp, 1, $noreg, -112, $noreg, killed renamable $ax, debug-location !56 :: (store 2 into %ir.._value12); stepping.swift:10:17
renamable $edx = MOVZX32rm16 $rbp, 1, $noreg, -112, $noreg, debug-location !62 :: (dereferenceable load 2 from %ir.._value13); stepping.swift:10:17

Differential Revision: https://reviews.llvm.org/D45992

llvm-svn: 330709
2018-04-24 11:00:46 +00:00
Chandler Carruth
af26d261f4 [PM/LoopUnswitch] Fix a bug in the loop block set formation of the new
loop unswitch.

This code incorrectly added the header to the loop block set early. As
a consequence we would incorrectly conclude that a nested loop body had
already been visited when the header of the outer loop was the preheader
of the nested loop. In retrospect, adding the header eagerly doesn't
really make sense. It seems nicer to let the cycle be formed naturally.
This will catch crazy bugs in the CFG reconstruction where we can't
correctly form the cycle earlier rather than later, and makes the rest
of the logic just fall out.

I've also added various asserts that make these issues *much* easier to
debug.

llvm-svn: 330707
2018-04-24 10:33:08 +00:00
Petar Jovanovic
9686e666ef Correct dwarf unwind information in function epilogue
This patch aims to provide correct dwarf unwind information in function
epilogue for X86.
It consists of two parts. The first part inserts CFI instructions that set
appropriate cfa offset and cfa register in emitEpilogue() in
X86FrameLowering. This part is X86 specific.

The second part is platform independent and ensures that:

* CFI instructions do not affect code generation (they are not counted as
  instructions when tail duplicating or tail merging)
* Unwind information remains correct when a function is modified by
  different passes. This is done in a late pass by analyzing information
  about cfa offset and cfa register in BBs and inserting additional CFI
  directives where necessary.

Added CFIInstrInserter pass:

* analyzes each basic block to determine cfa offset and register are valid
  at its entry and exit
* verifies that outgoing cfa offset and register of predecessor blocks match
  incoming values of their successors
* inserts additional CFI directives at basic block beginning to correct the
  rule for calculating CFA

Having CFI instructions in function epilogue can cause incorrect CFA
calculation rule for some basic blocks. This can happen if, due to basic
block reordering, or the existence of multiple epilogue blocks, some of the
blocks have wrong cfa offset and register values set by the epilogue block
above them.
CFIInstrInserter is currently run only on X86, but can be used by any target
that implements support for adding CFI instructions in epilogue.

Patch by Violeta Vukobrat.

Differential Revision: https://reviews.llvm.org/D42848

llvm-svn: 330706
2018-04-24 10:32:08 +00:00
Simon Dardis
ff0bb50aea [mips] Correct the patterns for bswap
Guard the MIPS64 variant correctly for i64, mark the MIPS32 version as not
in microMIPS and provide the microMIPS version.

Additionally, remove a related stale XFAIL'd test as bswap has its own test
case providing coverage.

Reviewers: smaksimovic, abeserminji, atanasyan

Differential Revision: https://reviews.llvm.org/D45816

llvm-svn: 330705
2018-04-24 10:19:29 +00:00
Andrea Di Biagio
9a3d82e1c1 [llvm-mca][CommandGuide] Fix typo in example.
llvm-svn: 330703
2018-04-24 10:09:32 +00:00
Andrei Elovikov
ea1efd32d0 [CodeGen] Do not allow opt-bisect-limit to skip ScalarizeMaskedMemIntrin.
Summary:
The pass is supposed to scalarize such intrinsics if the target does not support
them natively, so if the scalarization does not happen instruction selection
crashes due to inability to lower these intrinsics.

Reviewers: andrew.w.kaylor, craig.topper

Reviewed By: andrew.w.kaylor

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D45947

llvm-svn: 330700
2018-04-24 09:24:29 +00:00
Max Kazantsev
26e820bc4d [NFC] Remove recently added SE verification because it may be false-positive
llvm-svn: 330699
2018-04-24 09:11:01 +00:00
Florian Hahn
99ad998128 [LoopInfo] Verify BBMap tracks innermost loops for BBs.
By checking that none of the child loops contain a BB we make sure BBMap
contains the innermost loop defining BB. This invariant was violated in
LoopInterchange and got caught by this assertion.

Reviewers: chandlerc, mzolotukhin, sanjoy, mehdi_amini, efriedma

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D45971

llvm-svn: 330698
2018-04-24 09:10:05 +00:00
Sander de Smalen
bf2c4c0900 [AArch64][SVE] Asm: Support for contiguous, first-faulting LDFF1 (scalar+scalar) load instructions.
Reviewers: fhahn, rengolin, samparker, SjoerdMeijer, t.p.northover, echristo, evandro, javed.absar

Reviewed By: rengolin

Subscribers: tschuett, kristof.beyls, llvm-commits

Differential Revision: https://reviews.llvm.org/D45946

llvm-svn: 330697
2018-04-24 08:59:08 +00:00
Roman Lebedev
f47cd412fe Link to AggressiveInstCombine in a few places. Unbreaks build for me.
/usr/local/bin/ld.lld: error: undefined symbol: llvm::createAggressiveInstCombinerPass()
>>> referenced by cc1_main.cpp
>>>               tools/clang/tools/driver/CMakeFiles/clang.dir/cc1_main.cpp.o:(_GLOBAL__sub_I_cc1_main.cpp)

And so on

The bot coverage is clearly missing.

llvm-svn: 330693
2018-04-24 08:40:37 +00:00
Pavel Labath
13f5187064 [Support/Path] Add more tests and improve failure messages of existing ones
Summary:
I am preparing a patch to the path function. While working on it, I
noticed that some of the areas are lacking test coverage (e.g. filename
and parent_path functions), so I add more tests to guard against
regressions there.

I have also found the failure messages hard to understand, so I rewrote
some existing test to give more actionable messages when they fail:
- for tests which run over multiple inputs, I use SCOPED_TRACE, to show
  which of the inputs caused the actual failure.
- for comparisons of vectors, I use gmock's container matchers, which
  will print out the full container contents (and the elements that
  differ) when they fail to match.

Reviewers: zturner, espindola

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D45941

llvm-svn: 330691
2018-04-24 08:29:20 +00:00
Xin Tong
e21cba680f [LVI] Fix typo. NFC
llvm-svn: 330688
2018-04-24 07:38:07 +00:00
Alexander Shaposhnikov
b6a0944a41 [llvm-objcopy] Adjust the code for the old versions of msvc
Follow-up for r330685.

llvm-svn: 330686
2018-04-24 06:23:22 +00:00
Alexander Shaposhnikov
c9587757a5 Recommit "[llvm-objcopy] Switch over to using TableGen for parsing arguments"
Add explicit dependency on ObjcopyTableGen 
and rerun the tests on Windows. 
I will double-check the build bots 
and revert this commit if necessary.

llvm-svn: 330685
2018-04-24 05:43:32 +00:00
Max Kazantsev
f2f74c9bed [NFC] Use FileCheck in test
llvm-svn: 330684
2018-04-24 04:42:37 +00:00
Max Kazantsev
12d2cf6584 [NFC] Use forgetTopmostLoop instead of logic duplication
llvm-svn: 330683
2018-04-24 04:33:04 +00:00
Craig Topper
97e1f65ff6 [X86] Add a BSWAP16 instruction using the 32-bit encoding plus a 0x66 prefix.
This encoding is recognized by the CPU, but the behavior is undefined. This makes the disassembler handle it correctly so we don't print bswapl with a 16-bit register.

llvm-svn: 330682
2018-04-24 04:28:02 +00:00
Chandler Carruth
fc9e9247c9 [PM/LoopUnswitch] Remove another over-aggressive assert.
This code path can very clearly be called in a context where we have
baselined all the cloned blocks to a particular loop and are trying to
handle nested subloops. There is no harm in this, so just relax the
assert. I've added a test case that will make sure we actually exercise
this code path.

llvm-svn: 330680
2018-04-24 03:27:00 +00:00
Eric Christopher
633d4ddf8a Remove unused function HexagonEarlyIfConversion::replacePhiEdges. NFC.
llvm-svn: 330678
2018-04-24 02:10:59 +00:00
Max Kazantsev
aa9d578594 [NFC] Add clarification comment
llvm-svn: 330677
2018-04-24 02:08:05 +00:00
Eric Christopher
dcedf66b07 Reflow formatting after previous NFC commit.
llvm-svn: 330676
2018-04-24 01:57:03 +00:00
Eric Christopher
aa1941cf5a Change if-conditionals to else-if as they should all be mutually exclusive.
No functional change intended.

llvm-svn: 330675
2018-04-24 01:57:02 +00:00
Nico Weber
e478018779 Mostly revert r330672.
The test is apparently needed e.g. for check-cfi on Windows where we get
  'C:/b/slave/sanitizer-windows/build/./bin/clang.exe': command not found
without it.  Try to fix the problem that was fixed by r330672 by also checking
for isabs() instead.

llvm-svn: 330673
2018-04-24 01:24:42 +00:00
Nico Weber
00c5136820 Remove code that's almost always dead, and harmful if not.
lit's util.which() would check if the passed-in path existed directly,
and if so return it as-is.  This is never the case when running llvm's, clang's,
or lld's tests normally.  But when running `./llvm-lit path/to/clang/test`
with a cwd of llvm-build/bin, this if would detect that clang exists at path
'clang' and return 'clang' as the discovered clang binary -- and then lit would
use the " clang " -> "*** Do not use 'clang' in tests, use '%clang'. ***"
substitution to replace that with a broken test.  By removing this early
return, lit ends up with the usual absolute path and everything works even
in this uncommon case.

llvm-svn: 330672
2018-04-24 01:05:04 +00:00
David Blaikie
db543185c7 Fix build breaks in examples due to moving stuff from Scalar.h to InstCombine.h
llvm-svn: 330670
2018-04-24 00:58:57 +00:00
David Blaikie
798d5239e3 InstCombine: Fix layering by not including Scalar.h in InstCombine
(notionally Scalar.h is part of libLLVMScalarOpts, so it shouldn't be
included by InstCombine which doesn't/shouldn't need to depend on
ScalarOpts)

llvm-svn: 330669
2018-04-24 00:48:59 +00:00
Craig Topper
0a4050d2c1 [AggressiveInstCombine] Add aggressive inst combiner to the LLVM C API.
I just tried to copy what was done for regular InstCombine. Hopefully I didn't miss anything.

llvm-svn: 330668
2018-04-24 00:39:29 +00:00
George Burgess IV
4f77a99095 Reland r301880(!): "[InstSimplify] Handle selects of GEPs with 0 offset"
I was reminded today that this patch got reverted in r301885. I can no
longer reproduce the failure that caused the revert locally (...almost
one year later), and the patch applied pretty cleanly, so I guess we'll
see if the bots still get angry about it.

The original breakage was InstSimplify complaining (in "assertion
failed" form) about getting passed some crazy IR when running `ninja
check-sanitizer`. I'm unable to find traces of what, exactly, said crazy
IR was. I suppose we'll find out pretty soon if that's still the case.
:)

Original commit:

  Author: gbiv
  Date: Mon May  1 18:12:08 2017
  New Revision: 301880

  URL: http://llvm.org/viewvc/llvm-project?rev=301880&view=rev
  Log:
  [InstSimplify] Handle selects of GEPs with 0 offset

  In particular (since it wouldn't fit nicely in the summary):
  (select (icmp eq V 0) P (getelementptr P V)) -> (getelementptr P V)

  Differential Revision: https://reviews.llvm.org/D31435

llvm-svn: 330667
2018-04-24 00:25:01 +00:00
Alex Shlyapnikov
0d55a7bb36 [HWASan] Use dynamic shadow memory on Android only (LLVM)
There're issues with IFUNC support on other platforms.

DIfferential Revision: https://reviews.llvm.org/D45840

llvm-svn: 330665
2018-04-24 00:16:54 +00:00
Craig Topper
9799a116cf [AggressiveInstCombine] Add createAggressiveInstCombinerPass to LinkAllPasses.h.
llvm-svn: 330664
2018-04-24 00:11:04 +00:00
Craig Topper
8249a0af04 [AggressiveInstCombine] Add library initializer routine for AggressiveInstCombine library. Use it in bugpoint and llvm-opt-fuzzer to match regular InstCombine.
This should make aggressive instcombine usable with these tools.

llvm-svn: 330663
2018-04-24 00:05:21 +00:00
Simon Pilgrim
e7a5186e47 [X86] Remove unnecessary vector memory folded InstRW overrides.
We have test coverage for these with resources-sse*/avx*

llvm-svn: 330662
2018-04-23 22:45:04 +00:00
Robert Widmann
fa09f428c1 [LLVM-C] DIBuilder Bindings For Variable Expressions
Summary: Add DIBuilder bindings for (global) variable expressions, variable value expressions, and debug value intrinsic insertion.

Reviewers: harlanhaskins, deadalnix, whitequark

Reviewed By: whitequark

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D45979

llvm-svn: 330661
2018-04-23 22:31:49 +00:00
Roman Tereshin
68a9fbd154 [GlobalISel][Legalizer] Look thro copies while combining G_UNMERGE's
As we're becoming stricter w/ respect to not allowing vregs having LLTs
and regclasses assigned both mid-globalisel pipeline, the number of
extra copies grows, some of which separate G_UNMERGE's from their
corresponding G_MERGE's, becoming a performance concern.

It's worth mentioning that we're already looking through copies while
combining legalization artifacts for every kind of artifact but
G_UNMERGE.

Reviewed By: aditya_nandakumar

Reviewers: ab, t.p.northover, volkan, javed.absar

Subscribers: rovka, kristof.beyls, llvm-commits

Differential Revision: https://reviews.llvm.org/D45644

llvm-svn: 330660
2018-04-23 22:28:36 +00:00
Simon Pilgrim
7c338e9b75 [X86] Remove unnecessary BMI2 InstRW overrides.
We have test coverage for these with resources-bmi2.s

llvm-svn: 330659
2018-04-23 22:19:55 +00:00
Florian Hahn
0714a98879 [LoopInterchange] Do not change LI for BBs in child loops.
If a loop with child loops becomes our new inner loop after
interchanging, we only need to update LoopInfo for the blocks defined in
the old outer loop. BBs in child loops will stay there.

Reviewers: efriedma, karthikthecool, mcrosier

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D45970

llvm-svn: 330653
2018-04-23 21:38:19 +00:00
Simon Pilgrim
173f49e28e [X86] Remove unnecessary WriteLEA InstRW overrides.
llvm-svn: 330648
2018-04-23 21:04:23 +00:00
Roman Lebedev
adffa0d402 [DAGCombiner] Unfold scalar masked merge if profitable
Summary:
This is [[ https://bugs.llvm.org/show_bug.cgi?id=37104 | PR37104 ]].

[[ https://bugs.llvm.org/show_bug.cgi?id=6773 | PR6773 ]] will introduce an IR canonicalization that is likely bad for the end assembly.
Previously, `andl`+`andn`/`andps`+`andnps` / `bic`/`bsl` would be generated. (see `@out`)
Now, they would no longer be generated  (see `@in`).
So we need to make sure that they are still generated.

If the mask is constant, we do nothing. InstCombine should have unfolded it.
Else, i use `hasAndNot()` TLI hook.

For now, only handle scalars.

https://rise4fun.com/Alive/bO6

----

I *really* don't like the code i wrote in `DAGCombiner::unfoldMaskedMerge()`.
It is super fragile. Is there something like IR Pattern Matchers for this?

Reviewers: spatel, craig.topper, RKSimon, javed.absar

Reviewed By: spatel

Subscribers: andreadb, courbet, kristof.beyls, javed.absar, rengolin, nemanjai, llvm-commits

Differential Revision: https://reviews.llvm.org/D45733

llvm-svn: 330646
2018-04-23 20:38:49 +00:00
Roman Lebedev
e2422e1db7 [X86][AArch64][NFC] Add tests for masked merge unfolding
Summary:
This is [[ https://bugs.llvm.org/show_bug.cgi?id=37104 | PR37104 ]].

[[ https://bugs.llvm.org/show_bug.cgi?id=6773 | PR6773 ]] will introduce an IR canonicalization that is likely bad for the end assembly.
Previously, `andl`+`andn`/`andps`+`andnps` / `bic`/`bsl` would be generated. (see `@out`)
Now, they would no longer be generated  (see `@in`).
I'm guessing `llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp` should be able to unfold this.

Reviewers: spatel, craig.topper, RKSimon, javed.absar

Reviewed By: spatel

Subscribers: nemanjai, rengolin, javed.absar, kristof.beyls, llvm-commits

Differential Revision: https://reviews.llvm.org/D45563

llvm-svn: 330645
2018-04-23 20:38:42 +00:00
Sanjay Patel
ad451e28ba [AggressiveInstCombine] add tests for PR37098; NFC
I'm not sure if this is where we should try to fold these
patterns inspired by:
https://bugs.llvm.org/show_bug.cgi?id=37098
...if this isn't the right place, we can move the tests.

llvm-svn: 330642
2018-04-23 20:20:32 +00:00