17133 Commits

Author SHA1 Message Date
Evan Cheng
baf11248e4 Do not delete BBs if their addresses are taken. rdar://12396696
llvm-svn: 164866
2012-09-28 23:58:57 +00:00
Akira Hatanaka
30420f3184 MIPS DSP: add operands to make sure instruction strings are being matched.
llvm-svn: 164849
2012-09-28 21:23:16 +00:00
Akira Hatanaka
8c74c52ca4 MIPS DSP: other miscellaneous instructions.
llvm-svn: 164845
2012-09-28 20:50:31 +00:00
Manman Ren
d4cf759f2e Testcase for r164835
llvm-svn: 164842
2012-09-28 20:26:33 +00:00
Akira Hatanaka
ca62e0c897 MIPS DSP: ADDUH.QB instruction sub-class.
llvm-svn: 164840
2012-09-28 20:16:04 +00:00
Benjamin Kramer
4193023537 CorrelatedPropagation: BasicBlock::removePredecessor can simplify PHI nodes. If the it's the condition of a SwitchInst, reload it.
Fixes PR13972.

llvm-svn: 164818
2012-09-28 10:42:50 +00:00
Benjamin Kramer
b4a61e5a00 GlobalOpt: non-constexpr bitcasts or GEPs can occur even if the global value is only stored once.
Fixes PR13968.

llvm-svn: 164815
2012-09-28 10:01:27 +00:00
Nick Lewycky
689f61680b Surprisingly, we missed a trivial case here. Fix that!
llvm-svn: 164814
2012-09-28 09:33:53 +00:00
Meador Inge
55db33f26d instcombine: Add more test cases for __strncpy_chk simplification
llvm-svn: 164800
2012-09-27 21:21:31 +00:00
Meador Inge
5e916a5b6f instcombine: Add more test cases for __strcpy_chk simplification
llvm-svn: 164799
2012-09-27 21:21:28 +00:00
Meador Inge
a7ed72c476 instcombine: Add more test cases for __memmove_chk simplification
llvm-svn: 164798
2012-09-27 21:21:25 +00:00
Meador Inge
89cd434f53 instcombine: Add more test cases for __memcpy_chk simplification
llvm-svn: 164797
2012-09-27 21:21:21 +00:00
Meador Inge
8fb8751a66 instcombine: Add more test cases for __memset_chk simplification
llvm-svn: 164796
2012-09-27 21:21:18 +00:00
Jakob Stoklund Olesen
6f2b596e57 Enable the new coalescer algorithm by default.
The new coalescer is better at merging values into unused vector lanes,
improving NEON code.

llvm-svn: 164794
2012-09-27 21:06:02 +00:00
Akira Hatanaka
4282b930ad MIPS DSP: ABSQ_S.PH instruction sub-class.
llvm-svn: 164787
2012-09-27 19:09:21 +00:00
Akira Hatanaka
1b01d7ee93 MIPS DSP: SHLL.QB instruction sub-class.
llvm-svn: 164786
2012-09-27 19:05:08 +00:00
Benjamin Kramer
cb89947f87 Fix a integer overflow in SimplifyCFG's look up table formation logic.
If the width is very large it gets truncated from uint64_t to uint32_t when
passed to TD->fitsInLegalInteger. The truncated value can fit in a register.
This manifested in massive memory usage or crashes (PR13946).

llvm-svn: 164784
2012-09-27 18:29:58 +00:00
Jakob Stoklund Olesen
ffe0e379b9 Avoid dereferencing a NULL pointer.
Fixes PR13943.

llvm-svn: 164778
2012-09-27 16:34:19 +00:00
Sylvestre Ledru
b77340e506 Revert 'Fix a typo 'iff' => 'if''. iff is an abreviation of if and only if. See: http://en.wikipedia.org/wiki/If_and_only_if Commit 164767
llvm-svn: 164768
2012-09-27 10:14:43 +00:00
Sylvestre Ledru
1c5e7904de Fix a typo 'iff' => 'if'
llvm-svn: 164767
2012-09-27 09:59:43 +00:00
Nick Lewycky
9ae46f5c91 Prefer shuffles to selects. Backends love shuffles!
llvm-svn: 164763
2012-09-27 08:33:56 +00:00
Jush Lu
ff46f6b0c6 [arm-fast-isel] Add support for ELF PIC.
This is a preliminary step towards ELF support; currently ARMFastISel hasn't
been used for ELF object files yet.

llvm-svn: 164759
2012-09-27 05:21:41 +00:00
Akira Hatanaka
573895e81e Test case for r164755 and 164756.
llvm-svn: 164757
2012-09-27 04:12:30 +00:00
Akira Hatanaka
8e6fa1d3a5 MIPS DSP: ADDU.QB instruction sub-class.
llvm-svn: 164754
2012-09-27 03:13:59 +00:00
Akira Hatanaka
5a5e58b7ab MIPS DSP: Branch on Greater Than or Equal To Value 32 in DSPControl Pos Field instruction.
llvm-svn: 164751
2012-09-27 02:15:57 +00:00
Akira Hatanaka
b33fd0ad28 MIPS DSP: all the remaining instructions which read or write accumulators.
llvm-svn: 164750
2012-09-27 02:11:20 +00:00
Akira Hatanaka
b2ac1bfabe MIPS DSP: add support for extract-word instructions.
llvm-svn: 164749
2012-09-27 02:05:42 +00:00
Akira Hatanaka
804a9036c3 MIPS DSP: add vector load/store patterns.
llvm-svn: 164744
2012-09-27 01:50:59 +00:00
Jim Grosbach
22a8871d1f X86_32: Large Symbol+Offset relocations.
If the offset is more than 24-bits, it won't fit in a scattered
relocation offset field, so we fall back to using a non-scattered
relocation.

rdar://12358909

llvm-svn: 164724
2012-09-26 21:27:45 +00:00
Duncan Sands
c10b8fc428 Now that invoke of an intrinsic is possible (for the llvm.do.nothing intrinsic)
teach the callgraph logic to not create callgraph edges to intrinsics for invoke
instructions; it already skips this for call instructions.  Fixes PR13903.

llvm-svn: 164707
2012-09-26 17:16:01 +00:00
Hans Wennborg
e1a73f6ca3 Address Duncan's comments on r164684:
- Put statistics in alphabetical order
- Don't use getZextValue when building TableInt, just use APInts
- Introduce Create{Z,S}ExtOrTrunc in IRBuilder.

llvm-svn: 164696
2012-09-26 14:01:53 +00:00
Chandler Carruth
8638d35784 When rewriting the pointer operand to a load or store which has
alignment guarantees attached, re-compute the alignment so that we
consider offsets which impact alignment.

llvm-svn: 164690
2012-09-26 10:45:28 +00:00
Chandler Carruth
0254cf6d85 Teach all of the loads, stores, memsets and memcpys created by the
rewriter in SROA to carry a proper alignment. This involves
interrogating various sources of alignment, etc. This is a more complete
and principled fix to PR13920 as well as related bugs pointed out by Eli
in review and by inspection in the area.

Also by inspection fix the integer and vector promotion paths to create
aligned loads and stores. I still need to work up test cases for
these... Sorry for the delay, they were found purely by inspection.

llvm-svn: 164689
2012-09-26 10:27:46 +00:00
NAKAMURA Takumi
f8c0be6df4 ARM/atomicrmw_minmax.ll: Fix RUN line.
llvm-svn: 164687
2012-09-26 10:12:20 +00:00
Benjamin Kramer
50774721dc Fix tests that didn't test anything.
llvm-svn: 164686
2012-09-26 09:51:39 +00:00
James Molloy
220547e625 Fix ordering of operands on lowering of atomicrmw min/max nodes on ARM.
llvm-svn: 164685
2012-09-26 09:48:32 +00:00
Hans Wennborg
d3f44548bf SimplifyCFG: Make the switch-to-lookup table transformation store the
tables in bitmaps when they fit in a target-legal register.

This saves some space, and it also allows for building tables that would
otherwise be deemed too sparse.

One interesting case that this hits is example 7 from
http://blog.regehr.org/archives/320. We currently generate good code
for this when lowering the switch to the selection DAG: we build a
bitmask to decide whether to jump to one block or the other. My patch
will result in the same bitmask, but it removes the need for the jump,
as the return value can just be retrieved from the mask.

llvm-svn: 164684
2012-09-26 09:44:49 +00:00
NAKAMURA Takumi
af3b653c3e llvm/test/CodeGen/X86/mulx*.ll: Fix copypasto.
llvm-svn: 164681
2012-09-26 09:24:12 +00:00
Michael Liao
4b9634175f Add SARX/SHRX/SHLX code generation support
llvm-svn: 164675
2012-09-26 08:26:25 +00:00
Michael Liao
1a80ec900d Add RORX code generation support
llvm-svn: 164674
2012-09-26 08:24:51 +00:00
Michael Liao
6d6afbf548 Add MULX code generation support
llvm-svn: 164673
2012-09-26 08:22:37 +00:00
Duncan Sands
3e1f8917ba Teach the 'lint' sanity checking pass to detect simple buffer overflows.
llvm-svn: 164671
2012-09-26 07:45:36 +00:00
Chandler Carruth
146e90b6dd Revert the business end of r164636 and try again. I'll come in again. ;]
This should really, really fix PR13916. For real this time. The
underlying bug is... a bit more subtle than I had imagined.

The setup is a code pattern that leads to an @llvm.memcpy call with two
equal pointers to an alloca in the source and dest. Now, not any pattern
will do. The alloca needs to be formed just so, and both pointers should
be wrapped in different bitcasts etc. When this precise pattern hits,
a funny sequence of events transpires. First, we correctly detect the
potential for overlap, and correctly optimize the memcpy. The first
time. However, we do simplify the set of users of the alloca, and that
causes us to run the alloca back through the SROA pass in case there are
knock-on simplifications. At this point, a curious thing has happened.
If we happen to have an i8 alloca, we have direct i8 pointer values. So
we don't bother creating a cast, we rewrite the arguments to the memcpy
to dircetly refer to the alloca.

Now, in an unrelated area of the pass, we have clever logic which
ensures that when visiting each User of a particular pointer derived
from an alloca, we only visit that User once, and directly inspect all
of its operands which refer to that particular pointer value. However,
the mechanism used to detect memcpy's with the potential to overlap
relied upon getting visited once per *Use*, not once per *User*. This is
always true *unless* the same exact value is both source and dest. It
turns out that almost nothing actually produces that pattern though.

We can hand craft test cases that more directly test this behavior of
course, and those are included. Also, note that there is a significant
missed optimization here -- we prove in many cases that there is
a non-volatile memcpy call with identical source and dest addresses. We
shouldn't prevent splitting the alloca in that case, and in fact we
should just remove such memcpy calls eagerly. I'll address that in
a subsequent commit.

llvm-svn: 164669
2012-09-26 07:41:40 +00:00
Bill Wendling
28f1f0139e Generate an error message instead of asserting or segfaulting when we have a
scalar-to-vector conversion that we cannot handle. For instance, when an invalid
constraint is used in an inline asm statement.
<rdar://problem/12284092>

llvm-svn: 164662
2012-09-26 06:16:18 +00:00
Bill Wendling
9a7fa167f9 Generate an error message instead of asserting or segfaulting when we have a
scalar-to-vector conversion that we cannot handle. For instance, when an invalid
constraint is used in an inline asm statement.
<rdar://problem/12284092>

llvm-svn: 164657
2012-09-26 04:04:19 +00:00
Nick Lewycky
f44573ac9b Don't drop the alignment on a memcpy intrinsic when producing a store. This is
only a missed optimization opportunity if the store is over-aligned, but a
miscompile if the store's new type has a higher natural alignment than the
memcpy did. Fixes PR13920!

llvm-svn: 164641
2012-09-25 22:46:21 +00:00
Nick Lewycky
0c83ee116c Don't try to promote the same alloca twice. Fixes PR13916!
Chandler, it's not obvious that it's okay that this alloca gets into the list
twice to begin with. Please review and see whether this is the fix you really
want, but I wanted to get a fix checked in quickly.

llvm-svn: 164634
2012-09-25 21:15:50 +00:00
Nick Lewycky
fc5f72e758 Make this test check the transforms it's actually doing. Also add a test that it
doesn't transform the trivially unsafe case.

llvm-svn: 164617
2012-09-25 18:17:38 +00:00
Michael Liao
b50e89ddce Add missing i64 max/min/umax/umin on 32-bit target
- Turn on atomic6432.ll and add specific test case as well

llvm-svn: 164616
2012-09-25 18:08:13 +00:00
Jim Grosbach
97e019d375 ARM: Darwin BL/BLX relocations to out-of-range symbols.
When a BL/BLX references a symbol in the same translation unit that is
out of range, use an external relocation. The linker will use this to
generate a branch island rather than a direct reference, allowing the
relocation to resolve correctly.

rdar://12359919

llvm-svn: 164615
2012-09-25 18:07:17 +00:00