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139 Commits

Author SHA1 Message Date
Chris Lattner
5196d002f9 I think that V8 should coallesce registers, don't you? 
llvm-svn: 15192
 2004-07-25 06:19:04 +00:00
Chris Lattner
b56b3b5eeb CPR fixes 
llvm-svn: 14960
 2004-07-18 07:26:17 +00:00
Brian Gaeke
b2af4f47b6 Add a class for pseudo-instructions. Use it. 
Add IMPLICIT_USE and IMPLICIT_DEF, a la X86.

llvm-svn: 14884
 2004-07-16 10:32:10 +00:00
Brian Gaeke
ec53196516 Add what will eventually be the TSFlags. Big switch(opcode) statements are bad. 
llvm-svn: 14883
 2004-07-16 10:31:59 +00:00
Brian Gaeke
0d262c839f Add special handling for pseudo-instructions (print them as comments). 
llvm-svn: 14882
 2004-07-16 10:31:47 +00:00
Brian Gaeke
11c7052fb5 Add to-do list. 
llvm-svn: 14881
 2004-07-16 10:31:36 +00:00
Brian Gaeke
53dc31efcd Do IMPLICIT_DEFs on incoming args' hard regs, to avoid confusing the regalloc. 
Support single-fp incoming args.
Support single-fp outgoing args ('call' operands).
Support double-fp return values.

llvm-svn: 14880
 2004-07-16 10:31:25 +00:00
Chris Lattner
6331eb6bbe Delete the allocate*TargetMachine function, which is now dead . 
The shared command line options are now in a header that makes sense.

llvm-svn: 14756
 2004-07-11 04:17:10 +00:00
Chris Lattner
b67e3b01bc Make these format a bit nicer 
llvm-svn: 14747
 2004-07-11 03:27:42 +00:00
Chris Lattner
2ada866a78 Auto-registrate target 
llvm-svn: 14745
 2004-07-11 02:48:49 +00:00
Brian Gaeke
0601002727 Support setcc on fp values. 
llvm-svn: 14687
 2004-07-08 09:08:35 +00:00
Brian Gaeke
23d171a9ed Add floating-point branches and compares. Compares don't complete 
until the next cycle, and there's no interlock, so they effectively
have a delay slot.

llvm-svn: 14686
 2004-07-08 09:08:22 +00:00
Brian Gaeke
99a4b4ecc6 Fix bug where SwitchSection would fail to change to ".bss" successfully. 
llvm-svn: 14685
 2004-07-08 08:08:23 +00:00
Brian Gaeke
79c41545a7 Fix bug involving bool arguments to binary operators. 
Fix typo in comment.

llvm-svn: 14684
 2004-07-08 08:08:10 +00:00
Brian Gaeke
2de292734d Fix bug in copying long constants to register pairs. We were getting 
the top and bottom halves backwards...how embarrassing.
Support 'cast long to long' and other similar no-op casts to long.
Support 'ret long'.

llvm-svn: 14683
 2004-07-08 07:52:13 +00:00
Brian Gaeke
04176a23a7 Support 'ret float' 
llvm-svn: 14681
 2004-07-08 07:22:27 +00:00
Chris Lattner
8d61e9ad98 Add #includes 
llvm-svn: 14625
 2004-07-04 17:19:21 +00:00
Chris Lattner
c83e510819 Fix potential problems with unreachable basic blocks. 
Also, while noone's looking, add support for constant expressions.  Wait,
I said not to look!

llvm-svn: 14566
 2004-07-02 05:49:11 +00:00
Misha Brukman
a691e0bff7 Fix indentation to be 2 spaces. 
llvm-svn: 14512
 2004-06-30 22:11:03 +00:00
Misha Brukman
010e07078b visitSetCondInst() takes a parameter of type `SetCondInst' 
llvm-svn: 14508
 2004-06-30 21:47:40 +00:00
Brian Gaeke
92bba4c696 Allow saving and restoring of double and float registers. 
Allow copying of float registers.

llvm-svn: 14445
 2004-06-27 22:59:56 +00:00
Brian Gaeke
6edb16d8cd Add FITOS, FITOD, and F{ADD,SUB,MUL,DIV}{S,D}. 
llvm-svn: 14444
 2004-06-27 22:53:56 +00:00
Brian Gaeke
5b14de32c6 Support printing constant pool indices. 
If we see an "unknown operand", abort so it's easier to fix it.

llvm-svn: 14441
 2004-06-27 22:50:44 +00:00
Brian Gaeke
0cee4d2fb9 Trim whitespace. 
Support cast of ints (and narrower) to float and double.
Support cast double to double (using load and store).
Abort if we see a CallInst or SetCondInst with long/fp args, instead
of producing bad code.
Support add, sub, mul, div of float and double.

llvm-svn: 14440
 2004-06-27 22:47:33 +00:00
Misha Brukman
57b3f07b31 * LowercaseString moved to StringExtras.h 
* Wrap long line to 80 cols

llvm-svn: 14382
 2004-06-24 23:38:20 +00:00
Brian Gaeke
67fe35225a Add FSTOD and FDTOS conversion instructions. 
llvm-svn: 14372
 2004-06-24 21:22:09 +00:00
Brian Gaeke
8ce4fc5917 Support cast float to float, cast double to float, and cast float to double. 
(It's not yet clear how to copy doubles from register to register.)

llvm-svn: 14371
 2004-06-24 21:22:08 +00:00
Brian Gaeke
003a4a500c Make the double-fp pseudo registers be "NamedRegs". 
llvm-svn: 14366
 2004-06-24 09:23:21 +00:00
Brian Gaeke
2e0d04003c Fix a dyn_cast in copyConstantToRegister which should have been a cast. 
Compactify the code that emits copies of constant ints into registers.

llvm-svn: 14365
 2004-06-24 09:17:47 +00:00
Brian Gaeke
734c654e50 The long integer pseudo-regs are history. So long, we hardly knew ye. 
llvm-svn: 14364
 2004-06-24 08:55:21 +00:00
Brian Gaeke
9a7eca6c51 Use correct add*Imm form in more BuildMI calls. 
Fix bug in emitGEPOperation where we weren't passing MBB, IP to getReg.
(hey, wouldn't a constant expression lowering pass be cool? huh huhuhuh)
Fix bug in emitGEPOperation where we might try to OR a constant into a
register which was too big to fit in the immediate field.
Support and, or, xor of longs.

llvm-svn: 14363
 2004-06-24 08:55:09 +00:00
Brian Gaeke
99b4ee166c Rename the load and store opcodes. The non-fp ones only have one 
variant worth worrying about; the fp ones have two.

llvm-svn: 14362
 2004-06-24 07:37:12 +00:00
Brian Gaeke
8f0aac675d Rename the load and store opcodes. The non-fp ones only have one 
variant worth worrying about; the fp ones have two.
Add fp stores.

llvm-svn: 14361
 2004-06-24 07:36:59 +00:00
Brian Gaeke
e39ef4e8b9 Rename the load and store opcodes. The non-fp ones only have one 
variant worth worrying about; the fp ones have two.
Stub out the case analysis of int-to-fp casts (no code yet).
I think the number of operands passed to BuildMI for loads was wrong.
Support load and store of float and double.

llvm-svn: 14360
 2004-06-24 07:36:48 +00:00
Brian Gaeke
236ef1542c Strange as it may sound, we'll not use LDD/STD to store longs. For reasons of 
representational consistency, we want to address the halves of each 64-bit value
separately.

llvm-svn: 14356
 2004-06-24 06:44:57 +00:00
Brian Gaeke
ac14491ad0 Support constant cast expressions. 
llvm-svn: 14355
 2004-06-24 06:33:00 +00:00
Brian Gaeke
771e52d494 Add pseudo-registers and register class for 64-bit integer values. 
llvm-svn: 14332
 2004-06-22 20:14:41 +00:00
Misha Brukman
6a0ace201c Order #includes as per style guide. 
llvm-svn: 14305
 2004-06-21 21:54:40 +00:00
Chris Lattner
cc465361d9 Move the IntrinsicLowering header into the CodeGen directory, as per PR346 
llvm-svn: 14266
 2004-06-20 07:49:54 +00:00
Brian Gaeke
26336244f5 .zero doesn't work in the Solaris assembler. 
llvm-svn: 14231
 2004-06-18 08:59:16 +00:00
Brian Gaeke
6a8de685b3 Get rid of selects the easy way 
llvm-svn: 14230
 2004-06-18 08:46:15 +00:00
Brian Gaeke
a9daa0a519 Make visitAllocaInst() look more like its X86 counterpart. 
llvm-svn: 14229
 2004-06-18 08:45:52 +00:00
Brian Gaeke
ab4687b176 Mess around with allocation order. In particular, I think we ought to be 
using the local & in regs first because they are not clobbered by calls.

llvm-svn: 14228
 2004-06-18 08:19:08 +00:00
Brian Gaeke
f5697cf56c JMPL has a delay slot. 
llvm-svn: 14227
 2004-06-18 08:18:54 +00:00
Brian Gaeke
2a5dec63a6 Clean up the commented-out F3_3 stuff. 
Replace it with a working class for FP instrs.

llvm-svn: 14226
 2004-06-18 06:28:21 +00:00
Brian Gaeke
01309de73d Fix jmpl. 
Add some FP moves.

llvm-svn: 14225
 2004-06-18 06:28:10 +00:00
Brian Gaeke
c045f38dcb Support printing base+offset pairs where the offset is a register. 
Use this for printing the jmpl indirect-call instruction.

llvm-svn: 14224
 2004-06-18 06:27:59 +00:00
Brian Gaeke
92a3e14ac4 Support intrinsic calls (although no particular intrinsics are supported yet). 
Support indirect calls.
Support returning a float value.

llvm-svn: 14223
 2004-06-18 06:27:48 +00:00
Brian Gaeke
c5f1146e62 Add load instructions for floating-point registers. 
llvm-svn: 14217
 2004-06-18 05:19:27 +00:00
Brian Gaeke
7a618842f1 Support alloca instructions. 
Support copying floating-point constants to registers.
Add assertion to visitCallInst to abort if we hit a NULL calledFunction, for now.

llvm-svn: 14216
 2004-06-18 05:19:16 +00:00