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148 Commits

Author SHA1 Message Date
Evan Cheng
859720c33b Add CopyCost to TargetRegisterClass. This specifies the cost of copying a value 
between two registers in the specific class.

llvm-svn: 42123
 2007-09-19 01:35:01 +00:00
Dan Gohman
b499ea1cf6 Add MVT::fAny for overloading intrinsics on floating-point types. 
llvm-svn: 41128
 2007-08-16 21:57:19 +00:00
Chandler Carruth
00e56b0e81 This is the patch to provide clean intrinsic function overloading support in LLVM. It cleans up the intrinsic definitions and generally smooths the process for more complicated intrinsic writing. It will be used by the upcoming atomic intrinsics as well as vector and float intrinsics in the future. 
This also changes the syntax for llvm.bswap, llvm.part.set, llvm.part.select, and llvm.ct* intrinsics. They are automatically upgraded by both the LLVM ASM reader and the bitcode reader. The test cases have been updated, with special tests added to ensure the automatic upgrading is supported.

llvm-svn: 40807
 2007-08-04 01:51:18 +00:00
Christopher Lamb
9a0d88efde Add target independent MachineInstr's to represent subreg insert/extract in MBB's. PR1350 
llvm-svn: 40518
 2007-07-26 07:48:21 +00:00
Christopher Lamb
954afaa83f Teach TableGen about the new vector types. 
llvm-svn: 40513
 2007-07-26 06:41:18 +00:00
Evan Cheng
3c78aadb70 No need for noResults anymore. 
llvm-svn: 40075
 2007-07-20 00:21:23 +00:00
Evan Cheng
8312ed6f77 Change instruction description to split OperandList into OutOperandList and 
InOperandList. This gives one piece of important information: # of results
produced by an instruction.
An example of the change:
def ADD32rr  : I<0x01, MRMDestReg, (ops GR32:$dst, GR32:$src1, GR32:$src2),
                 "add{l} {$src2, $dst|$dst, $src2}",
                 [(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>;
=>
def ADD32rr  : I<0x01, MRMDestReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2),
                 "add{l} {$src2, $dst|$dst, $src2}",
                 [(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>;

llvm-svn: 40033
 2007-07-19 01:14:50 +00:00
Dan Gohman
48b2f7992b Eliminate an unused parameter. 
llvm-svn: 39828
 2007-07-13 20:16:50 +00:00
Evan Cheng
974bb09390 Try committing again. Add OptionalDefOperand. Remove clobbersPred. 
llvm-svn: 38498
 2007-07-10 18:05:01 +00:00
Evan Cheng
2ecd061c78 ImmutablePredicateOperand is no more. 
llvm-svn: 37963
 2007-07-06 23:23:38 +00:00
Evan Cheng
2a4b3f341b Instructions with ImmutablePredicateOperand aren't really predicable since their predicates are fixed at isel time. 
llvm-svn: 37899
 2007-07-05 07:19:29 +00:00
Dan Gohman
9cbc3fb1ab Revert the earlier change that removed the M_REMATERIALIZABLE machine 
instruction flag, and use the flag along with a virtual member function
hook for targets to override if there are instructions that are only
trivially rematerializable with specific operands (i.e. constant pool
loads).

llvm-svn: 37728
 2007-06-26 00:48:07 +00:00
Dan Gohman
b60d8a92c9 Replace M_REMATERIALIZIBLE and the newly-added isOtherReMaterializableLoad 
with a general target hook to identify rematerializable instructions. Some
instructions are only rematerializable with specific operands, such as loads
from constant pools, while others are always rematerializable. This hook
allows both to be identified as being rematerializable with the same
mechanism.

llvm-svn: 37644
 2007-06-19 01:48:05 +00:00
Evan Cheng
12b3002673 Replace TargetInstrInfo::CanBeDuplicated() with a M_NOT_DUPLICABLE bit. 
llvm-svn: 37643
 2007-06-19 01:26:51 +00:00
Christopher Lamb
68017d151b Add support to tablegen for specifying subregister classes on a per register class basis. 
llvm-svn: 37572
 2007-06-13 22:20:15 +00:00
Evan Cheng
1be50b2f54 Add clobbersPred - instruction that clobbers condition code / register which are used to predicate instructions. 
llvm-svn: 37465
 2007-06-06 10:14:55 +00:00
Dan Gohman
4ea79a66c2 Remove the operator<< for MVT::ValueType in preparation for MVT::ValueType 
being changed from an enum to an integer type, which can't have a custom
operator<< overload.

llvm-svn: 37412
 2007-06-04 16:11:03 +00:00
Evan Cheng
ecb8e3dc44 Rename M_PREDICATED to M_PREDICABLE; opcode can be specified isPredicable without having a PredicateOperand. 
llvm-svn: 37116
 2007-05-16 20:45:24 +00:00
Reid Spencer
5b8b959d29 For PR1297: 
Implement code generation for overloaded intrinsic functions. The basic
difference is that "actual" argument types must be provided when
constructing intrinsic names and types. Also, for recognition, only the
prefix is examined. If it matches, the suffix is assumed to match. The
suffix is checked by the Verifier, however.

llvm-svn: 35539
 2007-04-01 07:20:02 +00:00
Bill Wendling
a42484728c Add support for the v1i64 type. This makes better code for this: 
#include <mmintrin.h>

extern __m64 C;

void baz(__v2si *A, __v2si *B)
{
  *A = C;
  _mm_empty();
}

We get this:

_baz:
        call "L1$pb"
"L1$pb":
        popl %eax
        movl L_C$non_lazy_ptr-"L1$pb"(%eax), %eax
        movq (%eax), %mm0
        movl 4(%esp), %eax
        movq %mm0, (%eax)
        emms
        ret

GCC gives us this:

_baz:
        pushl   %ebx
        call    L3
"L00000000001$pb":
L3:
        popl    %ebx
        subl    $8, %esp
        movl    L_C$non_lazy_ptr-"L00000000001$pb"(%ebx), %eax
        movl    (%eax), %edx
        movl    4(%eax), %ecx
        movl    16(%esp), %eax
        movl    %edx, (%eax)
        movl    %ecx, 4(%eax)
        emms
        addl    $8, %esp
        popl    %ebx
        ret

llvm-svn: 35351
 2007-03-26 07:53:08 +00:00
Evan Cheng
a54c20ca4e Recognize target instruction flag 'isReMaterializable'. 
llvm-svn: 35159
 2007-03-19 06:20:37 +00:00
Chris Lattner
35b160f990 reapply 
llvm-svn: 34697
 2007-02-27 22:08:27 +00:00
Evan Cheng
06b5bb9888 Backing out 
CodeGenTarget.cpp updated: 1.82 -> 1.83
Record.cpp updated: 1.55 -> 1.56
Record.h updated: 1.59 -> 1.60
TableGen.cpp updated: 1.47 -> 1.48
It's missing CallingConvEmitter.h

llvm-svn: 34693
 2007-02-27 21:44:08 +00:00
Chris Lattner
5e2b19c767 initial support for calling convention generation, still unfinished. 
llvm-svn: 34682
 2007-02-27 20:43:37 +00:00
Jim Laskey
1bab68f592 Files missing from LABEL check in. 
llvm-svn: 33539
 2007-01-26 17:29:20 +00:00
Bill Wendling
f13d78d3b8 What should be the last unnecessary <iostream>s in the library. 
llvm-svn: 32333
 2006-12-07 22:21:48 +00:00
Evan Cheng
7eb095f346 Match TargetInstrInfo changes. 
llvm-svn: 32107
 2006-12-01 22:57:41 +00:00
Chris Lattner
4a2af4e374 Remove the isTwoAddress property from the CodeGenInstruction class. It should 
not be used for anything other than backwards compat constraint handling.

Add support for a new DisableEncoding property which contains a list of
registers that should not be encoded by the generated code emitter.  Convert
the codeemitter generator to use this, fixing some PPC JIT regressions.

llvm-svn: 31769
 2006-11-15 23:23:02 +00:00
Chris Lattner
efcd65f335 ADd support for adding constraints to suboperands 
llvm-svn: 31748
 2006-11-15 02:38:17 +00:00
Chris Lattner
6836cbaf9d allow ptr_rc to explicitly appear in an instructions operand list, it doesn't 
have to be a subpart of a complex operand.

llvm-svn: 31618
 2006-11-10 02:01:40 +00:00
Chris Lattner
c1d27af4b8 emit TIED_TO correctly 
llvm-svn: 31484
 2006-11-07 01:27:55 +00:00
Chris Lattner
e1960fc065 simplify the way operand flags and constraints are handled, making it easier 
to extend.

llvm-svn: 31481
 2006-11-06 23:49:51 +00:00
Chris Lattner
04b6336b73 recognize ppc's blr instruction as predicated 
llvm-svn: 31480
 2006-11-06 21:44:54 +00:00
Evan Cheng
8e65006b5e Clean up some code. 
llvm-svn: 31451
 2006-11-04 09:40:23 +00:00
Chris Lattner
5eca521156 eliminate need for the NumMIOperands field in Operand. 
llvm-svn: 31432
 2006-11-03 23:45:17 +00:00
Evan Cheng
05d73e7209 Tied-to constraint must be op_with_larger_idx = op_with_smaller_idx or else throw an exception. 
llvm-svn: 31361
 2006-11-01 23:03:11 +00:00
Evan Cheng
c566892bd5 Add operand constraints to TargetInstrInfo. 
llvm-svn: 31333
 2006-11-01 00:27:05 +00:00
Evan Cheng
7a185e0164 Added properties such as SDNPHasChain to ComplexPattern. 
llvm-svn: 30890
 2006-10-11 21:02:01 +00:00
Evan Cheng
3d60e7e72b Allow more use of iPTR in patterns. 
llvm-svn: 28790
 2006-06-15 00:16:37 +00:00
Evan Cheng
fcdfdcaa96 Don't generate getCalleeSaveReg and getCalleeSaveRegClasses anymore. 
llvm-svn: 28376
 2006-05-18 00:08:46 +00:00
Evan Cheng
3cfed5af84 Typo 
llvm-svn: 28366
 2006-05-17 20:55:51 +00:00
Evan Cheng
5dc3e33623 Remove PointerType from target definition. Use abstract type MVT::iPTR to 
represent pointer type.

llvm-svn: 28363
 2006-05-17 20:37:59 +00:00
Evan Cheng
d4a056116c Allow patterns to refer to physical registers that belong to multiple 
register classes.

llvm-svn: 28323
 2006-05-16 07:05:30 +00:00
Chris Lattner
1659f983ff Fix a typo: Instr* -> Intr* 
llvm-svn: 27568
 2006-04-10 22:02:59 +00:00
Chris Lattner
424516c95a Only compute intrinsic valuetypes when in a target .td file. 
llvm-svn: 27197
 2006-03-28 00:15:00 +00:00
Chris Lattner
8a2ffaea1d revert this, it breaks things. 
llvm-svn: 27196
 2006-03-28 00:03:08 +00:00
Chris Lattner
50f432af88 Add support for decoding iPTR to the right pointer type. 
llvm-svn: 27188
 2006-03-27 22:48:18 +00:00
Chris Lattner
f91acdb005 Make sure to initialize the TheDef field! 
llvm-svn: 27078
 2006-03-24 20:25:01 +00:00
Chris Lattner
522211a435 Move CodeGenIntrinsic implementation to CodeGenTarget.cpp with the rest of 
the CodeGen* implementations.

Parse the MVT::ValueType for each operand of the intrinsics.

llvm-svn: 27075
 2006-03-24 19:49:31 +00:00
Evan Cheng
a1f9db3ad4 getEnumName() missed v8i8, v4i16, and v2i32 types 
llvm-svn: 26869
 2006-03-19 07:57:34 +00:00