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21941 Commits

Author SHA1 Message Date
Dale Johannesen
8e6309464b Fix an assertion message. 
llvm-svn: 47722
 2008-02-28 18:36:51 +00:00
Chris Lattner
f0329b6170 add a note 
llvm-svn: 47720
 2008-02-28 17:21:27 +00:00
Gabor Greif
fd0fb616f8 Fix http://llvm.org/bugs/show_bug.cgi?id=2104 by ordering lexicographically what gets printed. Be const-correct in PrintResults and uninline it too 
llvm-svn: 47712
 2008-02-28 08:38:45 +00:00
Evan Cheng
e1d3e0958b Set to default: x86 no longer fold and into test if it has more than one use. 
llvm-svn: 47711
 2008-02-28 07:46:38 +00:00
Evan Cheng
c390fa5e5e Keep track how many commutes are performed by the scheduler. 
llvm-svn: 47710
 2008-02-28 07:40:24 +00:00
Chris Lattner
c1851542a5 Sparc backend doesn't support debug info yet, mark the nodes as expand. This fixes a crash on 
test/DebugInfo/funccall.ll

llvm-svn: 47709
 2008-02-28 05:54:25 +00:00
Chris Lattner
a592f5c85b implement expand for ISD::DECLARE by just deleting it. 
llvm-svn: 47708
 2008-02-28 05:53:40 +00:00
Chris Lattner
f989deed26 Fix CodeGen/Generic/storetrunc-fp.ll on sparc, PR2105 
llvm-svn: 47707
 2008-02-28 05:48:04 +00:00
Chris Lattner
0f0fc0ccd4 fix CodeGen/Generic/2008-01-25-dag-combine-mul.ll on sparc, PR2105 
llvm-svn: 47706
 2008-02-28 05:44:20 +00:00
Chris Lattner
dab318a206 target-indep codegen memcpy lowering issue. 
llvm-svn: 47705
 2008-02-28 05:34:27 +00:00
Chris Lattner
33b1f491a0 Add a random not very important note 
llvm-svn: 47704
 2008-02-28 04:52:59 +00:00
Evan Cheng
f8b1257d2e Add a quick and dirty "loop aligner pass". x86 uses it to align its loops to 16-byte boundaries. 
llvm-svn: 47703
 2008-02-28 00:43:03 +00:00
Eli Friedman
912a1d48e1 A few more small things I've run into. 
llvm-svn: 47702
 2008-02-28 00:21:43 +00:00
Anton Korobeynikov
f8d5799001 EHPreferredDataFormat hook for PPC targets. Looks like Darwin 
uses the same encoding everywhere. Linux FIXME'ed.

llvm-svn: 47701
 2008-02-27 23:49:15 +00:00
Devang Patel
351830e819 Remove dead code. 
llvm-svn: 47700
 2008-02-27 23:33:51 +00:00
Anton Korobeynikov
7bd4b77e30 Preparation step for some cleanup/generalization in EH information emission: 
provide TAI hook for selection of EH data emission format. Currently unused.

llvm-svn: 47699
 2008-02-27 23:33:50 +00:00
Dale Johannesen
8039d40b76 Handle load/store of misaligned vectors that are the 
same size as an int type by doing a bitconvert of
load/store of the int type (same algorithm as floating point).
This makes them work for ppc Altivec.  There was some
code that purported to handle loads of (some) vectors
by splitting them into two smaller vectors, but getExtLoad
rejects subvector loads, so this could never have worked;
the patch removes it.

llvm-svn: 47696
 2008-02-27 22:36:00 +00:00
Dan Gohman
5d96a06b0b Don't hard-code the mask size to be 32, which is incorrect on ppc64 
and was causing aborts with the new APInt changes. This may also be
fixing an obscure ppc64 bug.

llvm-svn: 47692
 2008-02-27 21:12:32 +00:00
Evan Cheng
08f11a37d7 This is done. 
llvm-svn: 47688
 2008-02-27 20:26:32 +00:00
Evan Cheng
da92e34fe3 Fix a bug in dead spill slot elimination. 
llvm-svn: 47687
 2008-02-27 19:57:11 +00:00
Dan Gohman
16ba74da61 Remove the `else', at Evan's insistence. 
llvm-svn: 47686
 2008-02-27 19:44:57 +00:00
Duncan Sands
0139087442 Add a FIXME about the VECTOR_SHUFFLE evil hack. 
llvm-svn: 47676
 2008-02-27 17:39:13 +00:00
Lauro Ramos Venancio
8dc3548bdf Emit an error when a library is not found. It is the GNU ld behavior and it is expected by the configure scripts. 
llvm-svn: 47674
 2008-02-27 17:20:32 +00:00
Duncan Sands
77ff6715ad LegalizeTypes support for EXTRACT_VECTOR_ELT. The 
approach taken is different to that in LegalizeDAG
when it is a question of expanding or promoting the
result type: for example, if extracting an i64 from
a <2 x i64>, when i64 needs expanding, it bitcasts
the vector to <4 x i32>, extracts the appropriate
two i32's, and uses those for the Lo and Hi parts.
Likewise, when extracting an i16 from a <4 x i16>,
and i16 needs promoting, it bitcasts the vector to
<2 x i32>, extracts the appropriate i32, twiddles
the bits if necessary, and uses that as the promoted
value.  This puts more pressure on bitcast legalization,
and I've added the appropriate cases.  They needed to
be added anyway since users can generate such bitcasts
too if they want to.  Also, when considering various
cases (Legal, Promote, Expand, Scalarize, Split) it is
a pain that expand can correspond to Expand, Scalarize
or Split, so I've changed the LegalizeTypes enum so it
lists those different cases - now Expand only means
splitting a scalar in two.
The code produced is the same as by LegalizeDAG for
all relevant testcases, except for
2007-10-31-extractelement-i64.ll, where the code seems
to have improved (see below; can an expert please tell
me if it is better or not).
Before < vs after >.

<       subl    $92, %esp
<       movaps  %xmm0, 64(%esp)
<       movaps  %xmm0, (%esp)
<       movl    4(%esp), %eax
<       movl    %eax, 28(%esp)
<       movl    (%esp), %eax
<       movl    %eax, 24(%esp)
<       movq    24(%esp), %mm0
<       movq    %mm0, 56(%esp)
---
>       subl    $44, %esp
>       movaps  %xmm0, 16(%esp)
>       pshufd  $1, %xmm0, %xmm1
>       movd    %xmm1, 4(%esp)
>       movd    %xmm0, (%esp)
>       movq    (%esp), %mm0
>       movq    %mm0, 8(%esp)

<       subl    $92, %esp
<       movaps  %xmm0, 64(%esp)
<       movaps  %xmm0, (%esp)
<       movl    12(%esp), %eax
<       movl    %eax, 28(%esp)
<       movl    8(%esp), %eax
<       movl    %eax, 24(%esp)
<       movq    24(%esp), %mm0
<       movq    %mm0, 56(%esp)
---
>       subl    $44, %esp
>       movaps  %xmm0, 16(%esp)
>       pshufd  $3, %xmm0, %xmm1
>       movd    %xmm1, 4(%esp)
>       movhlps %xmm0, %xmm0
>       movd    %xmm0, (%esp)
>       movq    (%esp), %mm0
>       movq    %mm0, 8(%esp)

<       subl    $92, %esp
<       movaps  %xmm0, 64(%esp)
---
>       subl    $44, %esp

<       movl    16(%esp), %eax
<       movl    %eax, 48(%esp)
<       movl    20(%esp), %eax
<       movl    %eax, 52(%esp)
<       movaps  %xmm0, (%esp)
<       movl    4(%esp), %eax
<       movl    %eax, 60(%esp)
<       movl    (%esp), %eax
<       movl    %eax, 56(%esp)
---
>       pshufd  $1, %xmm0, %xmm1
>       movd    %xmm1, 4(%esp)
>       movd    %xmm0, (%esp)
>       movd    %xmm1, 12(%esp)
>       movd    %xmm0, 8(%esp)

<       subl    $92, %esp
<       movaps  %xmm0, 64(%esp)
---
>       subl    $44, %esp

<       movl    24(%esp), %eax
<       movl    %eax, 48(%esp)
<       movl    28(%esp), %eax
<       movl    %eax, 52(%esp)
<       movaps  %xmm0, (%esp)
<       movl    12(%esp), %eax
<       movl    %eax, 60(%esp)
<       movl    8(%esp), %eax
<       movl    %eax, 56(%esp)
---
>       pshufd  $3, %xmm0, %xmm1
>       movd    %xmm1, 4(%esp)
>       movhlps %xmm0, %xmm0
>       movd    %xmm0, (%esp)
>       movd    %xmm1, 12(%esp)
>       movd    %xmm0, 8(%esp)

llvm-svn: 47672
 2008-02-27 13:34:40 +00:00
Duncan Sands
4c1f3c0c5b LegalizeTypes support for legalizing the mask 
operand of a VECTOR_SHUFFLE.  The mask is a
vector of constant integers.  The code in
LegalizeDAG doesn't bother to legalize the
mask, since it's basically just storage for
a bunch of constants, however LegalizeTypes
is more picky.  The problem is that there may
not exist any legal vector-of-integers type
with a legal element type, so it is impossible
to create a legal mask!  Unless of course you
cheat by creating a BUILD_VECTOR where the
operands have a different type to the element
type of the vector being built...  This is
pretty ugly but works - all relevant tests in
the testsuite pass, and produce the same
assembler with and without LegalizeTypes.

llvm-svn: 47670
 2008-02-27 13:03:44 +00:00
Duncan Sands
cadfe810f3 LegalizeTypes support for INSERT_VECTOR_ELT. 
llvm-svn: 47669
 2008-02-27 10:18:23 +00:00
Evan Cheng
295ae42ede Don't track max alignment during stack object allocations since they can be deleted later. Let PEI compute it. 
llvm-svn: 47668
 2008-02-27 10:04:56 +00:00
Duncan Sands
f8ac836240 Support for legalizing MEMBARRIER. 
llvm-svn: 47667
 2008-02-27 08:53:44 +00:00
Bill Wendling
2cae66e28b Final de-tabification. 
llvm-svn: 47663
 2008-02-27 06:33:05 +00:00
Chris Lattner
d2a01e1994 Add path separator support, patch by Sam Bishop. 
llvm-svn: 47662
 2008-02-27 06:17:10 +00:00
Chris Lattner
1f46cc2345 Make X86TargetLowering::LowerSINT_TO_FP return without creating a dead 
stack slot and store if the  SINT_TO_FP is actually legal.  This allows
us to compile:

double a(double b) {return (unsigned)b;}

to:

_a:
	cvttsd2siq	%xmm0, %rax
	movl	%eax, %eax
	cvtsi2sdq	%rax, %xmm0
	ret

instead of:

_a:
	subq	$8, %rsp
	cvttsd2siq	%xmm0, %rax
	movl	%eax, %eax
	cvtsi2sdq	%rax, %xmm0
	addq	$8, %rsp
	ret

crazy.

llvm-svn: 47660
 2008-02-27 05:57:41 +00:00
Chris Lattner
f19162a87f this code is correct but strange looking ;-) 
llvm-svn: 47659
 2008-02-27 05:48:44 +00:00
Chris Lattner
bc686e546a Compile x86-64-and-mask.ll into: 
_test:
	movl	%edi, %eax
	ret

instead of:

_test:
        movl    $4294967295, %ecx
        movq    %rdi, %rax
        andq    %rcx, %rax
        ret

It would be great to write this as a Pat pattern that used subregs 
instead of a 'pseudo' instruction, but I don't know how to do that
in td files.

llvm-svn: 47658
 2008-02-27 05:47:54 +00:00
Evan Cheng
7553230e3a Spiller now remove unused spill slots. 
llvm-svn: 47657
 2008-02-27 03:04:06 +00:00
Dan Gohman
2042802d32 Teach Legalize how to expand an EXTRACT_ELEMENT. 
llvm-svn: 47656
 2008-02-27 01:52:30 +00:00
Dan Gohman
938e74654b Convert the last remaining users of the non-APInt form of 
ComputeMaskedBits to use the APInt form, and remove the
non-APInt form.

llvm-svn: 47654
 2008-02-27 01:23:58 +00:00
Devang Patel
c68e26f9fe Add comment. 
llvm-svn: 47653
 2008-02-27 01:20:54 +00:00
Chris Lattner
a81d716e0c add a note 
llvm-svn: 47652
 2008-02-27 01:17:20 +00:00
Dan Gohman
689d8cac04 Convert SimplifyDemandedMask and ShrinkDemandedConstant to use APInt. 
Change several cases in SimplifyDemandedMask that don't ever do any
simplifying to reuse the logic in ComputeMaskedBits instead of
duplicating it.

llvm-svn: 47648
 2008-02-27 00:25:32 +00:00
Devang Patel
4813397027 regenerate. 
llvm-svn: 47642
 2008-02-26 23:19:08 +00:00
Devang Patel
e696fb4f5a Add assert. 
llvm-svn: 47641
 2008-02-26 23:17:50 +00:00
Owen Anderson
eadd074b22 Fix an issue where GVN had the sizes of the two memcpy's reverse, resulting 
in an invalid transformation.

llvm-svn: 47639
 2008-02-26 23:06:17 +00:00
Devang Patel
98774b4b6a Add assert to check return type. 
llvm-svn: 47637
 2008-02-26 22:55:21 +00:00
Arnold Schwaighofer
642dc28734 Refactor according to Evan's and Anton's suggestions. 
llvm-svn: 47635
 2008-02-26 22:21:54 +00:00
Devang Patel
6229b52816 regenerate 
llvm-svn: 47634
 2008-02-26 22:17:48 +00:00
Devang Patel
5c00c6bafa Remove unncessary ReturnInst constructors. 
llvm-svn: 47633
 2008-02-26 22:12:58 +00:00
Chris Lattner
6318b4aee9 Use a smallvector for inactiveCounts and initialize it lazily 
instead of init'ing it maximally to zeros on entry.  getFreePhysReg
is pretty hot and only a few elements are typically used.  This speeds
up linscan by 5% on 176.gcc.

llvm-svn: 47631
 2008-02-26 22:08:41 +00:00
Bill Wendling
8fb166bf6c Rename PrintableName to Name. 
llvm-svn: 47629
 2008-02-26 21:47:57 +00:00
Bill Wendling
50f5c4be14 Change "Name" to "AsmName" in the target register info. Gee, a refactoring tool 
would have been a Godsend here!

llvm-svn: 47625
 2008-02-26 21:11:01 +00:00
Evan Cheng
701b6a1dc3 Enable -coalescer-commute-instrs by default. 
llvm-svn: 47623
 2008-02-26 20:40:22 +00:00