Chris Lattner
caed5bc79b
Fix comment
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llvm-svn: 23686
2005-10-10 16:52:03 +00:00
Chris Lattner
58f0f21ed1
Add ISD::ADD to MaskedValueIsZero
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llvm-svn: 23685
2005-10-10 16:51:40 +00:00
Chris Lattner
5b6e18d6fd
This function is now dead
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llvm-svn: 23684
2005-10-10 16:49:22 +00:00
Chris Lattner
29613bce04
Enable Nate's excellent DAG combiner work by default. This allows the
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removal of a bunch of ad-hoc and crufty code from SelectionDAG.cpp.
llvm-svn: 23682
2005-10-10 16:47:10 +00:00
Chris Lattner
1a77897107
These definitions have been moved to common code.
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llvm-svn: 23681
2005-10-10 06:01:00 +00:00
Chris Lattner
2b9c260832
Pull DAG ISel generation nodes out of the PowerPC backend to where they
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can be used by other targets. For those targets that want to use it,
have at. :)
llvm-svn: 23680
2005-10-10 06:00:30 +00:00
Chris Lattner
097b306215
add a todo for something I noticed
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llvm-svn: 23679
2005-10-09 22:59:08 +00:00
Chris Lattner
d0eecf4e64
(X & Y) & C == 0 if either X&C or Y&C are zero
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llvm-svn: 23678
2005-10-09 22:12:36 +00:00
Chris Lattner
1809933a31
Make MaskedValueIsZero a bit more aggressive
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llvm-svn: 23677
2005-10-09 22:08:50 +00:00
Andrew Lenharth
bfa54fe229
This seems useful from the original patch that added the function. If there is a reason it is not useful on a RISC type target, let me know and I will pull it out
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llvm-svn: 23676
2005-10-09 20:11:35 +00:00
Chris Lattner
d4ff47daf6
Fix funky xcode indentation
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llvm-svn: 23674
2005-10-09 06:36:35 +00:00
Chris Lattner
f6c2411c40
Hrm, you didn't see this.
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llvm-svn: 23673
2005-10-09 06:24:02 +00:00
Chris Lattner
6fa98d5979
Fix a source of non-determinism in the backend: the order of processing
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IV strides dependend on the pointer order of the strides in memory.
Non-determinism is bad.
llvm-svn: 23672
2005-10-09 06:20:55 +00:00
Chris Lattner
d5ac294abd
When emiting a CopyFromReg and the source is already a vreg, do not bother
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creating a new vreg and inserting a copy: just use the input vreg directly.
This speeds up the compile (e.g. about 5% on mesa with a debug build of llc)
by not adding a bunch of copies and vregs to be coallesced away. On mesa,
for example, this reduces the number of intervals from 168601 to 129040
going into the coallescer.
llvm-svn: 23671
2005-10-09 05:58:56 +00:00
Chris Lattner
97ee5c7f18
Disable formation of rlwinm instructions from SRA bases. This fixes
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the 177.mesa failure from last night, and fixes the
CodeGen/PowerPC/2005-10-08-ArithmeticRotate.ll regression test I added.
If this code cannot be fixed, it should be removed for good, but I'll leave
it to Nate to decide its fate.
llvm-svn: 23670
2005-10-09 05:36:17 +00:00
Chris Lattner
d5397ddd27
Testcase that is miscompiled by the ppc backend
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llvm-svn: 23669
2005-10-09 05:31:47 +00:00
Nate Begeman
ef7172f7b3
Remove another unused file. Preparing for the great "enable i64 on ppc32"
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merge, and using subtarget info for ptr size.
llvm-svn: 23668
2005-10-08 01:32:34 +00:00
Chris Lattner
2800856064
remove a comma to compile with pedantic gcc
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llvm-svn: 23667
2005-10-08 01:24:19 +00:00
Nate Begeman
77c1ff0239
Remove a file that is no longer used
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llvm-svn: 23666
2005-10-08 01:21:27 +00:00
Nate Begeman
8feae2fcc9
Lo and behold, the last bits of SelectionDAG.cpp have been moved over.
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llvm-svn: 23665
2005-10-08 00:29:44 +00:00
Chris Lattner
6809d07aa5
When preselecting, favor things that have low depth to select first. This
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is faster and uses less stack space. This reduces our stack requirement
enough to compile sixtrack, and though it's a hack, should be enough until
we switch to iterative isel
llvm-svn: 23664
2005-10-07 22:10:27 +00:00
Chris Lattner
f8b0332dfc
remove debugging code
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llvm-svn: 23663
2005-10-07 15:31:26 +00:00
Chris Lattner
dff6183cd7
implement CodeGen/PowerPC/div-2.ll:test2-4 by propagating zero bits through
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C-X's
llvm-svn: 23662
2005-10-07 15:30:32 +00:00
Chris Lattner
eab561a2e6
These don't need to be sdivs.
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llvm-svn: 23661
2005-10-07 15:27:12 +00:00
Chris Lattner
5e0581c32b
fix indentation
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llvm-svn: 23660
2005-10-07 06:37:02 +00:00
Chris Lattner
36b58a015b
Turn sdivs into udivs when we can prove the sign bits are clear. This
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implements CodeGen/PowerPC/div-2.ll
llvm-svn: 23659
2005-10-07 06:10:46 +00:00
Chris Lattner
720d11da49
New testcase, should turn into a ushr
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llvm-svn: 23658
2005-10-07 06:10:03 +00:00
Jeff Cohen
3151f1ba38
Remove prolific source of VC++ truncation warnings.
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llvm-svn: 23657
2005-10-07 05:29:25 +00:00
Jeff Cohen
3c6db93125
Remove useless variable.
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llvm-svn: 23656
2005-10-07 05:28:29 +00:00
Chris Lattner
5adabfc4fb
add a hack to work around broken VC++ scoping rules. Thx to JeffC for pointing
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this out to me
llvm-svn: 23655
2005-10-07 05:23:36 +00:00
Chris Lattner
8481412db8
Fix a CQ regression from my patch to split F32/F64 into seperate register
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classes on PPC. We were emitting fmr instructions to do fp extensions, which
weren't getting coallesced. This fixes Regression/CodeGen/PowerPC/fpcopy.ll
llvm-svn: 23654
2005-10-07 05:00:52 +00:00
Chris Lattner
8741e905da
double to float casts should nto result in an fmr
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llvm-svn: 23653
2005-10-07 04:59:41 +00:00
Chris Lattner
9be9eb2f7f
Fix CodeGen/Generic/bool-to-double.ll
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llvm-svn: 23652
2005-10-07 04:50:48 +00:00
Chris Lattner
d61ac59816
test broken in the IA64 backend.
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llvm-svn: 23651
2005-10-07 04:49:00 +00:00
Chris Lattner
f572bec811
Pull out Call, reducing stack frame size from 6032 bytes to 5184 bytes.
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llvm-svn: 23650
2005-10-06 19:07:45 +00:00
Chris Lattner
0e0c65b680
Pull out setcc, this reduces stack frame size from 7520 to 6032 bytes
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llvm-svn: 23649
2005-10-06 19:03:35 +00:00
Chris Lattner
0e97719aa3
Pull two more methods out, reducing stack frame size from 8224 -> 7520 bytes
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llvm-svn: 23648
2005-10-06 18:56:10 +00:00
Chris Lattner
4b1b6161ef
Add a recursive-iterative hybrid stage to attempt to reduce stack space, this
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helps but not enough.
Start pulling cases out of PPC32DAGToDAGISel::Select. With GCC 4, this function
required 8512 bytes of stack space for each invocation (GCC 3 required less
than 700 bytes). Pulling this first function out gets us down to 8224. More
to come :(
llvm-svn: 23647
2005-10-06 18:45:51 +00:00
Chris Lattner
7709ee0085
silence a bogus GCC warning
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llvm-svn: 23646
2005-10-06 17:39:10 +00:00
Chris Lattner
3b848038ab
Fix the LLC regressions on X86 last night. In particular, when undoing
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previous copy elisions and we discover we need to reload a register, make
sure to use the regclass of the original register for the reload, not the
class of the current register. This avoid using 16-bit loads to reload 32-bit
values.
llvm-svn: 23645
2005-10-06 17:19:06 +00:00
Andrew Lenharth
c9e3e3ee73
This is suppose to work now
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llvm-svn: 23644
2005-10-06 16:54:29 +00:00
Andrew Lenharth
a3b71accf4
remove VAX compatibility instruction, we will never use this
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llvm-svn: 23643
2005-10-06 16:53:32 +00:00
Chris Lattner
0f04d333d5
Make the legalizer completely non-recursive
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llvm-svn: 23642
2005-10-06 01:20:27 +00:00
Nate Begeman
85d4334da0
Let the combiner handle more cases
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llvm-svn: 23641
2005-10-05 21:44:43 +00:00
Nate Begeman
cf23a9a328
Remove some bad code from Legalize
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llvm-svn: 23640
2005-10-05 21:44:10 +00:00
Nate Begeman
a34475adfc
Check in some more DAGCombiner pieces
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llvm-svn: 23639
2005-10-05 21:43:42 +00:00
Chris Lattner
5afc88fe07
Fix a bug in the local spiller, where we could take code like this:
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store r12 -> [ss#2]
R3 = load [ss#1]
use R3
R3 = load [ss#2]
R4 = load [ss#1]
and turn it into this code:
store R12 -> [ss#2]
R3 = load [ss#1]
use R3
R3 = R12
R4 = R3 <- oops!
The problem was that promoting R3 = load[ss#2] to a copy missed the fact that
the instruction invalidated R3 at that point.
llvm-svn: 23638
2005-10-05 18:30:19 +00:00
Chris Lattner
e4feaa3bea
silence some warnings
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llvm-svn: 23637
2005-10-05 17:15:09 +00:00
Chris Lattner
7f1bde4996
implement visitBR_CC so that PowerPC/inverted-bool-compares.ll passes
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with the dag combiner. This speeds up espresso by 8%, reaching performance
parity with the dag-combiner-disabled llc.
llvm-svn: 23636
2005-10-05 06:47:48 +00:00
Chris Lattner
27adcf1b0f
fix some pastos
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llvm-svn: 23635
2005-10-05 06:37:22 +00:00