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4790 Commits

Author SHA1 Message Date
Evan Cheng
cb9fb051a5 - Clean up the lowering and selection code of ConstantPool, GlobalAddress, 
and ExternalSymbol.
- Use C++ code (rather than tblgen'd selection code) to match the above
  mentioned leaf nodes. Do not mutate and nodes and do not record the
  selection in CodeGenMap. These nodes should be safe to duplicate. This is
  a performance win.

llvm-svn: 26335
 2006-02-23 20:41:18 +00:00
Chris Lattner
cdbd9d6d4c Implement the PPC inline asm "L" modifier. This allows us to compile: 
long long test(long long X) {
  __asm__("foo %0 %L0 %1 %L1" : "=r"(X): "r"(X));
  return X;
}

to:
        foo r2 r3 r2 r3

llvm-svn: 26333
 2006-02-23 19:31:10 +00:00
Chris Lattner
72d24be146 "." isn't enough to get a private label on linux, use ".L". 
llvm-svn: 26327
 2006-02-23 05:25:02 +00:00
Chris Lattner
23b302ce83 add a small and simple case. 
llvm-svn: 26326
 2006-02-23 05:17:43 +00:00
Evan Cheng
a85c267431 A couple of new entries. 
llvm-svn: 26325
 2006-02-23 02:50:21 +00:00
Evan Cheng
2977507828 PIC related bug fixes. 
1. Various asm printer bug.
2. Lowering bug. Now TargetGlobalAddress is wrapped in X86ISD::TGAWrapper.

llvm-svn: 26324
 2006-02-23 02:43:52 +00:00
Evan Cheng
b8000b03aa X86 codegen tweak to use lea in another case: 
Suppose base == %eax and it has multiple uses, then instead of
  movl %eax, %ecx
  addl $8, %ecx
use
  leal 8(%eax), %ecx.

llvm-svn: 26323
 2006-02-23 00:13:58 +00:00
Evan Cheng
4e31b8eaed Missing .globl for weak / link-once .text symbols. 
llvm-svn: 26321
 2006-02-22 23:59:57 +00:00
Chris Lattner
db19979bea Don't return registers from register classes that aren't legal. 
llvm-svn: 26317
 2006-02-22 23:00:51 +00:00
Evan Cheng
305141c1ba - Added option -relocation-model to set relocation model. Valid values include static, pic, 
dynamic-no-pic, and default.
PPC and x86 default is dynamic-no-pic for Darwin, pic for others.
- Removed options -enable-pic and -ppc-static.

llvm-svn: 26315
 2006-02-22 20:19:42 +00:00
Jim Laskey
b62a583c99 Coordinate activities with llvm-gcc4 and dwarf. 
llvm-svn: 26314
 2006-02-22 19:02:11 +00:00
Evan Cheng
005de9e2bb Added MMX, SSE1, and SSE2 vector instructions and some simple patterns. 
Fixed some existing bugs (wrong predicates, prefixes) at the same time.

llvm-svn: 26310
 2006-02-22 02:26:30 +00:00
Chris Lattner
6bb2c3e9cd split register class handling from explicit physreg handling. 
llvm-svn: 26308
 2006-02-22 00:56:39 +00:00
Chris Lattner
a124432746 Updates to match change of getRegForInlineAsmConstraint prototype 
llvm-svn: 26305
 2006-02-21 23:11:00 +00:00
Evan Cheng
8ab6294f94 One more round of reorg so sabre doesn't freak out. :-) 
llvm-svn: 26303
 2006-02-21 20:00:20 +00:00
Evan Cheng
f7296d8fa5 A big more cleaning up. 
llvm-svn: 26302
 2006-02-21 19:30:30 +00:00
Evan Cheng
223d3a073a Moving things to their proper places. 
llvm-svn: 26301
 2006-02-21 19:26:52 +00:00
Evan Cheng
fee17dfff8 Split instruction info into multiple files, one for each of x87, MMX, and SSE. 
llvm-svn: 26300
 2006-02-21 19:13:53 +00:00
Chris Lattner
5d8ecbe2e5 missed optzn 
llvm-svn: 26299
 2006-02-21 18:29:44 +00:00
Chris Lattner
dfdfc6b22d The HasNoV9 hack isn't needed here, now that tblgen knows that CustomDAGSchedInserter 
instructions are expensive.

llvm-svn: 26298
 2006-02-21 18:04:32 +00:00
Evan Cheng
89553f1e86 Added separate alias instructions for SSE logical ops that operate on non-packed types. 
llvm-svn: 26297
 2006-02-21 02:24:38 +00:00
Evan Cheng
e68325d8aa Added MMX and XMM packed integer move instructions, movd and movq. 
llvm-svn: 26296
 2006-02-21 01:39:57 +00:00
Evan Cheng
1b23fdda1a Added SSE2 128-bit integer packed types: V16I8, V8I16, V4I32, and V2I64. 
Added generic vector types: VR64 and VR128.

llvm-svn: 26295
 2006-02-21 01:38:21 +00:00
Evan Cheng
6a9422ce1c Added x86 integer vector types: 64-bit packed byte integer (v16i8), 64-bit 
packed word integer (v8i16), and 64-bit packed doubleword integer (v2i32).

llvm-svn: 26294
 2006-02-20 22:34:53 +00:00
Evan Cheng
a0f9da472a Some updates 
llvm-svn: 26292
 2006-02-20 19:58:27 +00:00
Evan Cheng
063df91002 If SSE3 is available, promote FP_TO_UINT i32 to FP_TO_SINT i64 to take 
advantage of fisttpll.

llvm-svn: 26288
 2006-02-18 07:26:17 +00:00
Nate Begeman
d89b8719f3 Add a fold for add that exchanges it with a constant shift if possible, so 
that the shift may be more easily folded into other operations.

llvm-svn: 26286
 2006-02-18 02:43:25 +00:00
Evan Cheng
b3d9ee74ad Added fisttp for fp to int conversion. 
llvm-svn: 26283
 2006-02-18 02:36:28 +00:00
Evan Cheng
d2ad380df9 Disable PIC for JIT. 
llvm-svn: 26281
 2006-02-18 01:49:25 +00:00
Evan Cheng
09bd678546 Jit does not support PIC yet. 
llvm-svn: 26278
 2006-02-18 00:57:10 +00:00
Evan Cheng
bf3558a375 x86 / Darwin PIC support. 
llvm-svn: 26273
 2006-02-18 00:15:05 +00:00
Evan Cheng
c4cda2b89a Moved PICEnabled to include/llvm/Target/TargetOptions.h 
llvm-svn: 26272
 2006-02-18 00:08:58 +00:00
Chris Lattner
3a899dbbc8 unbreak the build 
llvm-svn: 26260
 2006-02-17 07:09:27 +00:00
Evan Cheng
330fd348ff Unbreak x86 be 
llvm-svn: 26259
 2006-02-17 07:01:52 +00:00
Nate Begeman
9c0ab71f4a kill ADD_PARTS & SUB_PARTS and replace them with fancy new ADDC, ADDE, SUBC 
and SUBE nodes that actually expose what's going on and allow for
significant simplifications in the targets.

llvm-svn: 26255
 2006-02-17 05:43:56 +00:00
Chris Lattner
13dd179299 add note about div by power of 2 
llvm-svn: 26253
 2006-02-17 04:20:13 +00:00
Jeff Cohen
04caf92624 Fix bug noticed by VC++. 
llvm-svn: 26252
 2006-02-17 02:12:18 +00:00
Nate Begeman
224405b002 Whoops, didn't mean to check this in yet. 
llvm-svn: 26250
 2006-02-17 00:56:19 +00:00
Nate Begeman
7269afbf38 Add a missing and useful pat frag 
llvm-svn: 26249
 2006-02-17 00:51:06 +00:00
Evan Cheng
c7b32ddecc Remind ourselves to revisit the "pxor vs. xorps/xorpd to clear XMM registers" 
issue. Need to do more experiments.

llvm-svn: 26247
 2006-02-17 00:04:28 +00:00
Nate Begeman
b0ec087c0f Kill the x86 pattern isel. boom. 
llvm-svn: 26246
 2006-02-17 00:03:04 +00:00
Evan Cheng
3d0135afdc Remove the entry about using movapd for SSE reg-reg moves. 
llvm-svn: 26245
 2006-02-17 00:00:58 +00:00
Evan Cheng
9de0ad321a pxor (for FLD0SS) encoding was missing the OpSize prefix. 
llvm-svn: 26244
 2006-02-16 23:59:30 +00:00
Chris Lattner
585198f5a8 Remove the skeleton target, it doesn't produce useful code and there are 
other small targets that do that can be learned from.  They also have
the added advantage of being tested :)

llvm-svn: 26243
 2006-02-16 23:14:50 +00:00
Evan Cheng
bf4008c701 1. Use pxor instead of xoraps / xorapd to clear FR32 / FR64 registers. This 
proves to be worth 20% on Ptrdist/ks. Might be related to dependency
   breaking support.
2. Added FsMOVAPSrr and FsMOVAPDrr as aliases to MOVAPSrr and MOVAPDrr. These
   are used for FR32 / FR64 reg-to-reg copies.
3. Tell reg-allocator to generate MOVSSrm / MOVSDrm and MOVSSmr / MOVSDmr to
   spill / restore FsMOVAPSrr and FsMOVAPDrr.

llvm-svn: 26241
 2006-02-16 22:45:17 +00:00
Evan Cheng
447c171afd Use movaps / movapd to spill / restore V4F4 / V2F8 registers. 
llvm-svn: 26240
 2006-02-16 21:20:26 +00:00
Nate Begeman
0bc71999b9 Rework the SelectionDAG-based implementations of SimplifyDemandedBits 
and ComputeMaskedBits to match the new improved versions in instcombine.
Tested against all of multisource/benchmarks on ppc.

llvm-svn: 26238
 2006-02-16 21:11:51 +00:00
Evan Cheng
af9730a217 MOVAPSrr and MOVAPDrr instruction format should be MRMSrcReg. 
llvm-svn: 26234
 2006-02-16 19:34:41 +00:00
Duraid Madina
3fcb00a53f distinguish between objects and register names, now we can have stuff 
with names like "f84", "in6" etc etc.

this should fix one or two tests

llvm-svn: 26232
 2006-02-16 13:12:57 +00:00
Evan Cheng
131901cbb8 If the false case is the current basic block, then this is a self loop. 
We do not want to emit "Loop: ... brcond Out; br Loop", as it adds an extra
instruction in the loop.  Instead, invert the condition and emit
"Loop: ... br!cond Loop; br Out.

Generalize the fix by moving it from PPCDAGToDAGISel to SelectionDAGLowering.

llvm-svn: 26231
 2006-02-16 08:27:56 +00:00