Commit Graph

80622 Commits

Author SHA1 Message Date
Akira Hatanaka
3b3ee53886 Add an option to use a virtual register as the global base register instead of
reserving a physical register ($gp or $28) for that purpose.

This will completely eliminate loads that restore the value of $gp after every
function call, if the register allocator assigns a callee-saved register, or
eliminate unnecessary loads if it assigns a temporary register. 

example:

.cpload $25       // set $gp.
...
.cprestore 16     // store $gp to stack slot 16($sp).
...
jalr $25          // function call. clobbers $gp.
lw $gp, 16($sp)   // not emitted if callee-saved reg is chosen.
...
lw $2, 4($gp)
...
jalr $25          // function call.
lw $gp, 16($sp)   // not emitted if $gp is not live after this instruction.
...

llvm-svn: 151402
2012-02-24 22:34:47 +00:00
Benjamin Kramer
62ed7b9b09 Remove unused cl::opt, make another opt static.
llvm-svn: 151398
2012-02-24 22:09:25 +00:00
Jakob Stoklund Olesen
090f01cde9 Add missing static
llvm-svn: 151396
2012-02-24 21:52:44 +00:00
Ahmed Charles
1f34683467 Fix undefined behavior.
llvm-svn: 151385
2012-02-24 19:06:15 +00:00
Jim Grosbach
33082fabe9 Thumb2 asm aliases for wide bitwise w/ immediate instructions.
llvm-svn: 151384
2012-02-24 19:06:05 +00:00
Chris Lattner
b01936f21a fix PR12075, a regression in a recent transform I added. In unreachable code, gep chains can be infinite. Just like "stripPointerCasts", use a set to keep track of visited instructions so we don't recurse infinitely.
llvm-svn: 151383
2012-02-24 19:01:58 +00:00
Michael J. Spencer
d2f0ce2674 Add WIN_FTOL_* psudo-instructions to model the unique calling convention
used by the Win32 _ftol2 runtime function. Patch by Joe Groff!

llvm-svn: 151382
2012-02-24 19:01:22 +00:00
Jakob Stoklund Olesen
c077e0f945 Add a -stress-regalloc=<N> option.
This will limit all register classes to N registers in order to stress
test register allocation.

llvm-svn: 151379
2012-02-24 18:34:20 +00:00
Hal Finkel
784c4bf068 X11/X2 loads around indirect calls on ppc64 should not be deleted.
llvm-svn: 151374
2012-02-24 17:54:01 +00:00
Hal Finkel
8c2c90c035 Don't crash when a glue node contains an internal CopyToReg
This is necessary to support the existing ppc lowering code for indirect calls.
Fixes PR12071.

llvm-svn: 151373
2012-02-24 17:53:59 +00:00
Duncan Sands
30c1ce0834 Teach GVN that x+y is the same as y+x and that x<y is the same as y>x.
llvm-svn: 151365
2012-02-24 15:16:31 +00:00
Benjamin Kramer
993a8a86dd SDAGBuilder: Remove register sets that were never read and prune dead code surrounding it.
llvm-svn: 151364
2012-02-24 14:01:17 +00:00
Kristof Beyls
3f16b0ead0 test commit. removing unnecessary whitespace.
llvm-svn: 151363
2012-02-24 13:52:45 +00:00
NAKAMURA Takumi
d8b4183963 test/CodeGen/X86/2012-02-23-mmx-inlineasm.ll: Fixup to add -march=x86.
-mcpu does not choose arch automatically, on non-x86 hosts.

llvm-svn: 151362
2012-02-24 13:29:50 +00:00
Richard Osborne
7a75ee5a60 Remove dead code.
Patch by Ahmed Charles

llvm-svn: 151360
2012-02-24 11:49:08 +00:00
Duncan Sands
4c85da8a2a Workaround a miscompilation by gcc-4.3 that showed up as a failure
of the StringRef.Split2 unittest on 32 bit machines.

llvm-svn: 151358
2012-02-24 09:01:34 +00:00
Nick Lewycky
04735e1180 ScheduleDAGInstrs.h:155: warning: suggest parentheses around &&' within ||'.
llvm-svn: 151355
2012-02-24 07:59:05 +00:00
Andrew Trick
5c9371d10f PostRA sched: speed up physreg tracking by not abusing SparseSet.
llvm-svn: 151348
2012-02-24 07:04:55 +00:00
Jim Grosbach
34ae41aecb ARM Thumb symbol references in assembly need the low bit set.
Add support for a missed case when the symbols in a difference
expression are in the same section but not the same fragment.

rdar://10924681

llvm-svn: 151345
2012-02-24 05:12:18 +00:00
Pete Cooper
135769381b Turn avx insert intrinsic calls into INSERT_SUBVECTOR DAG nodes and remove duplicate patterns for selecting the intrinsics
llvm-svn: 151342
2012-02-24 03:51:49 +00:00
Jia Liu
1d8120ee28 comment fix
llvm-svn: 151341
2012-02-24 02:17:26 +00:00
Jia Liu
eddbcf6466 some comment fix
llvm-svn: 151340
2012-02-24 02:15:57 +00:00
Jia Liu
f3960e4994 comment fix
llvm-svn: 151339
2012-02-24 02:15:21 +00:00
Jia Liu
78fac035dd replace a balnk with -
llvm-svn: 151337
2012-02-24 02:05:28 +00:00
Eric Christopher
ea7403bfe2 If the Address of a variable is an argument then treat the entire
variable declaration as an argument because we want that address
anyhow for our debug information.

This seems to fix rdar://9965111, at least we have more debug
information than before and from reading the assembly it appears
to be the correct location.

llvm-svn: 151335
2012-02-24 01:59:08 +00:00
Eric Christopher
a4f94b0c3e Tabs, formatting and long lines oh my!
llvm-svn: 151334
2012-02-24 01:59:01 +00:00
Jia Liu
385123e423 80 columns of Mips InstPrinter Makefile
llvm-svn: 151332
2012-02-24 01:47:01 +00:00
Jakob Stoklund Olesen
a199ee0be3 Switch ARM target to register masks.
I'll let the buildbots determine the compile time improvements from this
change, but 464.h264ref has 5% faster codegen at -O2.

This patch does cause some assembly changes.  Branch folding can make
different decisions about calls with dead return values.
CriticalAntiDepBreaker may choose different registers because its
liveness tracking is affected.  MachineCopyPropagation may sometimes
leave a dead copy behind.

llvm-svn: 151331
2012-02-24 01:19:29 +00:00
Jim Grosbach
2f070e028c Make sure the regs are low regs for tMUL size reduction.
llvm-svn: 151318
2012-02-24 00:53:11 +00:00
Jim Grosbach
4ff2fb2fbc Thumb2 size reduction fix for tied operands of tMUL.
The tied source operand of tMUL is the second source operand, not the
first like every other two-address thumb instruction. Special case it
in the size reduction pass to make sure we create the tMUL instruction
properly.

llvm-svn: 151315
2012-02-24 00:33:36 +00:00
NAKAMURA Takumi
46bbb96031 EE/Interpreter/ExternalFunctions.cpp: Staticize lle_X_() entries. They can be mapped in FuncNames[] at the initialization.
llvm-svn: 151313
2012-02-24 00:20:08 +00:00
NAKAMURA Takumi
41108855f5 EE/Interpreter/ExternalFunctions.cpp: Prune "C" linkage to suppress warnings with -Wreturn-type (and MSC's w4190).
In historical reason, Interpreter's external entries had prefix "lle_X_" as C linkage, even for well-known entries in EE/Interpreter.
Now, at least on ToT, they are resolved via FuncNames[] mapper.
We will not need their symbols are expected to be exported any more.

Clang r150128 has introduced the warning <"%0 has C-linkage specified, but returns user-defined type %1 which is incompatible with C">.

llvm-svn: 151312
2012-02-24 00:19:58 +00:00
Dan Gohman
8da4093a80 When emitting a cmp with 0 for a lowered select, mask out the high
bits of the value carying the boolean condition, as their contents
are undefined. This fixes rdar://10887484.

llvm-svn: 151310
2012-02-24 00:09:36 +00:00
Jim Grosbach
91a77a9ddb Release not for ARM integrated assembler support.
llvm-svn: 151308
2012-02-23 23:52:06 +00:00
Bill Wendling
1a35321235 Allow an integer to be converted into an MMX type when it's used in an inline
asm.
<rdar://problem/10106006>

llvm-svn: 151303
2012-02-23 23:25:25 +00:00
Chad Rosier
af1ee4da6c Typo.
llvm-svn: 151302
2012-02-23 23:21:22 +00:00
Michael J. Spencer
ba986d585c Emit global ctors into .CRT$XCU instead of .ctors on Win32. Patch by Joe Groff!
llvm-svn: 151289
2012-02-23 21:56:08 +00:00
Chad Rosier
403f29c9c4 The LLVM Getting Started documentation is out of date. It would be nice if
someone could update this, but for now at least reference the Clang Getting
Started document, which is much more current.

llvm-svn: 151285
2012-02-23 21:23:24 +00:00
Benjamin Kramer
6fe4d97e20 Bump SmallString to the minimum required amount for raw_ostream to avoid allocation.
It's is a bit annoying, we should hide this implementation detail better.

llvm-svn: 151284
2012-02-23 21:15:21 +00:00
Benjamin Kramer
56f99527e7 Replace a DenseSet with SmallPtrSet.
SmallSet of pointer is the same as SmallPtrSet, use the latter directly.

llvm-svn: 151281
2012-02-23 20:53:02 +00:00
Roman Divacky
35c45da372 MCize function entry label emission on PowerPC64 properly.
llvm-svn: 151278
2012-02-23 20:28:39 +00:00
Benjamin Kramer
386c7b5901 BitVectorize loop.
llvm-svn: 151274
2012-02-23 19:29:25 +00:00
Benjamin Kramer
33ba1e7f2b post-ra-sched: Turn the KillIndices vector into a bitvector, it only stored two meaningful states.
Rename it to LiveRegs to make it more clear what's stored inside.

llvm-svn: 151273
2012-02-23 19:15:40 +00:00
Benjamin Kramer
d18bd5e885 post-ra-sched: Replace a std::set of regs with a bitvector.
Assuming that a single std::set node adds 3 control words, a bitvector
can store (3*8+4)*8=224 registers in the allocated memory of a single
element in the std::set (x86_64). Also we don't have to call malloc
for every register added.

llvm-svn: 151269
2012-02-23 18:28:32 +00:00
Kevin Enderby
4e089c2b5b Updated the llvm-mc disassembler C API to support for the X86 target.
rdar://10873652

As part of this I updated the llvm-mc disassembler C API to always call the
SymbolLookUp call back even if there is no getOpInfo call back.  If there is a
getOpInfo call back that is tried first and then if that gets no information
then the  SymbolLookUp is called.  I also made the code more robust by
memset(3)'ing to zero the LLVMOpInfo1 struct before then setting
SymbolicOp.Value before for the call to getOpInfo.  And also don't use any
values from the  LLVMOpInfo1 struct if getOpInfo returns 0.  And also don't
use any of the ReferenceType or ReferenceName values from SymbolLookUp if it
returns NULL. rdar://10873563 and rdar://10873683

For the X86 target also fixed bugs so the annotations get printed. 

Also fixed a few places in the ARM target that was not producing symbolic
operands for some instructions.  rdar://10878166

llvm-svn: 151267
2012-02-23 18:18:17 +00:00
Brendon Cahoon
0f7dc15d51 Fix the numbering of some of the registers and reclassify a couple of them.
Also, some basic clean up.  Patch by Evandro Menezes.

llvm-svn: 151266
2012-02-23 18:17:17 +00:00
Jakob Stoklund Olesen
030f090aee Make calls scheduling boundaries post-ra.
Before register allocation, instructions can be moved across calls in
order to reduce register pressure.  After register allocation, we don't
gain a lot by moving callee-saved defs across calls.  In fact, since the
scheduler doesn't have a good idea how registers are used in the callee,
it can't really make good scheduling decisions.

This changes the schedule in two ways: 1. Latencies to call uses and
defs are no longer accounted for, causing some random shuffling around
calls.  This isn't really a problem since those uses and defs are
inaccurate proxies for what happens inside the callee.  They don't
represent registers used by the call instruction itself.

2. Instructions are no longer moved across calls.  This didn't happen
very often, and the scheduling decision was made on dubious information
anyway.

As with any scheduling change, benchmark numbers shift around a bit,
but there is no positive or negative trend from this change.

This makes the post-ra scheduler 5% faster for ARM targets.

The secret motivation for this patch is the introduction of register
mask operands representing call clobbers.  The most efficient way of
handling regmasks in ScheduleDAGInstrs is to model them as barriers for
physreg live ranges, but not for virtreg live ranges.  That's fine
pre-ra, but post-ra it would have the same effect as this patch.

llvm-svn: 151265
2012-02-23 17:54:21 +00:00
Benjamin Kramer
4cd3b0e4e6 Reflow code, no functionality change.
llvm-svn: 151262
2012-02-23 17:42:19 +00:00
Jakob Stoklund Olesen
3809cf9ffe Make tests less sensitive to scheduling changes.
llvm-svn: 151260
2012-02-23 17:19:34 +00:00
Benjamin Kramer
3839bfa8d6 Strip a layer of boilerplate from the VLIWPacketizer by storing the scheduler as an opaque pointer.
llvm-svn: 151252
2012-02-23 13:39:13 +00:00