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15532 Commits

Author SHA1 Message Date
Evan Cheng
cf5ed3cd53 Add operand cycles for vldr / vstr. 
llvm-svn: 115353
 2010-10-01 21:40:30 +00:00
Eric Christopher
669452e47f Direct calls only for arm fast isel for now. 
llvm-svn: 115350
 2010-10-01 21:33:12 +00:00
Evan Cheng
fc1aee5b3c NEON scheduling info fix. vmov reg, reg are single cycle instructions. 
llvm-svn: 115344
 2010-10-01 20:50:58 +00:00
Eric Christopher
7daf669802 Fix thinko on store instructions. Fixes test_indvars failure. 
llvm-svn: 115342
 2010-10-01 20:46:04 +00:00
Owen Anderson
e93e24ee5d Make the spelling of the flags for old-style if-conversion heuristics consistent between ARM and Thumb2. 
llvm-svn: 115341
 2010-10-01 20:33:47 +00:00
Owen Anderson
d6aa3da08e Provide an option to restore old-style if-conversion heuristics for Thumb2. 
llvm-svn: 115339
 2010-10-01 20:28:06 +00:00
Evan Cheng
c7c6c2d04d Per Cortex-A9 pipeline diagram. AGU (core load / store issue) and NEON/FP issue are multiplexed. Model it correctly. 
llvm-svn: 115332
 2010-10-01 19:41:46 +00:00
Jim Grosbach
1a837b8495 grammar 
llvm-svn: 115314
 2010-10-01 14:57:48 +00:00
Benjamin Kramer
65131b20b4 Delete token *after* reading from it. 
llvm-svn: 115311
 2010-10-01 12:25:27 +00:00
Kalle Raiskila
c6bdc97934 Zap some redundant 'ori $?, $?, 0' from SPU. 
Also remove some code that died in the process.
One now non-existant ori is checked for.

llvm-svn: 115306
 2010-10-01 09:20:01 +00:00
Eric Christopher
48606deb11 Implement double return values in calls. Fixes 
SingleSource/Regression/C/casts.c.

llvm-svn: 115246
 2010-10-01 00:00:11 +00:00
Dale Johannesen
c14a1eda84 Massive rewrite of MMX: 
The x86_mmx type is used for MMX intrinsics, parameters and
return values where these use MMX registers, and is also
supported in load, store, and bitcast.

Only the above operations generate MMX instructions, and optimizations
do not operate on or produce MMX intrinsics. 

MMX-sized vectors <2 x i32> etc. are lowered to XMM or split into
smaller pieces.  Optimizations may occur on these forms and the
result casted back to x86_mmx, provided the result feeds into a
previous existing x86_mmx operation.

The point of all this is prevent optimizations from introducing
MMX operations, which is unsafe due to the EMMS problem.

llvm-svn: 115243
 2010-09-30 23:57:10 +00:00
Owen Anderson
918c558636 Temporarily add a flag to make it easier to compare the new-style ARM if 
conversion heuristics to the old-style ones.

llvm-svn: 115239
 2010-09-30 23:48:38 +00:00
Jim Grosbach
45de3f6747 Clean up asm writer usage for x86 and msp430 to flag that the writer should 
use MC instructions in the printInstruction() method via the tablegen flag
for it rather than a #define prior to including the autogenerated bits.

llvm-svn: 115238
 2010-09-30 23:40:25 +00:00
Eric Christopher
0c94293fb3 Movement and cleanup. 
llvm-svn: 115225
 2010-09-30 22:34:19 +00:00
Eric Christopher
2d33066699 Start of generalized call support for ARM fast isel. 
llvm-svn: 115203
 2010-09-30 20:49:44 +00:00
Jim Grosbach
2bf1c488de Nuke a few more unused asm strings 
llvm-svn: 115193
 2010-09-30 19:53:58 +00:00
Jim Grosbach
8bf43f57d4 Move getPointerSize() to the base class since it's not dependent on MachO 
vs. ELF

llvm-svn: 115180
 2010-09-30 17:45:51 +00:00
Jim Grosbach
5d93ed90e5 Remove extraneous ';' 
llvm-svn: 115176
 2010-09-30 17:19:17 +00:00
Chris Lattner
df2f5c0a40 preemptively add the rest of the non-n fpstack instructions. 
llvm-svn: 115168
 2010-09-30 17:11:29 +00:00
Jim Grosbach
52b5709c99 The asm strings are never used at all, so just nuke 'em entirely. 
llvm-svn: 115160
 2010-09-30 16:56:53 +00:00
Chris Lattner
8e7a4b7b57 implement support for finit, PR8258 
llvm-svn: 115156
 2010-09-30 16:42:53 +00:00
Chris Lattner
fecf3a7717 add support for fstcw, PR8259 
llvm-svn: 115154
 2010-09-30 16:39:29 +00:00
Kevin Enderby
dd3306fcb5 Adds getPointerSize() to the AsmBackend which will be needed by the final patch 
for the dwarf .loc support to emit dwarf line number tables.

llvm-svn: 115153
 2010-09-30 16:38:07 +00:00
Jim Grosbach
37fbea8ac9 80 column fix 
llvm-svn: 115149
 2010-09-30 15:25:22 +00:00
Jason W Kim
b181166ffc Fix two tiny issues (ARM does not need COFF) and comment sanity. 
llvm-svn: 115147
 2010-09-30 14:58:19 +00:00
Jim Grosbach
4ad95fa930 trailing whitespace 
llvm-svn: 115136
 2010-09-30 03:21:00 +00:00
Jim Grosbach
5b0ae02149 Remove misplaced ';'. Make buildbots happy, hopefully. 
llvm-svn: 115135
 2010-09-30 03:20:34 +00:00
Rafael Espindola
480ee577ad Correctly produce R_X86_64_32 or R_X86_64_32S. 
With this patch in

movq    $foo, foo(%rip)
foo:
.long   foo

We produce a R_X86_64_32S for the first relocation and R_X86_64_32 for the
second one.

llvm-svn: 115134
 2010-09-30 03:11:42 +00:00
Jason W Kim
7822e6aab5 Tiny patch for proof-of-concept cleanup of ARMAsmPrinter::EmitStartOfAsmFile() 
Small test for sanity check of resulting ARM .s file.
Tested against -r115129.

llvm-svn: 115133
 2010-09-30 02:45:56 +00:00
Jim Grosbach
ad67153eb3 Go ahead and jump! 
Now that the MC lowering handles the expansion of the pseudos, kill the horrible
blobs of text.

llvm-svn: 115130
 2010-09-30 02:18:06 +00:00
Jason W Kim
6d7784e5f5 I added a new file ARMAsmBackend which stubs out in similar ways to 
the eqv X86 class.
For now, I split the ELFARMAsmBackend from the DarwinARMAsmBackend
(also mimicking X86)

Tested against -r115126

llvm-svn: 115129
 2010-09-30 02:17:26 +00:00
Jim Grosbach
3a7ca3301b Now that the pseudos that needed this are all custom lowered, we can go back 
to an empty PrintSpecial()

llvm-svn: 115128
 2010-09-30 02:02:22 +00:00
Jim Grosbach
efad965653 Nuke it from orbit. It's the only way to be sure. 
(Kill the dead non-MC asm printer for the ARM target.)

llvm-svn: 115127
 2010-09-30 01:57:53 +00:00
Evan Cheng
fa5d40dbff ARM instruction itinerary fixes: 
1. Cortex-a9 8-bit and 16-bit loads / stores AGU cycles are 1 cycle longer than 32-bit ones.
2. Cortex-a9 is out-of-order so model all read cycles as cycle 1.
3. Lots of other random fixes for A8 and A9.

llvm-svn: 115121
 2010-09-30 01:08:25 +00:00
Benjamin Kramer
2a44a539e2 Add constant folding for strspn and strcspn to SimplifyLibCalls. 
llvm-svn: 115116
 2010-09-30 00:58:35 +00:00
Eric Christopher
ba01048ae2 Refactor arm fast isel libcall handling so that pieces can be used 
for generic call handling.

llvm-svn: 115105
 2010-09-29 23:11:09 +00:00
Eric Christopher
80d620fb38 Noticed by inspection when looking for other cmov bits. 
llvm-svn: 115100
 2010-09-29 23:00:29 +00:00
Evan Cheng
b44d480808 Model Cortex-a9 load to SUB, RSB, ADD, ADC, SBC, RSC, CMN, MVN, or CMP 
pipeline forwarding path.

llvm-svn: 115098
 2010-09-29 22:42:35 +00:00
Eric Christopher
eb578cf724 Add a convenience variable so I'm not chasing all over looking for 
a context.

llvm-svn: 115094
 2010-09-29 22:24:45 +00:00
Jim Grosbach
fd8705ab4a Add specializations of addrmode2 that allow differentiating those forms 
which require the use of the shifter-operand. This will be used to split
the ldr/str instructions such that those versions needing the shifter operand
can get a different scheduling itenerary, as in some cases, the use of the
shifter can cause different scheduling than the simpler forms.

llvm-svn: 115066
 2010-09-29 19:03:54 +00:00
Nick Lewycky
a533bd63e6 Add parens to fix GCC warning: 
lib/Target/X86/X86MCCodeEmitter.cpp: 190: error: suggest parentheses around '&&' within '||'

llvm-svn: 115064
 2010-09-29 18:56:57 +00:00
Chris Lattner
7f466d63e0 implement rdar://8491845 - Gas supports commuted forms of non-commutable instructions. 
llvm-svn: 115061
 2010-09-29 18:39:16 +00:00
Bob Wilson
d16aaccb05 Increase ARM APCS preferred alignment for i64 and f64 from 32 bits to 64 bits. 
LDM/STM instructions can run one cycle faster on some ARM processors if the
memory address is 64-bit aligned.  Radar 8489376.

llvm-svn: 115047
 2010-09-29 17:54:10 +00:00
Jim Grosbach
9939090a14 Add braces for legibility. 
llvm-svn: 115043
 2010-09-29 17:32:29 +00:00
Jim Grosbach
fe21554145 One Printer to rule them all, One Printer to find them, 
One Printer to lower them all and in the back end bind them.


(Remove option to use the old non-MC asm printer.)

llvm-svn: 115038
 2010-09-29 15:23:40 +00:00
Gabor Greif
e1de402213 improve heuristics to find the 'and' corresponding to 'tst' to also catch opportunities on thumb2 
added some doxygen on the way

llvm-svn: 115033
 2010-09-29 10:12:08 +00:00
Chris Lattner
9c58de2dc4 fix rdar://8490728 - llvm-mc rejects gpr64 form of 'movmskpd' 
llvm-svn: 115029
 2010-09-29 05:05:03 +00:00
Chris Lattner
890c21a20a add assembler support for the cvtsd2sil/cvtsd2siq mnemonics, rdar://8456382 
llvm-svn: 115027
 2010-09-29 04:55:40 +00:00
Chris Lattner
54939ddf1f make the x86 mccode emitter emit the 0x67 and 0x66 prefix bytes in the same 
order as cctools for diffability.

llvm-svn: 115022
 2010-09-29 03:43:43 +00:00