213 Commits

Author SHA1 Message Date
Dan Gohman
71245ea439 Fix a typo in a comment.
llvm-svn: 66843
2009-03-12 23:55:10 +00:00
Dan Gohman
42049dafd7 Fix ScheduleDAGRRList::CopyAndMoveSuccessors' handling of nodes
with multiple chain operands. This can occur when the scheduler
has added chain operands to a node that already has a chain
operand, in order to handle physical register dependencies.

This fixes an llvm-gcc bootstrap failure on x86-64 introduced
in r66058.

llvm-svn: 66240
2009-03-06 02:23:01 +00:00
Evan Cheng
db402a7a49 Fix PR3701. 1. X86 target renamed eflags register to flags. This matches what llvm-gcc generates so codegen knows flags register is being clobbered by inline asm. 2. BURR scheduler should also check if inline asm nodes can clobber "live" physical registers. Previously it was only checking target nodes with implicit defs.
llvm-svn: 65996
2009-03-04 01:41:49 +00:00
Evan Cheng
521b8b5ef3 Oops. Last second clean up messed things up.
llvm-svn: 64373
2009-02-12 09:52:13 +00:00
Evan Cheng
19a1ba3680 Replace one of burr scheduling heuristic with something more sensible. Now calcMaxScratches simply compute the number of true data dependencies. This actually improve a couple of tests in dejagnu suite as many tests in llvm nightly test suite.
llvm-svn: 64369
2009-02-12 08:59:45 +00:00
Dan Gohman
c4f5d4d35d Fix a comment.
llvm-svn: 64328
2009-02-11 21:32:08 +00:00
Dan Gohman
d252329703 Don't use special heuristics for nodes with no data predecessors
unless they actually have data successors, and likewise for nodes
with no data successors unless they actually have data precessors.

llvm-svn: 64327
2009-02-11 21:29:39 +00:00
Dan Gohman
35db81715f Delete the heuristic for non-livein CopyFromReg nodes. Non-liveinness
is determined by whether the node has a Flag operand. However, if the
node does have a Flag operand, it will be glued to its register's
def, so the heuristic would end up spuriously applying to whatever
node is the def.

llvm-svn: 64319
2009-02-11 20:25:59 +00:00
Dan Gohman
7e48e82adb When scheduling a block in parts, keep track of the overall
instruction index across each part. Instruction indices are used
to make live range queries, and live ranges can extend beyond
scheduling region boundaries.

Refactor the ScheduleDAGSDNodes class some more so that it
doesn't have to worry about this additional information.

llvm-svn: 64288
2009-02-11 04:27:20 +00:00
Dan Gohman
f2b9543ee5 Factor out more code for computing register live-range informationfor
scheduling, and generalize is so that preserves state across
scheduling regions. This fixes incorrect live-range information around
terminators and labels, which are effective region boundaries.

In place of looking for terminators to anchor inter-block dependencies,
introduce special entry and exit scheduling units for this purpose.

llvm-svn: 64254
2009-02-10 23:27:53 +00:00
Evan Cheng
5be1afd928 Fix PR3457: Ignore control successors when looking for closest scheduled successor. A control successor doesn't read result(s) produced by the scheduling unit being evaluated.
llvm-svn: 64210
2009-02-10 08:30:11 +00:00
Dan Gohman
5784cf7f6d Move ScheduleDAGSDNodes.h to be a private header. Front-ends
that previously included this header should include
SchedulerRegistry.h instead.

llvm-svn: 63937
2009-02-06 17:22:58 +00:00
Dan Gohman
cfbb66cf90 Make a few things const, fix some comments, and simplify
some assertions.

llvm-svn: 63328
2009-01-29 19:49:27 +00:00
Dan Gohman
6fcee67989 Move a few containers out of ScheduleDAGInstrs::BuildSchedGraph
and into the ScheduleDAGInstrs class, so that they don't get
destructed and re-constructed for each block. This fixes a
compile-time hot spot in the post-pass scheduler.

To help facilitate this, tidy and do some minor reorganization
in the scheduler constructor functions.

llvm-svn: 62275
2009-01-15 19:20:50 +00:00
Dan Gohman
9e9858781c The list-td and list-tdrr schedulers don't yet support physreg
scheduling dependencies. Add assertion checks to help catch
this.

It appears the Mips target defaults to list-td, and it has a
regression test that uses a physreg dependence. Such code was
liable to be miscompiled, and now evokes an assertion failure.

llvm-svn: 62177
2009-01-13 20:24:13 +00:00
Evan Cheng
5e17ea36e1 Fix PR3241: Currently EmitCopyFromReg emits a copy from the physical register to a virtual register unless it requires an expensive cross class copy. That means we are only treating "expensive to copy" register dependency as physical register dependency.
Also future proof the scheduler to handle "normal" physical register dependencies. The code is not exercised yet.

llvm-svn: 62074
2009-01-12 03:19:55 +00:00
Evan Cheng
7a918ea197 Minor debug output tweak.
llvm-svn: 62005
2009-01-09 20:42:34 +00:00
Dan Gohman
3579548f68 Remove redundant 'else's. No functionality change.
llvm-svn: 61891
2009-01-07 22:30:55 +00:00
Dan Gohman
595c38acb0 Update these argument lists for the isNormalMemory
argument. This doesn't affect current functionality.

llvm-svn: 61779
2009-01-06 01:28:56 +00:00
Dan Gohman
1cdb677fc8 Use a latency value of 0 for the artificial edges inserted by
AddPseudoTwoAddrDeps. This lets the scheduling infrastructure
avoid recalculating node heights. In very large testcases this
was a major bottleneck. Thanks to Roman Levenstein for finding
this!

As a side effect, fold-pcmpeqd-0.ll is now scheduled better
and it no longer requires spilling on x86-32.

llvm-svn: 61778
2009-01-06 01:19:04 +00:00
Dan Gohman
8271066844 Tidy up #includes, deleting a bunch of unnecessary #includes.
llvm-svn: 61715
2009-01-05 17:59:02 +00:00
Dan Gohman
8dc1513b6c CommuteNodesToReducePressure() is now removed.
llvm-svn: 61612
2009-01-03 19:19:30 +00:00
Dan Gohman
6a518de5f5 Remove the code from the scheduler that commuted two-address
instructions to avoid copies, because TwoAddressInstructionPass
also does this optimization.  The scheduler's version didn't
account for live-out values, which resulted in spurious commutes
and missed opportunities.

Now, TwoAddressInstructionPass handles all the opportunities,
instead of just those that the scheduler missed. The result is
usually the same, though there are occasional trivial differences
resulting from the avoidance of spurious commutes.

llvm-svn: 61611
2009-01-03 18:01:46 +00:00
Dan Gohman
6bee7ef264 Rename BuildSchedUnits to BuildSchedGraph, and refactor the
code in ScheduleDAGSDNodes' BuildSchedGraph into separate functions.

llvm-svn: 61376
2008-12-23 18:36:58 +00:00
Dan Gohman
40a40dd7c1 Fix some register-alias-related bugs in the post-RA scheduler liveness
computation code. Also, avoid adding output-depenency edges when both
defs are dead, which frequently happens with EFLAGS defs.

Compute Depth and Height lazily, and always in terms of edge latency
values. For the schedulers that don't care about latency, edge latencies
are set to 1.

Eliminate Cycle and CycleBound, and LatencyPriorityQueue's Latencies array.
These are all subsumed by the Depth and Height fields.

llvm-svn: 61073
2008-12-16 03:25:46 +00:00
Dan Gohman
23aae3bba9 Make addPred and removePred return void, since the return value is not
currently used by anything.

llvm-svn: 61066
2008-12-16 01:00:55 +00:00
Dan Gohman
036cc300ad Rewrite the SDep class, and simplify some of the related code.
The Cost field is removed. It was only being used in a very limited way,
to indicate when the scheduler should attempt to protect a live register,
and it isn't really needed to do that. If we ever want the scheduler to
start inserting copies in non-prohibitive situations, we'll have to
rethink some things anyway.

A Latency field is added. Instead of giving each node a single
fixed latency, each edge can have its own latency. This will eventually
be used to model various micro-architecture properties more accurately.

The PointerIntPair class and an internal union are now used, which
reduce the overall size.

llvm-svn: 60806
2008-12-09 22:54:47 +00:00
Dan Gohman
93e73ed7f2 Make debug output more informative.
llvm-svn: 60524
2008-12-04 02:14:57 +00:00
Dan Gohman
92cedc8a95 Initial support for anti-dependence breaking. Currently this code does not
introduce any new spilling; it just uses unused registers.

Refactor the SUnit topological sort code out of the RRList scheduler and
make use of it to help with the post-pass scheduler.

llvm-svn: 59999
2008-11-25 00:52:40 +00:00
Dan Gohman
bacca559dd Check in the rest of this change. The isAntiDep flag needs to be passed
to removePred because an SUnit can both data-depend and anti-depend
on the same SUnit.

llvm-svn: 59969
2008-11-24 17:33:52 +00:00
Dan Gohman
be413b4a40 Add a flag to SDep for tracking which edges are anti-dependence edges.
llvm-svn: 59785
2008-11-21 02:27:52 +00:00
Dan Gohman
62180eb6f2 Rename SDep's isSpecial to isArtificial, to make this field a little
less mysterious.

llvm-svn: 59782
2008-11-21 02:18:56 +00:00
Dan Gohman
34f79b2425 Remove the CycleBound computation code from the ScheduleDAGRRList
schedulers. This doesn't have much immediate impact because
targets that use these schedulers by default don't yet provide
pipeline information.

This code also didn't have the benefit of register pressure
information. Also, removing it will avoid problems with list-burr
suddenly starting to do latency-oriented scheduling on x86 when we
start providing pipeline data, which would increase spilling.

llvm-svn: 59775
2008-11-21 01:30:54 +00:00
Dan Gohman
66e692dd8f Change these schedulers to not emit no-ops. It turns out that
the RR scheduler actually does look at latency values, but it
doesn't use a hazard recognizer so it has no way to know when
a no-op is needed, as opposed to just stalling and incrementing
the cycle count.

llvm-svn: 59759
2008-11-21 00:10:42 +00:00
Dan Gohman
d5d4c72217 Remove a remnant of list-burr's fast mode.
llvm-svn: 59702
2008-11-20 03:32:45 +00:00
Dan Gohman
dd45a57684 Factor out the SethiUllman numbering logic from the list-burr and
list-tdrr schedulers into a common base class.

llvm-svn: 59701
2008-11-20 03:30:37 +00:00
Dan Gohman
63cc6f6c63 Remove the "fast" form of the list-burr scheduler, and use the
dedicated "fast" scheduler in -fast mode instead, which is
faster. This speeds up llc -fast by a few percent on some
testcases -- the speedup only happens for code not handled by
fast-isel.

llvm-svn: 59700
2008-11-20 03:11:19 +00:00
Dan Gohman
b8e32efb30 Facter AddPseudoTwoAddrDeps and associated infrasructure out of
the list-burr scheduler so that it can be used by the list-tdrr
scheduler too.

llvm-svn: 59698
2008-11-20 02:45:51 +00:00
Dan Gohman
77e3f07d4b Factor out the code for verifying the work of the scheduler,
extend it a bit, and make use of it in all schedulers, to
ensure consistent checking.

llvm-svn: 59689
2008-11-20 01:26:25 +00:00
Dan Gohman
f4b2751ee6 Experimental post-pass scheduling support. Post-pass scheduling
is currently off by default, and can be enabled with
-disable-post-RA-scheduler=false.

This doesn't have a significant impact on most code yet because it doesn't
yet do anything to address anti-dependencies and it doesn't attempt to
disambiguate memory references. Also, several popular targets
don't have pipeline descriptions yet.

The majority of the changes here are splitting the SelectionDAG-specific
code out of ScheduleDAG, so that ScheduleDAG can be moved to
libLLVMCodeGen.a. The interface between ScheduleDAG-using code and
the rest of the scheduling code is somewhat rough and will evolve.

llvm-svn: 59676
2008-11-19 23:18:57 +00:00
Dan Gohman
d69d23aa7f Rearrange code to reduce the nesting level. No functionality change.
llvm-svn: 59580
2008-11-19 02:00:32 +00:00
Dan Gohman
6e32075485 Tidy up ScheduleNodeBottomUp methods, and make them more
consistent with ScheduleNodeTopDown methods.

llvm-svn: 59550
2008-11-18 21:22:20 +00:00
Dan Gohman
bc8cfae5c3 Change SUnit's dump method to take a ScheduleDAG* instead of
a SelectionDAG*.

llvm-svn: 59488
2008-11-18 02:06:40 +00:00
Dan Gohman
60cb69a7b5 Avoid using a loop in ReleasePred and ReleaseSucc methods to compute the
new CycleBound value. Instead, just update CycleBound on each call.
Also, make ReleasePred and ReleaseSucc methods more consistent accross
the various schedulers.

This also happens to make ScheduleDAGRRList's CycleBound computation
somewhat more interesting, though it still doesn't have any noticeable
effect, because no current targets that use the register-pressure
reduction scheduler provide pipeline models.

llvm-svn: 59475
2008-11-18 00:38:59 +00:00
Dan Gohman
60b429ea32 Eliminate some trivial differences between the ScheduleNodeTopDown
functions in these two schedulers.

llvm-svn: 59465
2008-11-17 21:31:02 +00:00
Dan Gohman
0a3ae5c0f2 Remove the FlaggedNodes member from SUnit. Instead of requiring each SUnit
to carry a SmallVector of flagged nodes, just calculate the flagged nodes
dynamically when they are needed.

The local-liveness change is due to a trivial scheduling change where
the scheduler arbitrary decision differently.

llvm-svn: 59273
2008-11-13 23:24:17 +00:00
Dan Gohman
0cefa8f2ff Make the Node member of SUnit private, and add accessors.
llvm-svn: 59264
2008-11-13 21:36:12 +00:00
Dan Gohman
df9f75e981 Change ScheduleDAG's DAG member from a reference to a pointer, to prepare
for the possibility of scheduling without a SelectionDAG being present.

llvm-svn: 59263
2008-11-13 21:21:28 +00:00
Dan Gohman
291ea92cc4 In ScheduleDAGRRList::CopyAndMoveSuccessors, create the SUnit for the load
before creating the SUnit for the operation that it was unfolded from. This
allows each SUnit to have all of its predecessor SUnits available at the time
it is created. I don't know yet if this will be absolutely required, but it
is a little tidier to do it this way.

llvm-svn: 59083
2008-11-11 21:34:44 +00:00
Dan Gohman
ec3b31e7eb Change the scheduler accessor methods to accept an explicit TargetMachine
argument instead of taking the SelectionDAG's TargetMachine. This is
needed for some upcoming scheduler changes.

llvm-svn: 59055
2008-11-11 17:50:47 +00:00