1001 Commits

Author SHA1 Message Date
Chris Lattner
ad740ef059 add initial support for handling inline asms with multiple constraints.
This doesn't do the "right thing" but will probably work in most cases.

This implements CodeGen/PowerPC/2007-01-29-lbrx-asm.ll.

llvm-svn: 33643
2007-01-29 23:45:14 +00:00
Nate Begeman
dc46021355 Finish off bug 680, allowing targets to custom lower frame and return
address nodes.

llvm-svn: 33636
2007-01-29 22:58:52 +00:00
Anton Korobeynikov
95a00ad495 Arguments are counting from 1. not from 0. Maybe we should change
numbering somehow? E.g. make return argument the last?

llvm-svn: 33606
2007-01-28 18:01:49 +00:00
Anton Korobeynikov
f2a1c60bb4 More cleanup
llvm-svn: 33605
2007-01-28 16:04:40 +00:00
Anton Korobeynikov
611d5e2eda Propagate changes from my local tree. This patch includes:
1. New parameter attribute called 'inreg'. It has meaning "place this
parameter in registers, if possible". This is some generalization of
gcc's regparm(n) attribute. It's currently used only in X86-32 backend.
2. Completely rewritten CC handling/lowering code inside X86 backend.
Merged stdcall + c CCs and fastcall + fast CC.
3. Dropped CSRET CC. We cannot add struct return variant for each
target-specific CC (e.g. stdcall + csretcc and so on).
4. Instead of CSRET CC introduced 'sret' parameter attribute. Setting in
on first attribute has meaning 'This is hidden pointer to structure
return. Handle it gently'.
5. Fixed small bug in llvm-extract + add new feature to
FunctionExtraction pass, which relinks all internal-linkaged callees
from deleted function to external linkage. This will allow further
linking everything together.

NOTEs: 1. Documentation will be updated soon.
       2. llvm-upgrade should be improved to translate csret => sret.
          Before this, there will be some unexpected test fails.
llvm-svn: 33597
2007-01-28 13:31:35 +00:00
Jim Laskey
64f4242072 Change the MachineDebugInfo to MachineModuleInfo to better reflect usage
for debugging and exception handling.

llvm-svn: 33550
2007-01-26 21:22:28 +00:00
Jim Laskey
23ed7d2625 Make LABEL a builtin opcode.
llvm-svn: 33537
2007-01-26 14:34:52 +00:00
Reid Spencer
e33c18f4d2 For PR970:
Clean up handling of isFloatingPoint() and dealing with PackedType.
Patch by Gordon Henriksen!

llvm-svn: 33415
2007-01-21 00:29:26 +00:00
Chris Lattner
9df9e3e57b Teach TargetData to handle 'preferred' alignment for each target, and use
these alignment amounts to align scalars when we can.  Patch by Scott Michel!

llvm-svn: 33409
2007-01-20 22:35:55 +00:00
Zhou Sheng
23d24526b2 For PR1043:
Merge ConstantIntegral and ConstantBool into ConstantInt.
Remove ConstantIntegral and ConstantBool from LLVM.

llvm-svn: 33073
2007-01-11 12:24:14 +00:00
Chris Lattner
b6f6d3a00c remove support for llvm.isunordered
llvm-svn: 32992
2007-01-07 08:37:22 +00:00
Evan Cheng
8d09e52569 GEP subscript is interpreted as a signed value.
llvm-svn: 32888
2007-01-05 01:46:20 +00:00
Chris Lattner
45c7c69c77 fix PowerPC/2007-01-04-ArgExtension.ll, a bug handling K&R prototypes with
the recent signless changes.

llvm-svn: 32884
2007-01-04 22:22:37 +00:00
Reid Spencer
20d9040d17 Legalizer doesn't do an ANY_EXTEND if we don't ask for one so make sure
that we default to an ANY_EXTEND if no parameter attribute is set on the
result value of a function.

llvm-svn: 32836
2007-01-03 16:49:33 +00:00
Reid Spencer
87c68ceb32 Restore previous behavior of defaulting to ZEXT. This works around two
things: (1) preventing PR1071 and (2) working around missing parameter
attributes for bool type. (2) will be fixed shortly. When PR1071 is fixed,
this patch should be undone.

llvm-svn: 32831
2007-01-03 05:03:05 +00:00
Reid Spencer
92c52fe025 Two changes:
1. Switch expression and cases are compared signed and are sign extended.
2. For function results needing extended, do SIGN_EXTEND if the SExtAttribute
   is set and ZERO_EXTEND if the ZExtAttribute is set, otherwise just let
   the Legalizer do ANY_EXTEND.
This fixes the recent regression in kimwitu++ and probably the llvm-gcc
bootstrap issue we had today.

llvm-svn: 32830
2007-01-03 04:25:33 +00:00
Reid Spencer
dda168599d For PR950:
Three changes:
1. Convert signed integer types to signless versions.
2. Implement the @sext and @zext parameter attributes. Previously the
   type of an function parameter was used to determine whether it should
   be sign extended or zero extended before the call. This information is
   now communicated via the function type's parameter attributes.
3. The interface to LowerCallTo had to be changed in order to accommodate
   the parameter attribute information. Although it would have been
   convenient to pass in the FunctionType itself, there isn't always one
   present in the caller. Consequently, a signedness indication for the
   result type and for each parameter was provided for in the interface
   to this method. All implementations were changed to make the adjustment
   necessary.

llvm-svn: 32788
2006-12-31 05:55:36 +00:00
Reid Spencer
4428c3483b For PR950:
This patch removes the SetCC instructions and replaces them with the ICmp
and FCmp instructions. The SetCondInst instruction has been removed and
been replaced with ICmpInst and FCmpInst.

llvm-svn: 32751
2006-12-23 06:05:41 +00:00
Evan Cheng
564ef2e7f4 getLoad() and getStore() calls missed SVOffset operand. Thanks to Dan Gohman
for pointing it out!

llvm-svn: 32712
2006-12-20 01:27:29 +00:00
Chris Lattner
8b1e4d1edf Fix PR1049 and CodeGen/Generic/2006-12-16-InlineAsmCrash.ll
by producing target constants instead of constants.  Constants can get
selected to li/movri instructions, which causes the scheduler to explode.

llvm-svn: 32633
2006-12-16 21:14:48 +00:00
Evan Cheng
10389e802b More soft-fp work.
llvm-svn: 32559
2006-12-13 20:57:08 +00:00
Reid Spencer
50702907eb Replace CastInst::createInferredCast calls with more accurate cast
creation calls.

llvm-svn: 32521
2006-12-13 00:50:17 +00:00
Evan Cheng
061d636b7a Expand i32/i64 CopyToReg f32/f64 to BIT_CONVERT + CopyToReg.
llvm-svn: 32493
2006-12-12 21:21:32 +00:00
Evan Cheng
df11bd2186 Expand formal arguments and call arguments recursively: e.g. f64 -> i64 -> 2 x i32.
llvm-svn: 32476
2006-12-12 07:27:38 +00:00
Anton Korobeynikov
e76b69846d Cleaned setjmp/longjmp lowering interfaces. Now we're producing right
code (both asm & cbe) for Mingw32 target.
Removed autoconf checks for underscored versions of setjmp/longjmp.

llvm-svn: 32415
2006-12-10 23:12:42 +00:00
Evan Cheng
a366d082b5 Preliminary soft float support.
llvm-svn: 32394
2006-12-09 02:42:38 +00:00
Bill Wendling
23b8b13c9d Removing even more <iostream> includes.
llvm-svn: 32320
2006-12-07 20:04:42 +00:00
Evan Cheng
0be56fab68 Fix for PR1023 by Dan Gohman.
llvm-svn: 32003
2006-11-29 01:58:12 +00:00
Evan Cheng
f38588a1cd Fix for PR1022 (folding loads of static initializers) by Dan Gohman.
llvm-svn: 32000
2006-11-29 01:38:07 +00:00
Chris Lattner
d00734a230 add a hook to allow targets to hack on inline asms to lower them to llvm
when they want to.

llvm-svn: 31997
2006-11-29 01:12:32 +00:00
Evan Cheng
98fa7ab4d7 Change MachineInstr ctor's to take a TargetInstrDescriptor reference instead
of opcode and number of operands.

llvm-svn: 31947
2006-11-27 23:37:22 +00:00
Reid Spencer
992d9788b3 For PR950:
The long awaited CAST patch. This introduces 12 new instructions into LLVM
to replace the cast instruction. Corresponding changes throughout LLVM are
provided. This passes llvm-test, llvm/test, and SPEC CPUINT2000 with the
exception of 175.vpr which fails only on a slight floating point output
difference.

llvm-svn: 31931
2006-11-27 01:05:10 +00:00
Reid Spencer
6e34ef887b For PR950:
First in a series of patches to convert SetCondInst into ICmpInst and
FCmpInst using only two opcodes and having the instructions contain their
predicate value. Nothing uses these classes yet. More patches to follow.

llvm-svn: 31867
2006-11-20 01:22:35 +00:00
Chris Lattner
286bb6e482 remove dead #include
llvm-svn: 31753
2006-11-15 17:51:15 +00:00
Chris Lattner
efb62464b9 commentate
llvm-svn: 31627
2006-11-10 04:41:34 +00:00
Reid Spencer
da1f5b882a For PR950:
This patch converts the old SHR instruction into two instructions,
AShr (Arithmetic) and LShr (Logical). The Shr instructions now are not
dependent on the sign of their operands.

llvm-svn: 31542
2006-11-08 06:47:33 +00:00
Reid Spencer
4bafa71dc1 For PR786:
Turn on -Wunused and -Wno-unused-parameter. Clean up most of the resulting
fall out by removing unused variables. Remaining warnings have to do with
unused functions (I didn't want to delete code without review) and unused
variables in generated code. Maintainers should clean up the remaining
issues when they see them. All changes pass DejaGnu tests and Olden.

llvm-svn: 31380
2006-11-02 20:25:50 +00:00
Reid Spencer
1abf69e923 For PR950:
Replace the REM instruction with UREM, SREM and FREM.

llvm-svn: 31369
2006-11-02 01:53:59 +00:00
Chris Lattner
35cd439221 Allow the getRegForInlineAsmConstraint method to return a register class with
no fixes physreg.  Treat this as permission to use any register in the register
class.  When this happens and it is safe, allow the llvm register allcoator to
allocate the register instead of doing it at isel time.  This eliminates a ton
of copies around common inline asms.  For example:

int test2(int Y, int X) {
  asm("foo %0, %1" : "=r"(X): "r"(X));
  return X;
}

now compiles to:

_test2:
        foo r3, r4
        blr

instead of:

_test2:
        mr r2, r4
        foo r2, r2
        mr r3, r2
        blr

GCC produces:

_test2:
        foo r4, r4
        mr r3,r4
        blr

llvm-svn: 31366
2006-11-02 01:41:49 +00:00
Chris Lattner
850ef9955d Compile CodeGen/PowerPC/fp-branch.ll to:
_intcoord_cond_next55:
LBB1_3: ;cond_next55
        lis r2, ha16(LCPI1_0)
        lfs f0, lo16(LCPI1_0)(r2)
        fcmpu cr0, f1, f0
        blt cr0, LBB1_2 ;cond_next62.exitStub
LBB1_1: ;bb72.exitStub
        li r3, 1
        blr
LBB1_2: ;cond_next62.exitStub
        li r3, 0
        blr

instead of:

_intcoord_cond_next55:
LBB1_3: ;cond_next55
        lis r2, ha16(LCPI1_0)
        lfs f0, lo16(LCPI1_0)(r2)
        fcmpu cr0, f1, f0
        bge cr0, LBB1_1 ;bb72.exitStub
LBB1_4: ;cond_next55
        lis r2, ha16(LCPI1_0)
        lfs f0, lo16(LCPI1_0)(r2)
        fcmpu cr0, f1, f0
        bnu cr0, LBB1_2 ;cond_next62.exitStub
LBB1_1: ;bb72.exitStub
        li r3, 1
        blr
LBB1_2: ;cond_next62.exitStub
        li r3, 0
        blr

llvm-svn: 31330
2006-10-31 23:06:00 +00:00
Chris Lattner
3131b7d6d1 look through isunordered to inline it into branch blocks.
llvm-svn: 31328
2006-10-31 22:37:42 +00:00
Chris Lattner
a44a27dc47 TargetLowering::isOperandValidForConstraint
llvm-svn: 31319
2006-10-31 19:41:18 +00:00
Chris Lattner
a9f10b25cc Turn an assert into an error message. This is commonly triggered when
we don't support a specific constraint yet.  When this happens, print the
unsupported constraint.

llvm-svn: 31310
2006-10-31 07:33:13 +00:00
Evan Cheng
972f469722 Lower jumptable to BR_JT. The legalizer can lower it to a BRIND or let the target custom lower it.
llvm-svn: 31293
2006-10-30 08:00:44 +00:00
Chris Lattner
46a439780e fix Generic/2006-10-29-Crash.ll
llvm-svn: 31281
2006-10-29 21:01:20 +00:00
Chris Lattner
0a5d859ae3 Fix a load folding issue that Evan noticed: there is no need to export values
used by comparisons in the main block.

llvm-svn: 31279
2006-10-29 18:23:37 +00:00
Chris Lattner
776740f897 split critical edges more carefully and intelligently. In particular, critical
edges whose destinations are not phi nodes don't bother us.  Also, share
split edges, since the split edge can't have a phi.  This significantly
reduces the complexity of generated code in some cases.

llvm-svn: 31274
2006-10-28 19:22:10 +00:00
Chris Lattner
ee8a70f370 Split *all* critical edges before isel. This resolves issues with spill code
being inserted on unsplit critical edges, which introduces (sometimes large
amounts of) partially dead spill code.

This also fixes PR925 + CodeGen/Generic/switch-crit-edge-constant.ll

llvm-svn: 31260
2006-10-28 17:04:37 +00:00
Chris Lattner
e009249ae1 Fix a bug in merged condition handling (CodeGen/Generic/2006-10-27-CondFolding.ll).
Add many fewer CFG edges and PHI node entries.  If there is a switch which has
the same block as multiple destinations, only add that block once as a successor/phi
node (in the jumptable case)

llvm-svn: 31242
2006-10-27 23:50:33 +00:00
Chris Lattner
e2297cd5a6 remove debug code
llvm-svn: 31233
2006-10-27 21:58:03 +00:00