550 Commits

Author SHA1 Message Date
Nicolas Geoffray
18ab237446 Enable EH for linux/ppc32 targets
llvm-svn: 45281
2007-12-21 12:19:44 +00:00
Chris Lattner
e16166b78d implement __builtin_return_addr(0) on ppc.
llvm-svn: 44700
2007-12-08 06:59:59 +00:00
Chris Lattner
e59a7ee26a Implement ExpandOperationResult for ppc i64 fp->int, which fixes
CodeGen/Generic/fp_to_int.ll among others.  Its unclear why this 
just started failing...

llvm-svn: 44407
2007-11-28 18:44:47 +00:00
Bill Wendling
cc75435ebf Unify CALLSEQ_{START,END}. They take 4 parameters: the chain, two stack
adjustment fields, and an optional flag. If there is a "dynamic_stackalloc" in
the code, make sure that it's bracketed by CALLSEQ_START and CALLSEQ_END. If
not, then there is the potential for the stack to be changed while the stack's
being used by another instruction (like a call).

This can only result in tears...

llvm-svn: 44037
2007-11-13 00:44:25 +00:00
Dale Johannesen
94241a8d3a Disable a couple more things for ppcf128.
llvm-svn: 43267
2007-10-23 23:20:14 +00:00
Evan Cheng
85eb733eff Use ptr type in the immediate field of a BxA instruction so we don't end up selecting 32-bit call instruction for ppc64.
llvm-svn: 43228
2007-10-22 19:46:19 +00:00
Chris Lattner
4354f2db6a comment fixes
llvm-svn: 43168
2007-10-19 04:08:28 +00:00
Dale Johannesen
b23b0bfa8f More ppcf128 issues (maybe the last)?
llvm-svn: 43160
2007-10-19 00:59:18 +00:00
Chris Lattner
c641c8c6ec Change LowerFP_TO_SINT to create the specific code it needs instead of
unconditionally creating an i64 bitcast.  With the future legalizer
design, operation legalization can't introduce new nodes with illegal
types.

This fixes the rest of olden on ppc32.

llvm-svn: 43005
2007-10-15 20:14:52 +00:00
Dale Johannesen
6c89945eb8 Fix type mismatch error in PPC Altivec (only causes
a problem when asserts are on).  From vecLib.

llvm-svn: 42959
2007-10-14 01:58:32 +00:00
Dan Gohman
171fb68ae0 Mark vector pow, ctpop, cttz, and ctlz as Expand on PowerPC.
llvm-svn: 42904
2007-10-12 14:08:57 +00:00
Dan Gohman
edc841fb53 Set ISD::FPOW to Expand.
llvm-svn: 42881
2007-10-11 23:21:31 +00:00
Dale Johannesen
76458ddf1e Next PPC long double bits: ppcf128->i32 conversion.
Surprisingly complicated.
Adds getTargetNode for 2 outputs, no inputs (missing).

llvm-svn: 42822
2007-10-10 01:01:31 +00:00
Dan Gohman
ae3b47b06f When we start enabling SMUL_LOHI/UMUL_LOHI or SDIVREM/UDIVREM in
target-indepenent lowering, don't use them on PowerPC.

llvm-svn: 42755
2007-10-08 17:28:24 +00:00
Dale Johannesen
9b7ac95116 Next powerpc long double bits. Comparisons work,
although not well, and shortening FP converts.

llvm-svn: 42672
2007-10-06 01:24:11 +00:00
Dale Johannesen
c7b51b678d First round of ppc long double. call/return and
basic arithmetic works.
Rename RTLIB long double functions to distinguish
different flavors of long double; the lib functions
have different names, alas.

llvm-svn: 42644
2007-10-05 20:04:43 +00:00
Duncan Sands
c358890f73 Fold the adjust_trampoline intrinsic into
init_trampoline.  There is now only one
trampoline intrinsic.

llvm-svn: 41841
2007-09-11 14:10:23 +00:00
Owen Anderson
4b71e55287 Add lengthof and endof templates that hide a lot of sizeof computations.
Patch by Sterling Stein!

llvm-svn: 41758
2007-09-07 04:06:50 +00:00
Dale Johannesen
81d6ecb886 Enhance APFloat to retain bits of NaNs (fixes oggenc).
Use APFloat interfaces for more references, mostly
of ConstantFPSDNode.

llvm-svn: 41632
2007-08-31 04:03:46 +00:00
Bill Wendling
c65cf7849d Use i64 on a PPC64 machine
llvm-svn: 41590
2007-08-30 00:59:19 +00:00
Chris Lattner
1e089aac3a rename isOperandValidForConstraint to LowerAsmOperandForConstraint,
changing the interface to allow for future changes.

llvm-svn: 41384
2007-08-25 00:47:38 +00:00
Evan Cheng
ff50061170 Vector fneg must be expanded into fsub -0.0, X.
llvm-svn: 40586
2007-07-30 07:51:22 +00:00
Duncan Sands
e8bb2c6d32 Support for trampolines, except for X86 codegen which is
still under discussion.

llvm-svn: 40549
2007-07-27 12:58:54 +00:00
Lauro Ramos Venancio
18fc770fd0 Assert when TLS is not implemented.
llvm-svn: 39737
2007-07-11 17:19:51 +00:00
Dan Gohman
81cfdc2f19 Change getCopyToParts and getCopyFromParts to always use target-endian
register ordering, for both physical and virtual registers. Update the PPC
target lowering for calls to expect registers for the call result to
already be in target order.

llvm-svn: 38471
2007-07-09 20:59:04 +00:00
Dan Gohman
a62327ea40 Move ComputeMaskedBits, MaskedValueIsZero, and ComputeNumSignBits from
TargetLowering to SelectionDAG so that they have more convenient
access to the current DAG, in preparation for the ValueType routines
being changed from standalone functions to members of SelectionDAG for
the pre-legalize vector type changes.

llvm-svn: 37704
2007-06-22 14:59:07 +00:00
Chris Lattner
81e8a18e7c describe an argument, hide it.
llvm-svn: 37650
2007-06-19 05:46:06 +00:00
Chris Lattner
e13fac05d7 If a function is vararg, never pass inreg arguments in registers. Thanks to
Anton for half of this patch.

llvm-svn: 37641
2007-06-19 00:13:10 +00:00
Dan Gohman
2fd7d26df8 Rename MVT::getVectorBaseType to MVT::getVectorElementType.
llvm-svn: 37579
2007-06-14 22:58:02 +00:00
Dan Gohman
875f6bde73 Apply this patch:
http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20070514/049845.html

llvm-svn: 37240
2007-05-18 23:21:46 +00:00
Chris Lattner
4861b958f1 fix some subtle inline asm selection issues
llvm-svn: 37067
2007-05-15 01:31:05 +00:00
Chris Lattner
b4ef9c8be3 Fix a bug in PPCTargetLowering::isLegalAddressingMode, scales other than 0/1/2
are always unsupported.

llvm-svn: 35835
2007-04-09 22:10:05 +00:00
Nicolas Geoffray
681a87d9e8 Starting implementation of the ELF32 ABI specification of varargs handling.
LowerVASTART emits the right code if the subtarget is ELF32, the other intrinsics
(VAARG, VACOPY and VAEND) are not yet implemented.

llvm-svn: 35625
2007-04-03 13:59:52 +00:00
Nicolas Geoffray
5897c064a6 The PPC64 ELF ABI is "intended to use the same structure layout and calling convention rules
as the 64-bit PowerOpen ABI" (Reference http://www.linux-foundation.org/spec/ELF/ppc64/).
Change all ELF tests to ELF32.

llvm-svn: 35624
2007-04-03 12:35:28 +00:00
Nicolas Geoffray
b7c0895529 The ELF ABI specifies F1-F8 registers as argument registers for double, not
F1-F10. This affects only ELF, not MachO.

llvm-svn: 35622
2007-04-03 10:27:07 +00:00
Chris Lattner
c0405a348d implement the new addressing mode description hook.
llvm-svn: 35521
2007-03-30 23:15:24 +00:00
Lauro Ramos Venancio
99fca527d3 "The C standards do say that "char" may either be a "signed char" or "unsigned
char" and it is up to the compilers implementation or the platform which is
followed."
http://www.arm.linux.org.uk/docs/faqs/signedchar.php

llvm-svn: 35382
2007-03-27 16:33:08 +00:00
Chris Lattner
b19069959d switch TargetLowering::getConstraintType to take the entire constraint,
not just the first letter.  No functionality change.

llvm-svn: 35322
2007-03-25 02:14:49 +00:00
Nicolas Geoffray
9c77df75ea Stack and register alignment of call arguments in the ELF ABI
llvm-svn: 35083
2007-03-13 15:02:46 +00:00
Evan Cheng
06d83c8fce More flexible TargetLowering LSR hooks for testing whether an immediate is a legal target address immediate or scale.
llvm-svn: 35074
2007-03-12 23:29:01 +00:00
Chris Lattner
26a5492049 Switch PPC return lower to use an autogenerated CC description.
llvm-svn: 34940
2007-03-06 00:59:59 +00:00
Nicolas Geoffray
4b5b81198a Implemented the frameaddress intrinsic for PPC.
llvm-svn: 34787
2007-03-01 13:11:38 +00:00
Nicolas Geoffray
a562e5c1c5 Differentiate between the MachO and the ELF ABI the CALL instruction.
llvm-svn: 34667
2007-02-27 13:01:19 +00:00
Chris Lattner
d4cd3a31e6 always lower to RETFLAG, never leave it as just ret.
llvm-svn: 34639
2007-02-26 19:44:02 +00:00
Chris Lattner
796625a49d no really, this is the right patch
llvm-svn: 34605
2007-02-25 20:01:40 +00:00
Chris Lattner
49fc72110a always promote float varargs to double.
llvm-svn: 34604
2007-02-25 19:59:18 +00:00
Chris Lattner
041fb5bc67 implement support for the linux/ppc function call ABI. Patch by
Nicolas Geoffray!

llvm-svn: 34574
2007-02-25 05:34:32 +00:00
Jim Laskey
b57ee1fc37 Simplify lowering and selection of exception ops.
llvm-svn: 34488
2007-02-22 14:56:36 +00:00
Jim Laskey
6a937ad320 Support to provide exception and selector registers.
llvm-svn: 34482
2007-02-21 22:54:50 +00:00
Chris Lattner
e3eae5e265 Fix ixaddrs as well, allowing ppc64 to compile to:
_test2:
        li r2, 0
        lis r3, 1
        std r2, 9024(r3)
        blr

instead of:

_test2:
        lis r2, 1
        li r3, 0
        ori r2, r2, 9024
        std r3, 0(r2)
        blr

This implements CodeGen/PowerPC/LargeAbsoluteAddr.ll:test2

llvm-svn: 34373
2007-02-17 06:57:26 +00:00