5 Commits

Author SHA1 Message Date
Sean Callanan
4331428e24 Eliminated the classification of control registers into %ecr_
and %rcr_, leaving just %cr_ which is what people expect.
Updated the disassembler to support this unified register set.
Added a testcase to verify that the registers continue to be
decoded correctly.

llvm-svn: 103196
2010-05-06 20:59:00 +00:00
Sean Callanan
fa9e35aa58 Fixes to the X86 disassembler. The disassembler will now
return an error status in all failure cases, printing
messages to debugs() only when debugging is enabled.

llvm-svn: 100229
2010-04-02 21:23:51 +00:00
Sean Callanan
0c1d56a0c8 More fixes for Visual C++. Replaced several very small
static inline functions with macros.

llvm-svn: 91973
2009-12-23 01:32:29 +00:00
Sean Callanan
09b2d80d2c Changed REG_* to MODRM_REG_* to avoid conflicts
with symbols in AuroraUX's global namespace.

llvm-svn: 91879
2009-12-22 02:07:42 +00:00
Sean Callanan
18fa59f381 Table-driven disassembler for the X86 architecture (16-, 32-, and 64-bit
incarnations), integrated into the MC framework.  

The disassembler is table-driven, using a custom TableGen backend to 
generate hierarchical tables optimized for fast decode.  The disassembler 
consumes MemoryObjects and produces arrays of MCInsts, adhering to the 
abstract base class MCDisassembler (llvm/MC/MCDisassembler.h).

The disassembler is documented in detail in

- lib/Target/X86/Disassembler/X86Disassembler.cpp (disassembler runtime)
- utils/TableGen/DisassemblerEmitter.cpp (table emitter)

You can test the disassembler by running llvm-mc -disassemble for i386
or x86_64 targets.  Please let me know if you encounter any problems
with it.

llvm-svn: 91749
2009-12-19 02:59:52 +00:00